/****************************************************************************** �� �� ����TIMER0.c �������������벶���� �� ����dutyCycle ռ�ձ� ******************************************************************************/ /* #include "TIMER0.h" uint32_t CurTime; uint32_t LastTime; uint32_t TimerCycle; uint8_t dutyCycle; uint8_t timer0status; uint32_t pwmcnt; uint16_t Espeed; void TIMER0_INIT(void) //TIMER0 { PTTRR_PTTRR1 = 1; /* Route IOC1_7 to PR3 */ // TIM1_TSCR1_TEN = 0; /* Disable timer module before adjusting registers. */ // TIM1_TIOS_IOS7 = 0; /* Set Channel 7 as input capture. */ // TIM1_TCTL3_EDG7A = 1; /* Set channel 7 to capture any edge transition. */ // TIM1_TCTL3_EDG7B = 1; /* Set channel 7 to capture any edge transition. */ // TIM1_TIE_C7I = 1; /* Enable channel 7 interrupt, handled by function TIM1ISR.*/ // TIM1_TSCR1_TSWAI = 1; /* Disables the timer module while in wait mode. */ // TIM1_TSCR1_TSFRZ = 1; /* Disables the timer counter while in freeze mode. */ // TIM1_TSCR2_PR = 7; /* Set prescaler to divide by 16. ��Ƶ 1 1 1 */ // TIM1_TSCR1_TEN = 1; /* Timer Enable. */ //} //#pragma CODE_SEG __NEAR_SEG NON_BANKED //�������жϺ�������FLASH�ķǷ�ҳ�� /*void interrupt Timer0_ONPUT(void) { TIM1_TFLG1_C7F = 1; // pwmcnt++; //�������ֵ timer0status++; if(timer0status == 1) { CurTime = TIM1_TC7; //������ֵ TIM0_TCTL3_EDG7B = 1; //��ʼ���½��� TIM0_TCTL3_EDG7A = 0; } else if(timer0status == 2) { timer0status = 0; LastTime = TIM1_TC7; //�½���ֵ TIM0_TCTL3_EDG7B = 0; //��ʼ�������� TIM0_TCTL3_EDG7A = 1; if(LastTime > CurTime) TimerCycle = 125000 / (LastTime - CurTime); // dutyCycle = TimerCycle/800; // dutyCycle= LastTime-CurTime/400; } } #pragma CODE_SEG DEFAULT */