<<Reserved symbol>>
RLT[0-3/16-17]

<<RLTx_DMACFG>>
RLT[0-3/16-17]_DMACFG
RLT[0-3/16-17]_DMACFG_ENDMAUF

<<RLTx_TMCSR>>
RLT[0-3/16-17]_TMCSR
RLT[0-3/16-17]_TMCSR_INTE
RLT[0-3/16-17]_TMCSR_RELD
RLT[0-3/16-17]_TMCSR_OUTL
RLT[0-3/16-17]_TMCSR_DBGE
RLT[0-3/16-17]_TMCSR_NFE
RLT[0-3/16-17]_TMCSR_CSL
RLT[0-3/16-17]_TMCSR_MOD
RLT[0-3/16-17]_TMCSR_UF
RLT[0-3/16-17]_TMCSR_UFCLR
RLT[0-3/16-17]_TMCSR_TRG
RLT[0-3/16-17]_TMCSR_CNTE

<<RLTx_TMRLR>>
RLT[0-3/16-17]_TMRLR
RLT[0-3/16-17]_TMRLR_TMRLR

<<RLTx_TMR>>
RLT[0-3/16-17]_TMR
RLT[0-3/16-17]_TMR_TMR

<<Reserved symbol>>
RLT[0-1]

<<RLTx_TSEL>>
RLT[0-1]_TSEL
RLT[0-1]_TSEL_TSEL0
RLT[0-1]_TSEL_TSEL1
RLT[0-1]_TSEL_TSEL2
RLT[0-1]_TSEL_TSEL3
RLT[0-1]_TSEL_TSEL4
RLT[0-1]_TSEL_TSEL5
RLT[0-1]_TSEL_TSEL6
RLT[0-1]_TSEL_TSEL7
RLT[0-1]_TSEL_TSEL8
RLT[0-1]_TSEL_TSEL9
RLT[0-1]_TSEL_TSEL10
RLT[0-1]_TSEL_TSEL11
RLT[0-1]_TSEL_TSEL12
RLT[0-1]_TSEL_TSEL13
RLT[0-1]_TSEL_TSEL14
RLT[0-1]_TSEL_TSEL15

<<RLTx_SSSR>>
RLT[0-1]_SSSR
RLT[0-1]_SSSR_SSSR

