;************************************************************************
;*                                                                      *
;*  assembler definitions for enabling nested interrupts                *
;*                                                                      *
;************************************************************************

;************************************************************************
;* 1  Disclaimer                                                        *
;************************************************************************
;* __DISCLAIMER_START__                                                 *
;************************************************************************
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;************************************************************************
;* __DISCLAIMER_END__                                                   *
;************************************************************************

/************************************************************************/
/* 5.2  Import symbols                                                  */
/************************************************************************/


        EXTERN DefaultDataAbortExceptionIsr

/************************************************************************/
/* 5.3  Export symbols                                                  */
/************************************************************************/

        PUBLIC DefaultDataAbortExceptionHandler

/************************************************************************/
/* 5.4  Declare sections                                                */
/************************************************************************/

        SECTION .text:CODE:ROOT(2)
        ARM
    //.text       ;* Declare code section. (Change section if you need.)
    //.nothumb    ;* use ARM mode.

   // .export     DefaultDataAbortExceptionHandler
   // .import     DefaultDataAbortExceptionIsr

DefaultDataAbortExceptionHandler:
    //add by zhangxuesong
    
    ;* 쀡둖뵯맯귺긤깒긚궸뽣귡뤾뜃
    ; SUB         lr, lr, #8

    ;* 쀡둖뵯맯귺긤깒긚궻렅궻뼺쀟궸뽣귡뤾뜃
    SUB         lr, lr, #4
    STMDB       sp!,{r0-r3, r12,lr}     ;* Store remaining AAPCS register on system stack

    ;* Call interrupt service routine
    LDR         r0, =DefaultDataAbortExceptionIsr
    BLX         r0

    LDMIA       sp!,{r0-r3, r12, pc}^   ;* Restore AAPCS register and CPSR
    
    //BX lr ;
    //end by zhangxuesong
/************************************************************************/
/* 8  File end                                                          */
/************************************************************************/

        END

