debug_sysram.mac

clearSysram()
{
__var sAddr;
  __message "Initializing System RAM (384kB)...";
  sAddr = 0x04000000; // TCRAM AXI Interface
  __writeMemory32(0x88000000, 0xB4701000, "Memory"); // DMA0_R.DE = 1, DMA0_R.PR = 1 - DMA Enable, DMA Priority - Dynamic
  while(sAddr < 0x04000080) // Fill 128 bytes with zeroes
  {
    __writeMemory32(0x00000000, sAddr, "Memory");
    sAddr += 4;
  }
  __writeMemory32(0x04000000, 0xB4700008, "Memory"); // DMA0_SA0 = 0x04000000
  __writeMemory32(0x02000000, 0xB470000C, "Memory"); // DMA0_DA0 = 0x02000000
  __writeMemory32(0x03F001FF, 0xB4700000, "Memory"); // DMA0_A0.BL = 3, BC = 15, TC = 511
  __writeMemory32(0x1C00B301, 0xB4700004, "Memory"); // DMA0_B0.PN = 1, DP = 3, SP = 0xB, MS = 1, TW = 3
  __writeMemory32(0x00000001, 0xB4700010, "Memory"); // DMA0_C0.CD = 1
  __writeMemory8(0x00,        0xB4700015, "Memory"); // DMA0_D0 (byte 1)
  __writeMemory8(0x10,        0xB4700017, "Memory"); // DMA0_D0.FBS = 1 (byte3)
  __writeMemory32(0x83FF01FF, 0xB4700000, "Memory"); // DMA0_A0.BL = 3, BC = 15, TC = 511, EB = 1
  __writeMemory32(0xA3FF01FF, 0xB4700000, "Memory"); // DMA0_A0.BL = 3, BC = 15, TC = 511, EB = 1, ST = 1
}

configureSysram()
{
  __writeMemory32(0x5ECC551F, 0xB010800C, "Memory"); // SRCFG_UNLOCK Unlock Key
  while(__readMemory32(0xB0108000, "Memory") & 0x00000100){} // wait to unlock
  __writeMemory32(0x03030000, 0xB0108000, "Memory"); // SRCFG_CFG0 RDWAIT = 3, WRWAIT = 3
  __writeMemory32(0x551FB10C, 0xB010800C, "Memory"); // SRCFG_UNLOCK Lock Key
  while(!(__readMemory32(0xB0108000, "Memory") & 0x00000100)){} // wait to lock
}

waitSysramClear()
{
__var res;
__var dirq;
__var edirq;

  while(!(res = __readMemory32(0xB4700004, "Memory") & 0xC0000000)){} // wait DMA0_B0.DQ or EQ
  if (res & 0x40000000)
  {
   __message "DMA initialization of System RAM completed with an error!!!";
   dirq = __readMemory32(0xB4701004, "Memory");
   edirq = __readMemory32(0xB470100C, "Memory");
   __message "DMA_B0:",res:%x;
   __message "DMA_DIRQ:",dirq:%x;
   __message "DMA_EDIRQ:",edirq:%x;
  }
  __writeMemory32(0x00000011, 0xB4700010, "Memory"); // DMA0_C0.CD = 1, ED = 1
  __writeMemory32(0x000F0000, 0xB4700000, "Memory"); // DMA0_A0 disable channel
  __writeMemory32(0x00000000, 0xB4701000, "Memory"); // DMA0_R = 0 disable DMA
}

disableMPUandCaches()
{
__var Reg;
  __message("Disabling MPU and Caches...");
  // Disable MPU, I and D caches
  Reg = __jtagCP15ReadReg(1, 0, 0, 0);
  Reg &= ~((1<<12) | (1<<2) | (1<<1));
  __jtagCP15WriteReg(1, 0, 0, 0, Reg);
  // Disable ECC cache
  Reg = __jtagCP15ReadReg(1, 0, 0, 1);
  Reg &= 0xFFFFFFC7; // Clear bits 5:3
  Reg |= (0x4 << 3);
  __jtagCP15WriteReg(1, 0, 0, 1, Reg);
}

configureWatchdog()
{
  if(!(__readMemory32(0xB060C048, "Memory") & 0x01000000))  // HWDG_CFG.LOCK == 0
  {
    __writeMemory32(0xEDACCE55, 0xB060C000, "Memory"); // HWDG_PROT unlock key
    __writeMemory32(0x00000000, 0xB060C02C, "Memory"); // HWDG_TRG0CFG = 0
    __writeMemory32(0xEDACCE55, 0xB060C000, "Memory"); // HWDG_PROT unlock key
    __writeMemory32(0x00000000, 0xB060C030, "Memory"); // HWDG_TRG1CFG = 0
    __writeMemory32(0xEDACCE55, 0xB060C000, "Memory"); // HWDG_PROT unlock key
    __writeMemory32(0x00000000, 0xB060C034, "Memory"); // HWDG_RUNLLS = 0
    __writeMemory32(0xEDACCE55, 0xB060C000, "Memory"); // HWDG_PROT unlock key
    __writeMemory32(0x01000000, 0xB060C038, "Memory"); // HWDG_RUNULS = 0x01000000
    __writeMemory32(0xEDACCE55, 0xB060C000, "Memory"); // HWDG_PROT unlock key
    __writeMemory32(0x01000005, 0xB060C048, "Memory"); // HWDG_CFG, LOCK = 1, WDEN = 1, ALLOWSTOPCLK = 1
  }
}

setup()
{
  disableMPUandCaches();
  configureSysram();
  clearSysram();
  waitSysramClear();
  configureWatchdog();
}

execUserPreload()
{
  setup();
}