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/******************************************************************************
* $Revision: 414 $
* $Date: 2015-03-27 15:15:51 +0900$
*****************************************************************************/
/* __DISCLAIMER_START__ */
/******************************************************************************
* (c) 2014-2016, Cypress Semiconductor Corporation
* or a subsidiary of Cypress Semiconductor Corporation. All rights
* reserved.
*
* This software, including source code, documentation and related
* materials ( "Software" ), is owned by Cypress Semiconductor
* Corporation or one of its subsidiaries ( "Cypress" ) and is protected by
* and subject to worldwide patent protection (United States and foreign),
* United States copyright laws and international treaty provisions.
* Therefore, you may use this Software only as provided in the license
* agreement accompanying the software package from which you
* obtained this Software ( "EULA" ).
*
* If no EULA applies, Cypress hereby grants you a personal, nonexclusive,
* non-transferable license to copy, modify, and compile the
* Software source code solely for use in connection with Cypress' s
* integrated circuit products. Any reproduction, modification, translation,
* compilation, or representation of this Software except as specified
* above is prohibited without the express written permission of Cypress.
*
* Disclaimer: THIS SOFTWARE IS PROVIDED AS-IS, WITH NO
* WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING,
* BUT NOT LIMITED TO, NONINFRINGEMENT, IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
* PARTICULAR PURPOSE. Cypress reserves the right to make
* changes to the Software without notice. Cypress does not assume any
* liability arising out of the application or use of the Software or any
* product or circuit described in the Software. Cypress does not
* authorize its products for use in any products where a malfunction or
* failure of the Cypress product may reasonably be expected to result in
* significant property damage, injury or death ( "High Risk Product" ). By
* including Cypress' s product in a High Risk Product, the manufacturer
* of such system or application assumes all risk of such use and in doing
* so agrees to indemnify Cypress against all liability.
******************************************************************************/
/* __DISCLAIMER_END__ */
/*****************************************************************************/
/** \file debug_sysram.icf
**
**
** History:
** - 2016-09-26 0.01 WO Initial version for Traveo
*****************************************************************************/
//
// for S6J3400
//
/* Memory area start addresses */
define symbol start_addr_tcmram_private = 0x00000000;
define symbol start_addr_tcflash_private_small_0_tcm = 0x009F0000;
define symbol start_addr_tcflash_private_small_1_7_tcm = 0x009F2000;
define symbol start_addr_tcflash_private_big_tcm = 0x00A00000;
define symbol start_addr_tcflash_private_small_0_axi = 0x019F0000;
define symbol start_addr_tcflash_private_small_1_7_axi = 0x019F2000;
define symbol start_addr_tcflash_private_big_axi = 0x01A00000;
define symbol start_addr_sysram = 0x02000000;
define symbol start_addr_tcmram_public_core0 = 0x04000000;
define symbol start_addr_tcflash_public_core0_small_0_axi = 0x059F0000;
define symbol start_addr_tcflash_public_core0_small_1_7_axi = 0x059F2000;
define symbol start_addr_tcflash_public_core0_big_axi = 0x05A00000;
define symbol start_addr_workflash_mirror1 = 0x0E000000;
define symbol start_addr_workflash_mirror3 = 0x0E200000;
define symbol start_addr_workflash_mirror4 = 0x0E300000;
define symbol start_addr_sysram_mirror = 0x0E800000;
/* Memory area sizes */
define symbol size_tcmram = 0x00010000; // 64 KB
define symbol size_tcflash_small_0 = 0x00002000; // 8 KB (Flash Marker)
define symbol size_tcflash_small_1_7 = 0x0000E000; // 56 KB
define symbol size_tcflash_big = 0x00100000; // 1024 KB
define symbol size_sysram = 0x00010000; // 64 KB
define symbol size_workflash_mirror1 = 0x0001C000; // 112 KB
define symbol size_workflash_mirror3 = 0x0001C000; // 112 KB
define symbol size_workflash_mirror4 = 0x0001C000; // 112 KB
/* Heap & stack sizes */
define symbol heap_reserve = 0x200;
define symbol usr_stack_size = 0xA00;
define symbol svc_stack_size = 0x80;
define symbol irq_stack_size = 0x100;
define symbol fiq_stack_size = 0x80;
define symbol und_stack_size = 0x80;
define symbol abt_stack_size = 0x80;
/* Memory definition */
define memory mem with size = 4G;
/* Region definitions */
/* Areas with "private" in the name are only accessible by the CPU core for which this linker file is intended.*/
/* Mirror areas with "public" in the name exist which are accessible by all masters (e.g. DMA, GFX subsystem) */
/* in the MCU and have unique addresses per CPU core */
define region tcmram_private = mem:[from start_addr_tcmram_private size size_tcmram ];
define region tcflash_private_small_0_tcm = mem:[from start_addr_tcflash_private_small_0_tcm size size_tcflash_small_0 ];
define region tcflash_private_small_1_7_tcm = mem:[from start_addr_tcflash_private_small_1_7_tcm size size_tcflash_small_1_7 ];
define region tcflash_private_big_tcm = mem:[from start_addr_tcflash_private_big_tcm size size_tcflash_big ];
define region tcflash_private_small_0_axi = mem:[from start_addr_tcflash_private_small_0_axi size size_tcflash_small_0 ];
define region tcflash_private_small_1_7_axi = mem:[from start_addr_tcflash_private_small_1_7_axi size size_tcflash_small_1_7 ];
define region tcflash_private_big_axi = mem:[from start_addr_tcflash_private_big_axi size size_tcflash_big ];
define region sysram = mem:[from start_addr_sysram size size_sysram ];
define region tcmram_public_core0 = mem:[from start_addr_tcmram_public_core0 size size_tcmram ];
define region tcflash_public_core0_small_0_axi = mem:[from start_addr_tcflash_public_core0_small_0_axi size size_tcflash_small_0 ];
define region tcflash_public_core0_small_1_7_axi = mem:[from start_addr_tcflash_public_core0_small_1_7_axi size size_tcflash_small_1_7 ];
define region tcflash_public_core0_big_axi = mem:[from start_addr_tcflash_public_core0_big_axi size size_tcflash_big ];
define region workflash_mirror1 = mem:[from start_addr_workflash_mirror1 size size_workflash_mirror1 ];
define region workflash_mirror3 = mem:[from start_addr_workflash_mirror3 size size_workflash_mirror3 ];
define region workflash_mirror4 = mem:[from start_addr_workflash_mirror4 size size_workflash_mirror4 ];
define region sysram_mirror = mem:[from start_addr_sysram_mirror size size_sysram ];
/* Memory block definition */
define block HEAP with alignment = 16, size = heap_reserve { };
define block USR_STACK with alignment = 16, size = usr_stack_size { };
define block SVC_STACK with alignment = 16, size = svc_stack_size { };
define block IRQ_STACK with alignment = 16, size = irq_stack_size { };
define block FIQ_STACK with alignment = 16, size = fiq_stack_size { };
define block UND_STACK with alignment = 16, size = und_stack_size { };
define block ABT_STACK with alignment = 16, size = abt_stack_size { };
define block FLASH_MARKER with alignment = 1, fixed order {
section .MK,
section .DDR,
section .BDR,
section .WDR,
};
// Content for TCMRAM is defined with fixed order here, so that no static variables will be
// linked to address 0 (which could lead false positive SW errors due to NULL pointer checks)
define block TCMRAM_CONTENT with alignment = 16, fixed order {
block USR_STACK,
block FIQ_STACK,
block IRQ_STACK,
block SVC_STACK,
block ABT_STACK,
block UND_STACK,
block HEAP,
readwrite,
};
/* Init handling directives */
initialize by copy {
readwrite,
};
do not initialize {
section .noinit,
section .bss, // Zero-Init of .bss done by DMA during start-up
};
/* Section/block assignment */
"Default Program Entry":
place at start of sysram { section .BOOTSTART };
"SYSRAM Content":
place in sysram {
readonly,
block FLASH_MARKER, // dummy sections
};
"TCMRAM Content":
place in tcmram_private {
block TCMRAM_CONTENT
};