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🎉 init:删除无用代码-utility里的inc和src文件

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utility/MCU_Cfg/inc/AW93015.h deleted 100644 → 0
View file @ 69806d87
#ifndef __SOUND_IIC_H__
#define __SOUND_IIC_H__
/** SWDG *********************************************************************/
#define MAX_NUM 30
typedef void (*aw9310x_irq_init_t)(void(*)(void));
typedef struct {
uint16_t Value_Filter[MAX_NUM];
uint16_t MaxValue;
uint16_t MinValue;
uint16_t CurValue;
uint16_t AveValue;
uint32_t CumulativeSum;
uint8_t MaxValuePtr;
uint8_t MinValuePtr;
}PD_VALUE_FILTER_PARA;
extern PD_VALUE_FILTER_PARA PD1_Value;
extern PD_VALUE_FILTER_PARA PD2_Value;
extern void Init93015_IIC(void);
uint8_t GET_Key_Prosess(void);
#endif /* __SOUND_IIC_H__ */
utility/MCU_Cfg/inc/Analog_Circuits.h deleted 100644 → 0
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utility/MCU_Cfg/inc/Analog_Signals.h deleted 100644 → 0
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/**************************************************************************//**
* \file Analog_Signals.h
* \brief Analog signal processing
* \attention
*
* This file is automatically generated by analog signals configuration tool.
* Date : 2023/9/23 14:09:24
* Cfg Tool Ver : 1.1.0
* Engineer : LQY
* (c) Heilongjiang TYW electronics co., LTD
*
******************************************************************************/
#ifndef ANALOG_SIGNALS_H__
#define ANALOG_SIGNALS_H__
/* Includes -----------------------------------------------------------------*/
#include "ADC.h"
#include "Analog_Circuits.h"
/* C binding of definitions if building with C++ compiler */
#ifdef __cplusplus
extern {
#endif
/*! @{ */
/* Exported types ------------------------------------------------------------*/
enum ADCChName
{
ADC_CH_KL30_VOLTAGE = 0,
ADC_CH_KL15_VOLTAGE,
ADC_CH_FUEL_VREF,
ADC_CH_FUEL1,
};
/* Exported macro ------------------------------------------------------------*/
#define ADC_TOTAL_CH_NUMBER (4U)
#define ADC_SIGNAL_CH_NUMBER (4U)
#define ADC_REF_VOLTAGE u16ADCRefVoltage
/* Exported variables --------------------------------------------------------*/
extern volatile uint16_t u16ADCRefVoltage;
extern const uint8_t u8ADCChList[];
/* Exported functions --------------------------------------------------------*/
extern void Analog_Signal_Conv_Init(void);
extern void Analog_Signal_Conv_Stop(void);
extern void Analog_Signal_Conv_Service(void);
extern uint16_t ADC_Read_Signal(uint8_t u8ADCCh);
extern uint8_t ADC_Read_Signal_Valid(uint8_t u8ADCCh);
extern uint16_t ADC_Conv_Single_Channel(uint8_t u8ADCCh);
/*! @} */
#ifdef __cplusplus
}
#endif
#endif /* ANALOG_SIGNALS_H__ */
utility/MCU_Cfg/inc/BU98R10.H deleted 100644 → 0
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utility/MCU_Cfg/inc/Emulated_EEPROM.h deleted 100644 → 0
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#ifndef EMULATED_EEPROM_H__
#define EMULATED_EEPROM_H__
typedef enum
{
EEPROM_STAT_BLANK = 0U,
EEPROM_STAT_ACTIVE,
EEPROM_STAT_ERROR,
}EEPROM_Block_Status_en_t;
typedef enum
{
EEPROM_RW_PASS = 0,
EEPROM_RW_FAIL,
}EEPROM_RW_Result_en_t;
typedef enum
{
EEPROM_STAT_IDLE = 0,
EEPROM_STAT_BUSY,
}EEPROM_Status_en_t;
/****************************************************************************
* !!! The following code should be generated by configuration tool !!! *
****************************************************************************/
enum g_enEEPROMBlockName
{
EEPROM_BLOCK_UDS_FLAG = 0U,
EEPROM_BLOCK_UDS_S27 = 1U,
EEPROM_BLOCK_UDS_S2E0 = 2U,
EEPROM_BLOCK_UDS_S2E = 3U,
EEPROM_BLOCK_UDS_CONFIG = 4U,
EEPROM_BLOCK_UDS_DTC = 5U,
EEPROM_BLOCK_ODO = 6U,
EEPROM_BLOCK_ODO_STAMP = 7U,
EEPROM_BLOCK_TRIP_STAMP = 8U,
EEPROM_BLOCK_SERVICE_INFO = 9U,
EEPROM_BLOCK_UE_INFO = 10U,
};
#define EEPROM_BLOCK_UDS_FLAG_SIZE (16U)/*Life:20.0W*/
#define EEPROM_BLOCK_UDS_S27_SIZE (16U)/*Life:20.0W*/
#define EEPROM_BLOCK_UDS_S2E0_SIZE (216U)/*Life:20.0W*/
#define EEPROM_BLOCK_UDS_S2E_SIZE (216U)/*Life:20.0W*/
#define EEPROM_BLOCK_UDS_CONFIG_SIZE (40U)/*Life:20.0W*/
#define EEPROM_BLOCK_UDS_DTC_SIZE (76U)/*Life:20.0W*/
#define EEPROM_BLOCK_ODO_SIZE (4U)/*Life:1000.0W*/
#define EEPROM_BLOCK_ODO_STAMP_SIZE (8U)/*Life:1000.0W*/
#define EEPROM_BLOCK_TRIP_STAMP_SIZE (16U)/*Life:1000.0W*/
#define EEPROM_BLOCK_SERVICE_INFO_SIZE (56U)/*Life:20.0W*/
#define EEPROM_BLOCK_UE_INFO_SIZE (124U)/*Life:100.0W*/
#define EEPROM_TOTAL_BLOCK_NUM (11U)
/****************************************************************************
* !!! End of code generation !!! *
****************************************************************************/
extern void EEPROM_Init(void);
extern EEPROM_Status_en_t EEPROM_Get_Status(void);
extern EEPROM_Block_Status_en_t EEPROM_Get_Block_Status(uint16_t u16BlockID);
extern EEPROM_RW_Result_en_t EEPROM_Read_Data(uint16_t u16BlockID, uint32_t u32Data[], uint16_t u16Len);
extern EEPROM_RW_Result_en_t EEPROM_Write_Data(uint16_t u16BlockID, uint32_t u32Data[], uint16_t u16Len);
#endif
utility/MCU_Cfg/inc/Emulated_EEPROM_Access.h deleted 100644 → 0
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#ifndef EMULATED_EEPROM_ACCESS_H__
#define EMULATED_EEPROM_ACCESS_H__
typedef struct
{
uint32_t u32StartAddr;
uint32_t u32EndAddr;
uint32_t u32DataSize;
uint32_t* pu32DataBuffer;
}EEPROM_Block_st_t;
typedef struct
{
uint8_t u8Status;
uint8_t u8SectorOffset;
uint16_t u16SectorSize;
uint32_t u32BaseAddr;
uint16_t u16Index;
uint16_t u16RecordNum;
uint16_t u16MaxRecordNum;
uint16_t u16BlockSize;
uint32_t* pu32Data;
}EEPROM_Block_Access_st_t;
typedef void (*EEPROM_Mem_Erase_Func_ptr_t) (uint32_t, uint32_t);
typedef uint32_t (*EEPROM_Mem_Blank_Chk_Func_ptr_t) (uint32_t, uint32_t);
typedef void (*EEPROM_Mem_Read_Func_ptr_t) (uint32_t, uint32_t*, uint32_t);
typedef void (*EEPROM_Mem_Write_Func_ptr_t) (uint32_t, uint32_t*, uint32_t);
typedef struct
{
EEPROM_Mem_Erase_Func_ptr_t pfnMemErase;
EEPROM_Mem_Blank_Chk_Func_ptr_t pfnMemBlankChk;
EEPROM_Mem_Read_Func_ptr_t pfnMemRead;
EEPROM_Mem_Write_Func_ptr_t pfnMemWrite;
}EEPROM_Media_Access_st_t;
#define EEPROM_BLOCK_BLANK (0U)
#define EEPROM_BLOCK_ACTIVE (1U)
#define EEPROM_BLOCK_ERROR (2U)
#define EEPROM_BLOCK_CTRL_BYTE_SIZE (8U)
extern void EEPROM_Access_Init(const EEPROM_Block_st_t * pstBlockTable,
EEPROM_Block_Access_st_t * pstBlockAccess,
EEPROM_Media_Access_st_t * pstMediaAccess,
uint16_t u16BlockNum);
extern uint8_t EEPROM_Access_Busy(void);
extern uint8_t EEPROM_Block_Access_Status(uint16_t u16BlockID);
extern uint8_t EEPROM_Read_Block_Data(uint16_t u16BlockID, uint32_t u32Data[], uint16_t u16Len);
extern uint8_t EEPROM_Write_Block_Data(uint16_t u16BlockID, uint32_t u32Data[], uint16_t u16Len);
extern void EEPROM_Mem_Access_Complete_Callback(void);
#endif
utility/MCU_Cfg/inc/IS31FL3236.h deleted 100644 → 0
View file @ 69806d87
#include "common.h"
#ifdef GLOBALS_IS31FL3236
#define EXTERN_IS31FL3236
#else
#define EXTERN_IS31FL3236 extern
#endif
#ifndef IS31FL3236_H__
#define IS31FL3236_H__
/*-------------------------------------------------------------------------------------------*/
#define IS31_CHIP_NUM 1U
#define IS31_CHIP1_ADDRESS 0X78U
#define IS31_CHIP2_ADDRESS 0X7EU
#define IS31_CHIP3_ADDRESS 0X7AU
#define IS31_CHIP4_ADDRESS 0X7CU
/*-------------------------------------------------------------------------------------------*/
#define IS31_CHANNEL_NUM 36U
extern uint8_t u8IS31Data[IS31_CHIP_NUM][IS31_CHANNEL_NUM];
extern uint8_t LedUpdateDeviceFlg;
/*-------------------------------------------------------------------------*/
#if (IS31_CHIP_NUM >= 1U)
#define IS31_CHIP0_CHANNEL01 u8IS31Data[0U][0U]
#define IS31_CHIP0_CHANNEL02 u8IS31Data[0U][1U]
#define IS31_CHIP0_CHANNEL03 u8IS31Data[0U][2U]
#define IS31_CHIP0_CHANNEL04 u8IS31Data[0U][3U]
#define IS31_CHIP0_CHANNEL05 u8IS31Data[0U][4U]
#define IS31_CHIP0_CHANNEL06 u8IS31Data[0U][5U]
#define IS31_CHIP0_CHANNEL07 u8IS31Data[0U][6U]
#define IS31_CHIP0_CHANNEL08 u8IS31Data[0U][7U]
#define IS31_CHIP0_CHANNEL09 u8IS31Data[0U][8U]
#define IS31_CHIP0_CHANNEL10 u8IS31Data[0U][9U]
#define IS31_CHIP0_CHANNEL11 u8IS31Data[0U][10U]
#define IS31_CHIP0_CHANNEL12 u8IS31Data[0U][11U]
#define IS31_CHIP0_CHANNEL13 u8IS31Data[0U][12U]
#define IS31_CHIP0_CHANNEL14 u8IS31Data[0U][13U]
#define IS31_CHIP0_CHANNEL15 u8IS31Data[0U][14U]
#define IS31_CHIP0_CHANNEL16 u8IS31Data[0U][15U]
#define IS31_CHIP0_CHANNEL17 u8IS31Data[0U][16U]
#define IS31_CHIP0_CHANNEL18 u8IS31Data[0U][17U]
#define IS31_CHIP0_CHANNEL19 u8IS31Data[0U][18U]
#define IS31_CHIP0_CHANNEL20 u8IS31Data[0U][19U]
#define IS31_CHIP0_CHANNEL21 u8IS31Data[0U][20U]
#define IS31_CHIP0_CHANNEL22 u8IS31Data[0U][21U]
#define IS31_CHIP0_CHANNEL23 u8IS31Data[0U][22U]
#define IS31_CHIP0_CHANNEL24 u8IS31Data[0U][23U]
#define IS31_CHIP0_CHANNEL25 u8IS31Data[0U][24U]
#define IS31_CHIP0_CHANNEL26 u8IS31Data[0U][25U]
#define IS31_CHIP0_CHANNEL27 u8IS31Data[0U][26U]
#define IS31_CHIP0_CHANNEL28 u8IS31Data[0U][27U]
#define IS31_CHIP0_CHANNEL29 u8IS31Data[0U][28U]
#define IS31_CHIP0_CHANNEL30 u8IS31Data[0U][29U]
#define IS31_CHIP0_CHANNEL31 u8IS31Data[0U][30U]
#define IS31_CHIP0_CHANNEL32 u8IS31Data[0U][31U]
#define IS31_CHIP0_CHANNEL33 u8IS31Data[0U][32U]
#define IS31_CHIP0_CHANNEL34 u8IS31Data[0U][33U]
#define IS31_CHIP0_CHANNEL35 u8IS31Data[0U][34U]
#define IS31_CHIP0_CHANNEL36 u8IS31Data[0U][35U]
#endif
#if (IS31_CHIP_NUM >= 2U)
#define IS31_CHIP1_CHANNEL01 u8IS31Data[1U][0U]
#define IS31_CHIP1_CHANNEL02 u8IS31Data[1U][1U]
#define IS31_CHIP1_CHANNEL03 u8IS31Data[1U][2U]
#define IS31_CHIP1_CHANNEL04 u8IS31Data[1U][3U]
#define IS31_CHIP1_CHANNEL05 u8IS31Data[1U][4U]
#define IS31_CHIP1_CHANNEL06 u8IS31Data[1U][5U]
#define IS31_CHIP1_CHANNEL07 u8IS31Data[1U][6U]
#define IS31_CHIP1_CHANNEL08 u8IS31Data[1U][7U]
#define IS31_CHIP1_CHANNEL09 u8IS31Data[1U][8U]
#define IS31_CHIP1_CHANNEL10 u8IS31Data[1U][9U]
#define IS31_CHIP1_CHANNEL11 u8IS31Data[1U][10U]
#define IS31_CHIP1_CHANNEL12 u8IS31Data[1U][11U]
#define IS31_CHIP1_CHANNEL13 u8IS31Data[1U][12U]
#define IS31_CHIP1_CHANNEL14 u8IS31Data[1U][13U]
#define IS31_CHIP1_CHANNEL15 u8IS31Data[1U][14U]
#define IS31_CHIP1_CHANNEL16 u8IS31Data[1U][15U]
#define IS31_CHIP1_CHANNEL17 u8IS31Data[1U][16U]
#define IS31_CHIP1_CHANNEL18 u8IS31Data[1U][17U]
#define IS31_CHIP1_CHANNEL19 u8IS31Data[1U][18U]
#define IS31_CHIP1_CHANNEL20 u8IS31Data[1U][19U]
#define IS31_CHIP1_CHANNEL21 u8IS31Data[1U][20U]
#define IS31_CHIP1_CHANNEL22 u8IS31Data[1U][21U]
#define IS31_CHIP1_CHANNEL23 u8IS31Data[1U][22U]
#define IS31_CHIP1_CHANNEL24 u8IS31Data[1U][23U]
#define IS31_CHIP1_CHANNEL25 u8IS31Data[1U][24U]
#define IS31_CHIP1_CHANNEL26 u8IS31Data[1U][25U]
#define IS31_CHIP1_CHANNEL27 u8IS31Data[1U][26U]
#define IS31_CHIP1_CHANNEL28 u8IS31Data[1U][27U]
#define IS31_CHIP1_CHANNEL29 u8IS31Data[1U][28U]
#define IS31_CHIP1_CHANNEL30 u8IS31Data[1U][29U]
#define IS31_CHIP1_CHANNEL31 u8IS31Data[1U][30U]
#define IS31_CHIP1_CHANNEL32 u8IS31Data[1U][31U]
#define IS31_CHIP1_CHANNEL33 u8IS31Data[1U][32U]
#define IS31_CHIP1_CHANNEL34 u8IS31Data[1U][33U]
#define IS31_CHIP1_CHANNEL35 u8IS31Data[1U][34U]
#define IS31_CHIP1_CHANNEL36 u8IS31Data[1U][35U]
#endif
#if (IS31_CHIP_NUM >= 3U)
#define IS31_CHIP2_CHANNEL01 u8IS31Data[2U][0U]
#define IS31_CHIP2_CHANNEL02 u8IS31Data[2U][1U]
#define IS31_CHIP2_CHANNEL03 u8IS31Data[2U][2U]
#define IS31_CHIP2_CHANNEL04 u8IS31Data[2U][3U]
#define IS31_CHIP2_CHANNEL05 u8IS31Data[2U][4U]
#define IS31_CHIP2_CHANNEL06 u8IS31Data[2U][5U]
#define IS31_CHIP2_CHANNEL07 u8IS31Data[2U][6U]
#define IS31_CHIP2_CHANNEL08 u8IS31Data[2U][7U]
#define IS31_CHIP2_CHANNEL09 u8IS31Data[2U][8U]
#define IS31_CHIP2_CHANNEL10 u8IS31Data[2U][9U]
#define IS31_CHIP2_CHANNEL11 u8IS31Data[2U][10U]
#define IS31_CHIP2_CHANNEL12 u8IS31Data[2U][11U]
#define IS31_CHIP2_CHANNEL13 u8IS31Data[2U][12U]
#define IS31_CHIP2_CHANNEL14 u8IS31Data[2U][13U]
#define IS31_CHIP2_CHANNEL15 u8IS31Data[2U][14U]
#define IS31_CHIP2_CHANNEL16 u8IS31Data[2U][15U]
#define IS31_CHIP2_CHANNEL17 u8IS31Data[2U][16U]
#define IS31_CHIP2_CHANNEL18 u8IS31Data[2U][17U]
#define IS31_CHIP2_CHANNEL19 u8IS31Data[2U][18U]
#define IS31_CHIP2_CHANNEL20 u8IS31Data[2U][19U]
#define IS31_CHIP2_CHANNEL21 u8IS31Data[2U][20U]
#define IS31_CHIP2_CHANNEL22 u8IS31Data[2U][21U]
#define IS31_CHIP2_CHANNEL23 u8IS31Data[2U][22U]
#define IS31_CHIP2_CHANNEL24 u8IS31Data[2U][23U]
#define IS31_CHIP2_CHANNEL25 u8IS31Data[2U][24U]
#define IS31_CHIP2_CHANNEL26 u8IS31Data[2U][25U]
#define IS31_CHIP2_CHANNEL27 u8IS31Data[2U][26U]
#define IS31_CHIP2_CHANNEL28 u8IS31Data[2U][27U]
#define IS31_CHIP2_CHANNEL29 u8IS31Data[2U][28U]
#define IS31_CHIP2_CHANNEL30 u8IS31Data[2U][29U]
#define IS31_CHIP2_CHANNEL31 u8IS31Data[2U][30U]
#define IS31_CHIP2_CHANNEL32 u8IS31Data[2U][31U]
#define IS31_CHIP2_CHANNEL33 u8IS31Data[2U][32U]
#define IS31_CHIP2_CHANNEL34 u8IS31Data[2U][33U]
#define IS31_CHIP2_CHANNEL35 u8IS31Data[2U][34U]
#define IS31_CHIP2_CHANNEL36 u8IS31Data[2U][35U]
#endif
#if (IS31_CHIP_NUM >= 4U)
#define IS31_CHIP3_CHANNEL01 u8IS31Data[3U][0U]
#define IS31_CHIP3_CHANNEL02 u8IS31Data[3U][1U]
#define IS31_CHIP3_CHANNEL03 u8IS31Data[3U][2U]
#define IS31_CHIP3_CHANNEL04 u8IS31Data[3U][3U]
#define IS31_CHIP3_CHANNEL05 u8IS31Data[3U][4U]
#define IS31_CHIP3_CHANNEL06 u8IS31Data[3U][5U]
#define IS31_CHIP3_CHANNEL07 u8IS31Data[3U][6U]
#define IS31_CHIP3_CHANNEL08 u8IS31Data[3U][7U]
#define IS31_CHIP3_CHANNEL09 u8IS31Data[3U][8U]
#define IS31_CHIP3_CHANNEL10 u8IS31Data[3U][9U]
#define IS31_CHIP3_CHANNEL11 u8IS31Data[3U][10U]
#define IS31_CHIP3_CHANNEL12 u8IS31Data[3U][11U]
#define IS31_CHIP3_CHANNEL13 u8IS31Data[3U][12U]
#define IS31_CHIP3_CHANNEL14 u8IS31Data[3U][13U]
#define IS31_CHIP3_CHANNEL15 u8IS31Data[3U][14U]
#define IS31_CHIP3_CHANNEL16 u8IS31Data[3U][15U]
#define IS31_CHIP3_CHANNEL17 u8IS31Data[3U][16U]
#define IS31_CHIP3_CHANNEL18 u8IS31Data[3U][17U]
#define IS31_CHIP3_CHANNEL19 u8IS31Data[3U][18U]
#define IS31_CHIP3_CHANNEL20 u8IS31Data[3U][19U]
#define IS31_CHIP3_CHANNEL21 u8IS31Data[3U][20U]
#define IS31_CHIP3_CHANNEL22 u8IS31Data[3U][21U]
#define IS31_CHIP3_CHANNEL23 u8IS31Data[3U][22U]
#define IS31_CHIP3_CHANNEL24 u8IS31Data[3U][23U]
#define IS31_CHIP3_CHANNEL25 u8IS31Data[3U][24U]
#define IS31_CHIP3_CHANNEL26 u8IS31Data[3U][25U]
#define IS31_CHIP3_CHANNEL27 u8IS31Data[3U][26U]
#define IS31_CHIP3_CHANNEL28 u8IS31Data[3U][27U]
#define IS31_CHIP3_CHANNEL29 u8IS31Data[3U][28U]
#define IS31_CHIP3_CHANNEL30 u8IS31Data[3U][29U]
#define IS31_CHIP3_CHANNEL31 u8IS31Data[3U][30U]
#define IS31_CHIP3_CHANNEL32 u8IS31Data[3U][31U]
#define IS31_CHIP3_CHANNEL33 u8IS31Data[3U][32U]
#define IS31_CHIP3_CHANNEL34 u8IS31Data[3U][33U]
#define IS31_CHIP3_CHANNEL35 u8IS31Data[3U][34U]
#define IS31_CHIP3_CHANNEL36 u8IS31Data[3U][35U]
#endif
/*-------------------------------------------------------------------------------------------*/
/*------------------------------------------------------*/
#define EXTEND_IO 0x78
EXTERN_IS31FL3236 uint32_t IIC_3236_NACK_Time;
EXTERN_IS31FL3236 void IS31_Shutdown(void);
EXTERN_IS31FL3236 void IS31FL3236_Update(void);
EXTERN_IS31FL3236 void IS31FL3236_Init(void);
EXTERN_IS31FL3236 void IS31FL3236_Clear(void);
EXTERN_IS31FL3236 void IS31_OFF_Wakeup(void);
EXTERN_IS31FL3236 void LED_OFF_Display(void);
// extern void Sys_Run_MODE_2ms_Tasks(void);
// extern void Sys_Run_MODE_5ms_Tasks(void);
// extern void Sys_Run_MODE_10ms_Tasks(void);
#endif
utility/MCU_Cfg/inc/IS31_IIC_Master.h deleted 100644 → 0
View file @ 69806d87
#ifndef IS31_IIC_MASTER_H_
#define IS31_IIC_MASTER_H_
#include "gpio.h"
#define IS31_IIC_WaitOverTime 50
#define IIC_ACCESS_PORT_REG_DIRECT
#define SCL_LED_DRIVER_PORT PORT7
#define SCL_LED_DRIVER_PIN PIN5
#define SDA_LED_DRIVER_PORT PORT7
#define SDA_LED_DRIVER_PIN PIN4
/******************************************************************************
******************************************************************************/
//#define IIC_SDAGet PORT_GetBit(SEG_LED_SD);
//#define IS31_IIC_SCL_Dir_Out PORT_Init(SEG_LED_SCL, OPENDRAIN_OUTPUT);
//#define IS31_IIC_SCL_Dir_In PORT_Init(SEG_LED_SCL, INPUT);
//#define IS31_IIC_SDA_Dir_Out PORT_Init(SEG_LED_SD, OPENDRAIN_OUTPUT);
//#define IS31_IIC_SDA_Dir_In PORT_Init(SEG_LED_SD, INPUT);
//#define IS31_IIC_SDB_Dir_Out PORT_Init(SEG_LED_CSB, OUTPUT);
//#define IS31_IIC_SCL_HIGH PORT_SetBit(SEG_LED_SCL);
//#define IS31_IIC_SCL_LOW PORT_ClrBit(SEG_LED_SCL);
//#define IS31_IIC_SDA_HIGH PORT_SetBit(SEG_LED_SD);
//#define IS31_IIC_SDA_LOW PORT_ClrBit(SEG_LED_SD);
//#define IS31_IIC_SDB_HIGH PORT_SetBit(SEG_LED_CSB);
//#define IS31_IIC_SDB_LOW PORT_ClrBit(SEG_LED_CSB);
extern uint8_t IIC_SDAGet (void);
extern void IS31_IIC_SCL_Dir_Out(void);
extern void IS31_IIC_SCL_Dir_In(void);
extern void IS31_IIC_SDA_Dir_Out(void);
extern void IS31_IIC_SDA_Dir_In(void);
extern void bsp_IIC_SDA_out( uint8_t dat ) ;
extern void bsp_IIC_SCL_out( uint8_t dat );
/******************************************************************************
******************************************************************************/
extern void Simulated_IIC_2_Init(void);
extern void IS31_IIC_delay(uint32_t time);
extern void IS31_IIC_Start(void);
extern void IS31_IIC_Stop(void);
extern void IS31_IIC_NACK(void);
extern void IS31_IIC_ACK(void);
extern void IS31_IIC_SendByte(uint8_t Data);
extern uint8_t IS31_IIC_ReadByte(void);
extern uint8_t IS31_IIC_WaitAck(void);
extern void Simulated_Release_SCL(void);
extern void bsp_IIC_nop(void);
#endif
utility/MCU_Cfg/inc/LtDet_Simulated_IIC_Master.h deleted 100644 → 0
View file @ 69806d87
/******************************************************************************
文 件 名：Simulated_IIC_Master.h
功能描述：IO端口模拟的IIC(I2C)主机函数库头文件
作 者：张暄
版 本：V1.0
日 期：2016.12.21
******************************************************************************/
#ifndef _SIMULATED_IIC_MASTER_H_
#define _SIMULATED_IIC_MASTER_H_
#include "common.h"
/******************************************************************************
1us延时校准
******************************************************************************/
#define IIC_FREQ_CALIBRATION 4
/******************************************************************************
确认信号
******************************************************************************/
#define IIC_ACK 0 //肯定应答
#define IIC_NAK 1 //否定应答
#define IIC_INVALID_ACK 2 //无效的应答信号(应答信号还未收到)
/******************************************************************************
函数声明
******************************************************************************/
void LtDet_IIC_Init(void);
void LtDet_IIC_Start(void);
void LtDet_IIC_Stop(void);
void LtDet_IIC_Transmit_Data(uint8_t Data);
uint8_t LtDet_IIC_Receive_Data(void);
void LtDet_IIC_Transmit_ACK(uint8_t ACK);
uint8_t LtDet_IIC_Receive_ACK(void);
void LtDet_IIC_Delay(void);
#endif
utility/MCU_Cfg/inc/SEG_LCD.h deleted 100644 → 0
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#ifndef _SEG_LCD_H_
#define _SEG_LCD_H_
#include "BU98R10.H"
/******************************************************************************
段码状态
******************************************************************************/
#define SEG_LCD_LIGHT 7
#define SEG_LCD_GRAY 1
#define SEG_LCD_GRAY_2 2
#define SEG_LCD_OFF 0
#define SEG_LCD_ON 255
/******************************************************************************
显示模式
******************************************************************************/
#define GUI_DISP_MODE_NORMAL 0x00 //正常
#define GUI_DISP_MODE_WARNING 0x01 //报警
#define GUI_DISP_MODE_NEGATIVE 0x01 //负数
#define GUI_DISP_MODE_BLANK 0x02 //空白
#define GUI_DISP_MODE_INVALID 0x03 //无效
/******************************************************************************
段码液晶显示数据备份结构
******************************************************************************/
typedef struct
{
uint8_t Brightness;
uint8_t Window;
uint8_t SetMode;
uint8_t VSpeedSeg;
uint8_t ESpeedSeg;
uint16_t VSpeed;
uint16_t ESpeed;
uint16_t Voltage;
uint8_t VolCANset;
uint8_t Gear;
uint8_t TempSeg;
uint8_t FuelSeg;
uint8_t ODOMode;
uint32_t ODOMileage;
uint8_t ODOUnit;
uint32_t ODOFaultCode;
}SEGLCDBackupStruct;
/******************************************************************************
图标状态寄存器SEGLCDIconxxxStatus位定义
================================================================
Bit 7 | SEG_LCD_ICON_FORCE | 强制显示标志
-------+-------------------------+------------------------------
Bit 6 | Rsvd. | 保留
-------+-------------------------+------------------------------
Bit 5 | Rsvd. | 保留
-------+-------------------------+------------------------------
Bit 4 | Rsvd. | 保留
-------+-------------------------+------------------------------
Bit 3 | Rsvd. | 保留
-------+-------------------------+------------------------------
Bit 2 | Rsvd. | 保留
-------+-------------------------+------------------------------
Bit 1 | SEG_LCD_ICON_FORCE_STAT | 强制显示状态 1-强制点亮 0-强制熄灭
-------+-------------------------+------------------------------
Bit 0 | SEG_LCD_ICON_STAT | 显示状态 1-点亮 0-熄灭
================================================================
******************************************************************************/
#define SEG_LCD_ICON_FORCE ((uint8_t)0x80)
#define SEG_LCD_ICON_FORCE_STAT ((uint8_t)0x02)
#define SEG_LCD_ICON_STAT ((uint8_t)0x01)
#define Clr_Bit(p, b) (p) &= (~(1u << (b)))
#define Set_Bit(p, b) (p) |= (1u << (b))
#define Bit_Is_Set(p, b) ((p) &(1u << (b)))
#define Bit_Is_Clr(p, b) (!((p) & (1u << (b))))
/******************************************************************************
Icon开关状态
******************************************************************************/
typedef enum
{
SEG_LCD_ICON_OFF = 0, //熄灭图标
SEG_LCD_ICON_ON, //点亮图标
SEG_LCD_ICON_FORCE_OFF, //强制熄灭图标,通过 SEG_LCD_ICON_OFF / SEG_LCD_ICON_ON 状态不能控制图标熄灭或点亮
SEG_LCD_ICON_FORCE_ON, //强制点亮图标,通过 SEG_LCD_ICON_OFF / SEG_LCD_ICON_ON 状态不能控制图标熄灭或点亮
SEG_LCD_ICON_FREE, //取消对图标的强制熄灭或点亮,将图标交由 SEG_LCD_ICON_OFF / SEG_LCD_ICON_ON 状态控制
}SEGLCDIconStatusEnum;
/**********************************************************************************
全局变量
***********************************************************************************/
extern SEGLCDBackupStruct SEGLCDBackup;
/******************************************************************************
函数声明
******************************************************************************/
void SEG_LCD_Init(void);
void SEG_LCD_Shutdown(void);
void SEG_LCD_Gear_Display(uint8_t m_Flag, uint8_t SegNum, uint8_t CanStand);
void SEG_LCD_Gear_Selftest(uint8_t Gear);
void SEG_LCD_Vehicle_Speed_Num_Display(uint8_t m_Flag, uint8_t SetMode, uint16_t Vspeed); //1:mph default:km/h
void SEG_LCD_Vehicle_Speed_Num_Selftest(uint16_t Vspeed);
void SEG_LCD_Engine_Speed_Seg_Display(uint8_t m_Flag, uint16_t SegNum, uint8_t SpeedStand);
void SEG_LCD_Engine_Speed_Seg_Selftest(uint16_t SegNum);
void SEG_LCD_ODO_Trip_Display(uint8_t m_Flag, uint8_t Mode, uint8_t Unit, uint32_t Mileage);
void SEG_LCD_FaultCode_Display(uint8_t m_Flag, uint32_t FaultCodeDisp);
void SEG_LCD_ODO_Trip_FaultCode_Selftest(uint8_t Mileage);
void SEG_LCD_BatteryErr_Display(uint8_t m_Flag, uint32_t ModeTime);
void SEG_Coolant_Temp_Display(uint8_t m_Flag, uint8_t Seg);
void SEG_Fuel_Level_Display(uint8_t m_Flag, uint8_t Seg);
void SEG_LCD_Battery_Voltage_Display(uint8_t m_Flag, uint8_t Voltage ,uint16_t VolCANset);
void SEG_LCD_Battery_Voltage_Selftest(uint8_t Voltage);
//Light
void SEG_LCD_OilPressure(uint8_t state);
void SEG_LCD_TirePressure(uint8_t state);
void SEG_LCD_READY(uint8_t state);
void SEG_LCD_ABS(uint8_t state);
void SEG_LCD_TSC(uint8_t state);
void SEG_LCD_AutoStarStop(uint8_t state);
void SEG_LCD_Batterylow(uint8_t state);
void SEG_LCD_HI_BEAM(uint8_t state);
void SEG_LCD_Shore(uint8_t state);
void SEG_LCD_OBD(uint8_t state);
void SEG_LCD_HighBeam(uint8_t state);
void SEG_LCD_LeftTurn(uint8_t state);
void SEG_LCD_RightTurn(uint8_t state);
void SEG_LCD_Fuel(uint8_t state);
void SEG_LCD_Temp(uint8_t state);
void Engine_Speed_Update(void);
#endif
utility/MCU_Cfg/inc/Sys_Tick.h deleted 100644 → 0
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/**************************************************************************//**
* \file Sys_Tick.h
* \brief System tick timer header file
* \details
* \author Zhang Xuan
* \version V1.0.0
* \date 19-Jul-2018
* \par History:
* V1.0.0 Initial release
* \par Copyright:
* (c) Heilongjiang TYW Electronics co., LTD
******************************************************************************/
#ifndef _SYS_TICK_H_
#define _SYS_TICK_H_
/* Includes ------------------------------------------------------------------*/
/* C binding of definitions if building with C++ compiler */
#ifdef __cplusplus
extern {
#endif
/* Exported types ------------------------------------------------------------*/
typedef enum
{
SYS_TICK_50us_CB = 0U,
SYS_TICK_1ms_CB,
SYS_TICK_100ms_CB,
}Sys_Tick_Call_Back_Type_en_t;
/* Exported constants --------------------------------------------------------*/
/* Exported macro ------------------------------------------------------------*/
//#define SYS_TICK_INT_INTERVAL (50UL) /* 50us */
#define SYS_TICK_INT_INTERVAL (1000UL) /* 1000us */
#define SYS_TICK_CALL_BACK_TYPE_NUM (3U)
/* 50us rolling counter */
extern volatile uint16_t g_u16SysRollingCounter50us;
#define SYS_ROLLING_COUNTER_50us g_u16SysRollingCounter50us
/* 1ms rolling counter */
extern volatile uint16_t g_u16SysRollingCounter1ms;
#define SYS_ROLLING_COUNTER_1ms g_u16SysRollingCounter1ms
/* Interrupt service routine adaptor */
#define R_AWOT_TintIsr(i) SysTick_Handler()
/* Exported functions ------------------------------------------------------- */
extern void Sys_Tick_Timer_Start(void);
extern void Sys_Tick_Timer_Stop(void);
extern void Sys_Tick_Timer_Call_Back_Reg(Sys_Tick_Call_Back_Type_en_t enType, void (*pfnIsr)(void));
extern void SysTick_Handler(void);
#ifdef __cplusplus
}
#endif
#endif /* _GPIO_H_ */
utility/MCU_Cfg/inc/adc.h deleted 100644 → 0
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utility/MCU_Cfg/inc/can.h deleted 100644 → 0
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#ifdef GLOBALS_BSP_CAN
#define EXTERN_BSP_CAN
#else
#define EXTERN_BSP_CAN extern
#endif
#ifndef BSP_CAN_H_
#define BSP_CAN_H_
#include "stdint.h"
#define txResNum 13
#define U2_txResNum 14
#define txCommon 15
#define MSG_EMPTY 0
#define MSG_FULL 1
#define SJW_1Tq 0
#define SJW_2Tq 1
#define SJW_3Tq 2
#define SAMP_1 0
#define Seg1_10Tq 9
#define Seg1_11Tq 10
#define Seg1_12Tq 11
#define Seg1_13Tq 12
#define Seg1_14Tq 13
#define Seg1_8Tq 7
#define Seg2_7Tq 6
#define Seg2_8Tq 7
#define Seg1_3Tq 2
#define Seg1_4Tq 3
#define Seg1_5Tq 4
#define Seg1_6Tq 5
#define Seg2_1Tq 0
#define Seg2_2Tq 1
#define Seg2_3Tq 2
#define Seg2_4Tq 3
#define Seg2_5Tq 4
#define IDAM_2_32Bit 0
#define IDAM_4_16Bit 1
#define IDHIT0 0
#define MSG_EMPOTY 0
#define MSG_FULL 1
#define CanWakeUpEn 1
#define CanWakeUpDis 0
#define success 1
#define failt 0
#define CanON 1
#define CanOFF 0
#define ID280 0x280
#define ID2C0 0x2C0
#define ID392 0x392
#define ID350 0x350
#define ID51B 0x51B
#define ID380 0x380
#define ID320 0x320
#define ID301 0x301
#define ID440 0x440
#define ID360 0x360
#define ID515 0x515
#define ID600 0x600
#define ID3E6 0x3E6
/* ToDo: You can allocate the CTXD0 to P02 or P51 with PIOR33 register */
#define CTXD0_PORT_SETTING() do{ \
PORT->PIOR3 &= ~(1 << 3); /* allocate CTXD0 to P02 */ \
PORT->P0 |= (1 << 2); /* P02 output high level */ \
PORT->PM0 &= ~(1 << 2); /* P02 is used as CTXD0 output */ \
PORT->PMC0 &= ~(1 << 2); /* P02 is digital function */ \
}while(0)
/* ToDo: You can allocate the CRXD0 to P03 or P50 with PIOR33 register */
#define CRXD0_PORT_SETTING() do{ \
PORT->PIOR3 &= ~(1 << 3); /* allocate CRXD0 to P03 */ \
PORT->PM0 |= (1 << 3); /* P03 is used as CRXD0 input */ \
PORT->PMC0 &= ~(1 << 3); /* P03 is digital function */ \
}while(0)
//Format of CAN Module Control Register CTRL
#define CTRL_RSTA_READ 0x0200U
#define CTRL_TSTA_READ 0x0100U
#define CTRL_CCERC_READ 0x0080U
#define CTRL_AL_READ 0x0040U
#define CTRL_VALID_READ 0x0020U
#define CTRL_PSMODE_READ 0x0018U
#define CTRL_OPMODE_READ 0x0007U
#define CTRL_CCERC_CLR 0x0080U
#define CTRL_AL_CLR 0x0040U
#define CTRL_VALID_CLR 0x0020U
#define CTRL_CCERC_SET 0x8000U
#define CTRL_AL_SET 0x4000U
#define PSMODE_IDLE 0x0018U
#define PSMODE_SLEEP 0x0810U//0x0800U
#define PSMODE_STOP 0x1800U
#define OPMODE_IDLE 0x0007U
#define OPMODE_NORMAL 0x0106U//0x0100U
#define OPMODE_NORMAL_ABT 0x0205U//0x0200U
#define OPMODE_ONLY_RX 0x0304U//0x0300U
#define OPMODE_SHOT 0x0403U//0x0400U
#define OPMODE_TEST 0x0502U//0x0500U
//CAN module receive history list register RGPT
#define RGPT_RHPM_READ 0x0002U
#define RGPT_ROVF_READ 0x0001U
#define RGPT_ROVF_CLR 0x0001U
#define MCTRL_DN_CLR 0x0004U
//CAN module interrupt status register INTS
#define INTS_TX_READ 0x0001U
#define INTS_RX_READ 0x0002U
#define INTS_ERR_READ 0x0004U
#define INTS_PERR_READ 0x0008U
#define INTS_AL_READ 0x0010U
#define INTS_WK_READ 0x0020U
#define INTS_TX_CLR 0x0001U
#define INTS_RX_CLR 0x0002U
#define INTS_ERR_CLR 0x0004U
#define INTS_PERR_CLR 0x0008U
#define INTS_AL_CLR 0x0010U
#define INTS_WK_CLR 0x0020U
typedef enum
{
Canm_BusOk = 0,
Canm_ActiveErr,
Canm_PassiveErr,
Canm_busoff,
}CanState_t;
EXTERN_BSP_CAN void bsp_CAN_Init(void);
EXTERN_BSP_CAN uint8_t bsp_CANSendFrame(uint32_t id,uint8_t buff_num,uint8_t *txdata,uint8_t length);
EXTERN_BSP_CAN void bsp_CAN_Msgbuf_init(void);
EXTERN_BSP_CAN void bsp_tx_msgbuf_init(uint8_t buffer_number,uint32_t tx_msg_ID,uint8_t tx_msg_DLC);
EXTERN_BSP_CAN void bsp_rx_msgbuf_init(uint8_t buf_num,uint32_t id,uint8_t MaskReg_n);
EXTERN_BSP_CAN void bsp_tx_msgbuf_abort(uint8_t buffer_number);
EXTERN_BSP_CAN void bsp_CAN_Sleep(void);
EXTERN_BSP_CAN void bsp_CAN_SleepRelease(void);
EXTERN_BSP_CAN void bsp_CAN_BusOff_Recover(void);
EXTERN_BSP_CAN CanState_t GetBusOffState(void);
EXTERN_BSP_CAN uint8_t CAN0_Get_Wake_Up_Flag ( void );
EXTERN_BSP_CAN uint8_t CanSendLock;
EXTERN_BSP_CAN volatile uint8_t g_bReturn;
EXTERN_BSP_CAN uint8_t Get_CH0_BusOffStatus(void);
EXTERN_BSP_CAN uint8_t bsp_Is_CAN_Sleep(void);
EXTERN_BSP_CAN void bsp_CAN_MaskCheck(void);
#endif /* BSP_CAN_H_ */
utility/MCU_Cfg/inc/clk.h deleted 100644 → 0
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/***********************************************************************************************************************
* Copyright (C) All rights reserved.
***********************************************************************************************************************/
/***********************************************************************************************************************
* @file clk.h
* @brief This file implements device driver for clock generate module.
* @version 1.0.0
* @date 2020/10/24
***********************************************************************************************************************/
#ifndef CLK_H
#define CLK_H
/** Macro to insert a Data Synchronization Barrier instruction */
#define DSB() __DSB()
/** Macro to insert an Instruction Synchronization Barrier instruction */
#define ISB() __ISB()
/***********************************************************************************************************************
Macro definitions (Register bit)
***********************************************************************************************************************/
/*
Clock operation mode control register (CMC)
*/
/* Control of X1 clock oscillation frequency (AMPH) */
#define _00_CGC_SYSOSC_UNDER10M (0x00U) /* 1MHz <= fX <= 10MHz */
#define _01_CGC_SYSOSC_OVER10M (0x01U) /* 10MHz < fX <= 20MHz */
/* XT1 oscillator oscillation mode selection (AMPHS1,AMPHS0) */
#define _00_CGC_LOW_OSCILLATION (0x00U) /* low power consumption oscillation */
#define _02_CGC_NORMAL_OSCILLATION (0x02U) /* normal oscillation */
#define _04_CGC_ULTRA_LOW_OSCILLATION (0x04U) /* ultra-low power consumption oscillation */
/* Subsystem clock pin operation mode (EXCLKS,OSCSELS) */
#define _00_CGC_SUB_PORT (0x00U) /* XT1, XT2 as I/O port */
#define _10_CGC_SUB_OSC (0x10U) /* XT1, XT2 as crystal connection */
#define _20_CGC_SUB_PORT1 (0x20U) /* XT1, XT2 as I/O port */
#define _30_CGC_SUB_EXT (0x30U) /* XT1 as I/O port, XT2 as external clock input */
#define _30_CGC_SUB_PIN (0x30U) /* XT1, XT2 pin setting */
/* High-speed system clock pin operation mode (EXCLK,OSCSEL) */
#define _00_CGC_HISYS_PORT (0x00U) /* X1, X2 as I/O port */
#define _40_CGC_HISYS_OSC (0x40U) /* X1, X2 as crystal/ceramic resonator connection */
#define _80_CGC_HISYS_PORT1 (0x80U) /* X1, X2 as I/O port */
#define _C0_CGC_HISYS_EXT (0xC0U) /* X1 as I/O port, X2 as external clock input */
#define _C0_CGC_HISYS_PIN (0xC0U) /* X1, X2 pin setting */
/*
System clock control register (CKC)
*/
/* Main system clock (fMAIN) operation control (MCM0) */
#define _00_CGC_MAINCLK_SELFOCO (0x00U) /* selects the high-speed on-chip oscillator clock (fIH) as the main system clock (fMAIN) */
#define _10_CGC_MAINCLK_SELHISYS (0x10U) /* selects the high-speed system clock (fMX) as the main system clock (fMAIN) */
/* Status of Main system clock (fMAIN) (MCS) */
#define _00_CGC_MAINCLK_FOCO (0x00U) /* high-speed on-chip oscillator clock (fIH) */
#define _20_CGC_MAINCLK_HISYS (0x20U) /* high-speed system clock (fMX) */
/* Selection of CPU/peripheral hardware clock (fCLK) (CSS) */
#define _00_CGC_MAINCLK_SELECTED (0x00U) /* main system clock (fMAIN) */
#define _40_CGC_MAINCLK_FSUB (0x40U) /* subsystem clock (fSUB) */
/* Status of CPU/peripheral hardware clock (fCLK) (CLS) */
#define _00_CGC_MAINCLK_STATUS (0x00U) /* main system clock (fMAIN) */
#define _80_CGC_MAINCLK_STATUS (0x80U) /* subsystem clock (fSUB) */
/*
Clock operation status control register (CSC)
*/
/* High-speed on-chip oscillator clock operation control (HIOSTOP) */
#define _00_CGC_HIO_OPER (0x00U) /* high-speed on-chip oscillator operating */
#define _01_CGC_HIO_STOP (0x01U) /* high-speed on-chip oscillator stopped */
/* Subsystem clock operation control (XTSTOP) */
#define _00_CGC_FSUB_OPER (0x00U) /* XT1 oscillator/external clock operating */
#define _40_CGC_FSUB_STOP (0x40U) /* XT1 oscillator/external clock stopped */
/* High-speed system clock operation control (MSTOP) */
#define _00_CGC_HISYS_OPER (0x00U) /* X1 oscillator/external clock operating */
#define _80_CGC_HISYS_STOP (0x80U) /* X1 oscillator/external clock stopped */
/*
Oscillation stabilization time counter status register (OSTC)
*/
/* oscillation stabilization time status (MOST8,MOST9,MOST10,MOST11,MOST13,MOST15,MOST17,MOST18) */
#define _00_CGC_OSCSTAB_STA0 (0x00U) /* 2^8/fX max. */
#define _80_CGC_OSCSTAB_STA8 (0x80U) /* 2^8/fX */
#define _C0_CGC_OSCSTAB_STA9 (0xC0U) /* 2^9/fX */
#define _E0_CGC_OSCSTAB_STA10 (0xE0U) /* 2^10/fX */
#define _F0_CGC_OSCSTAB_STA11 (0xF0U) /* 2^11/fX */
#define _F8_CGC_OSCSTAB_STA13 (0xF8U) /* 2^13/fX */
#define _FC_CGC_OSCSTAB_STA15 (0xFCU) /* 2^15/fX */
#define _FE_CGC_OSCSTAB_STA17 (0xFEU) /* 2^17/fX */
#define _FF_CGC_OSCSTAB_STA18 (0xFFU) /* 2^18/fX */
/*
Oscillation stabilization time select register (OSTS)
*/
/* oscillation stabilization time selection (OSTS2,OSTS1,OSTS0) */
#define _00_CGC_OSCSTAB_SEL8 (0x00U) /* 2^8/fX */
#define _01_CGC_OSCSTAB_SEL9 (0x01U) /* 2^9/fX */
#define _02_CGC_OSCSTAB_SEL10 (0x02U) /* 2^10/fX */
#define _03_CGC_OSCSTAB_SEL11 (0x03U) /* 2^11/fX */
#define _04_CGC_OSCSTAB_SEL13 (0x04U) /* 2^13/fX */
#define _05_CGC_OSCSTAB_SEL15 (0x05U) /* 2^15/fX */
#define _06_CGC_OSCSTAB_SEL17 (0x06U) /* 2^17/fX */
#define _07_CGC_OSCSTAB_SEL18 (0x07U) /* 2^18/fX */
/*
Subsystem clock supply mode control register (OSMC)
*/
/* Setting in STOP mode or HALT mode while subsystem clock is selected as CPU clock (RTCLPC) */
#define _00_CGC_CLK_ENABLE (0x00U) /* enables supply of subsystem clock to peripheral functions */
#define _80_CGC_CLK_STOP (0x80U) /* stops supply of subsystem clock to peripheral functions */
/* Selection of operation clock for real-time clock, 12-bit interval timer, and timer RJ (WUTMMCK0) */
#define _00_CGC_TMRJ_IT_CLK_SUBSYSTEM_CLK (0x00U) /* subsystem clock */
#define _10_CGC_TMRJ_IT_CLK_FIL (0x10U) /* low-speed on-chip oscillator clock */
/*
PLL Control Register (PLLCR)
*/
/* PLL Operation Control (PLLON[0:0]) */
#define _00_CGC_PLL_OPER (0x00U) /* PLL operation */
#define _01_CGC_PLL_STOP (0x01U) /* PLL Stop */
/* Frequency Multiplication Factor Select (PLLMUL[1:1]) */
#define _00_CGC_PLL_MUL_12_0 (0x00U) /* x12 */
#define _02_CGC_PLL_MUL_16_0 (0x02U) /* x16 */
/* PLL Input Frequency Division Ratio Select (PLIDIV[3:2]) */
#define _00_CGC_PLL_DIV_1 (0x00U) /* x1 */
#define _04_CGC_PLL_DIV_2 (0x04U) /* x1/2 */
#define _08_CGC_PLL_DIV_4 (0x08U) /* x1/4 */
/* PLL Source Select (PLLSRSEL) */
#define _00_CGC_PLLSR_fIH (0x00U) /* fIH is selected for PLL source */
#define _80_CGC_PLLSR_fMX (0x80U) /* fMX is selected for PLL source */
/***********************************************************************************************************************
Macro definitions
***********************************************************************************************************************/
#define CGC_SUBWAITTIME (360U) /* change the waiting time according to the system */
/***********************************************************************************************************************
Typedef definitions
***********************************************************************************************************************/
typedef enum
{
OSC_PORT,
OSC_OSCILLATOR,
OSC_EXCLK
} osc_pin_mode_t;
typedef enum
{
MAINCLK_FIH,
MAINCLK_FMX,
MAINCLK_FSUB,
MAINCLK_FIL,
MAINCLK_FPLL
} clock_select_t;
typedef enum
{
OSC_LOW_POWER,
OSC_NORMAL_POWER,
OSC_ULTRA_LOW_POWER
} osc_power_mode_t;
typedef enum
{
OSC_UNDER_10M,
OSC_OVER_10M,
} osc_speed_mode_t;
typedef enum
{
PLL_DIV_1,
PLL_DIV_2,
PLL_DIV_4
} pll_div_t;
typedef enum
{
PLL_MUL_12,
PLL_MUL_16,
} pll_mul_t;
typedef enum
{
PLL_SR_fIH,
PLL_SR_fMX,
} pll_src_t;
/***********************************************************************************************************************
Global functions
***********************************************************************************************************************/
void CLK_Osc_Setting(osc_pin_mode_t main, osc_pin_mode_t sub);
void CLK_MainOsc_Setting(osc_pin_mode_t main, osc_speed_mode_t amph);
void CLK_SubOsc_Setting(osc_pin_mode_t sub, osc_power_mode_t amphs);
void CLK_PLL_Setting(pll_src_t src, pll_div_t div, pll_mul_t mul);
uint8_t CLK_Fclk_Select(clock_select_t cks);
void CLK_MainOsc_Stop(void);
void CLK_MainOsc_Start(void);
void CLK_SubOsc_Stop(void);
void CLK_SubOsc_Start(void);
void CLK_Hoco_Stop(void);
void CLK_Hoco_Start(void);
void CLK_PLL_Stop(void);
void CLK_PLL_Start(void);
void Sys_Enter_Sleep_Mode(void);
void Clock_Init(void);
#endif
utility/MCU_Cfg/inc/cmp.h deleted 100644 → 0
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utility/MCU_Cfg/inc/dac.h deleted 100644 → 0
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/***********************************************************************************************************************
* Copyright (C) All rights reserved.
***********************************************************************************************************************/
/***********************************************************************************************************************
* @file dac.h
* @brief This file implements device driver for DAC module.
* @version 1.0.0
* @date 2019/12/24
***********************************************************************************************************************/
#ifndef DAC_H
#define DAC_H
/***********************************************************************************************************************
Macro definitions (Register bit)
***********************************************************************************************************************/
/*
D/A converter mode register (DAM)
*/
/* D/A conversion operation control (DACE1) */
#define _00_DA1_CONVERSION_STOP (0x00U) /* stops D/A conversion operation */
#define _20_DA1_CONVERSION_ENABLE (0x20U) /* enables D/A conversion operation */
/* D/A conversion operation control (DACE0) */
#define _00_DA0_CONVERSION_STOP (0x00U) /* stops D/A conversion operation */
#define _10_DA0_CONVERSION_ENABLE (0x10U) /* enables D/A conversion operation */
/* D/A converter operation mode selection (DAMD1) */
#define _00_DA1_NORMAL_MODE (0x00U) /* Normal mode */
#define _02_DA1_TIME_OUTPUT_MODE (0x02U) /* Real-time output mode */
/* D/A converter operation mode selection (DAMD0) */
#define _00_DA0_NORMAL_MODE (0x00U) /* Normal mode */
#define _01_DA0_TIME_OUTPUT_MODE (0x01U) /* Real-time output mode */
#define DAMD0 (1<<0)
#define DAMD1 (1<<1)
#define DACE0 (1<<4)
#define DACE1 (1<<5)
/***********************************************************************************************************************
Macro definitions
***********************************************************************************************************************/
#define _00_DA0_COUVERSION_VALUE (0x00U) /* set the analog voltage value */
#define _00_DA1_COUVERSION_VALUE (0x00U) /* set the analog voltage value */
/***********************************************************************************************************************
Typedef definitions
***********************************************************************************************************************/
typedef enum
{
DAC_CHANNEL_0 = 1U, // channel 0: DAC0
DAC_CHANNEL_1 = 2U, // channel 1: DAC1
DAC_CHANNEL_A = 3U // channel all: DAC0 & DAC1
} dac_channel_t;
/***********************************************************************************************************************
Global functions
***********************************************************************************************************************/
void DAC_Init(dac_channel_t ch);
void DAC_Start(dac_channel_t ch);
void DAC_Stop(dac_channel_t ch);
void DAC_Set_Value(dac_channel_t ch, uint8_t regvalue);
void DAC_Set_PowerOff(void);
/* Start user code for function. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */
#endif
utility/MCU_Cfg/inc/div.h deleted 100644 → 0
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/***********************************************************************************************************************
* Copyright (C) All rights reserved.
***********************************************************************************************************************/
/***********************************************************************************************************************
* @file div.h
* @brief This file implements device driver for hardware divider module.
* @version 1.0.0
* @date 2019/12/24
***********************************************************************************************************************/
#ifndef DIV_H
#define DIV_H
/***********************************************************************************************************************
Macro definitions (Register bit)
***********************************************************************************************************************/
/***********************************************************************************************************************
Macro definitions
***********************************************************************************************************************/
/***********************************************************************************************************************
Typedef definitions
***********************************************************************************************************************/
/***********************************************************************************************************************
Global functions
***********************************************************************************************************************/
void DIV_Operation(uint32_t dividend, uint32_t divisor, uint32_t *p_quotient, uint32_t *p_remainder);
#endif
utility/MCU_Cfg/inc/dma.h deleted 100644 → 0
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/***********************************************************************************************************************
* Copyright (C) All rights reserved.
***********************************************************************************************************************/
/***********************************************************************************************************************
* @file dma.h
* @brief This file implements device driver for DTC module.
* @version 1.0.0
* @date 2019/12/24
***********************************************************************************************************************/
#ifndef DMA_H
#define DMA_H
/***********************************************************************************************************************
Macro definitions (Register bit)
***********************************************************************************************************************/
/*
Bit Position of DMACR
*/
#define SZ_Pos 6
#define RPTINT_Pos 5
#define CHNE_Pos 4
#define DAMOD_Pos 3
#define SAMOD_Pos 2
#define RPTSEL_Pos 1
#define MODE_Pos 0
/***********************************************************************************************************************
Macro definitions
***********************************************************************************************************************/
/***********************************************************************************************************************
Typedef definitions
***********************************************************************************************************************/
typedef enum {
DMA_VECTOR_INTP0 = 1U, /* 外部中断INTP0 */
DMA_VECTOR_INTP1 = 2U, /* 外部中断INTP1 */
DMA_VECTOR_INTP2 = 3U, /* 外部中断INTP2 */
DMA_VECTOR_INTP3 = 4U, /* 外部中断INTP3 */
DMA_VECTOR_INTP4 = 5U, /* 外部中断INTP4 */
DMA_VECTOR_INTP5 = 6U, /* 外部中断INTP5 */
DMA_VECTOR_INTP6 = 7U, /* 外部中断INTP6 */
DMA_VECTOR_INTP7 = 8U, /* 外部中断INTP7 */
DMA_VECTOR_KEY = 9U, /* 按键中断 */
DMA_VECTOR_ADC = 10U, /* A/D 转换结束 */
DMA_VECTOR_SR0 = 11U, /* UART0接收传送结束/SPI01传送结束或者缓冲器空/IIC01传送结束 */
DMA_VECTOR_SPI01 = 11U, /* UART0接收传送结束/SPI01传送结束或者缓冲器空/IIC01传送结束 */
DMA_VECTOR_IIC01 = 11U, /* UART0接收传送结束/SPI01传送结束或者缓冲器空/IIC01传送结束 */
DMA_VECTOR_ST0 = 12U, /* UART0发送传送结束/SPI00传送结束或者缓冲器空/IIC00传送结束 */
DMA_VECTOR_SPI00 = 12U, /* UART0发送传送结束/SPI00传送结束或者缓冲器空/IIC00传送结束 */
DMA_VECTOR_IIC00 = 12U, /* UART0发送传送结束/SPI00传送结束或者缓冲器空/IIC00传送结束 */
DMA_VECTOR_SR1 = 13U, /* UART1接收传送结束/SPI11传送结束或者缓冲器空/IIC11传送结束 */
DMA_VECTOR_SPI11 = 13U, /* UART1接收传送结束/SPI11传送结束或者缓冲器空/IIC11传送结束 */
DMA_VECTOR_IIC11 = 13U, /* UART1接收传送结束/SPI11传送结束或者缓冲器空/IIC11传送结束 */
DMA_VECTOR_ST1 = 14U, /* UART1发送传送结束/SPI10传送结束或者缓冲器空/IIC10传送结束 */
DMA_VECTOR_SPI10 = 14U, /* UART1发送传送结束/SPI10传送结束或者缓冲器空/IIC10传送结束 */
DMA_VECTOR_IIC10 = 14U, /* UART1发送传送结束/SPI10传送结束或者缓冲器空/IIC10传送结束 */
DMA_VECTOR_SR2 = 15U, /* UART2接收传送结束/SPI21传送结束或者缓冲器空/IIC21传送结束 */
DMA_VECTOR_SPI21 = 15U, /* UART2接收传送结束/SPI21传送结束或者缓冲器空/IIC21传送结束 */
DMA_VECTOR_IIC21 = 15U, /* UART2接收传送结束/SPI21传送结束或者缓冲器空/IIC21传送结束 */
DMA_VECTOR_ST2 = 16U, /* UART2发送传送结束/SPI20传送结束或者缓冲器空/IIC20传送结束 */
DMA_VECTOR_SPI20 = 16U, /* UART2发送传送结束/SPI20传送结束或者缓冲器空/IIC20传送结束 */
DMA_VECTOR_IIC20 = 16U, /* UART2发送传送结束/SPI20传送结束或者缓冲器空/IIC20传送结束 */
DMA_VECTOR_IICA0 = 17U, /* IICA通信结束 */
DMA_VECTOR_IICA1 = 18U, /* IICA通信结束 */
DMA_VECTOR_TM4_CH0 = 19U, /* 定时器阵列单元0的通道0的计数结束或者捕获结束 */
DMA_VECTOR_TM4_CH1 = 20U, /* 定时器阵列单元0的通道1的计数结束或者捕获结束 */
DMA_VECTOR_TM4_CH2 = 21U, /* 定时器阵列单元0的通道2的计数结束或者捕获结束 */
DMA_VECTOR_TM4_CH3 = 22U, /* 定时器阵列单元0的通道3的计数结束或者捕获结束 */
DMA_VECTOR_RTC = 23U, /* RTC中断 */
DMA_VECTOR_FLASH = 24U, /* Flash擦除/写入结束 */
DMA_VECTOR_TMC_OVF = 26U, /* 定时器C的上溢 */
DMA_VECTOR_TMM_IMFA0 = 27U, /* 定时器M的比较匹配A0 */
DMA_VECTOR_TMM_IMFB0 = 28U, /* 定时器M的比较匹配B0 */
DMA_VECTOR_TMM_IMFC0 = 29U, /* 定时器M的比较匹配C0 */
DMA_VECTOR_TMM_IMFD0 = 30U, /* 定时器M的比较匹配D0 */
DMA_VECTOR_TMM_IMFA1 = 31U, /* 定时器M的比较匹配A1 */
DMA_VECTOR_TMM_IMFB1 = 32U, /* 定时器M的比较匹配B1 */
DMA_VECTOR_TMM_IMFC1 = 33U, /* 定时器M的比较匹配C1 */
DMA_VECTOR_TMM_IMFD1 = 34U, /* 定时器M的比较匹配D1 */
DMA_VECTOR_TMB_IMFA = 35U, /* 定时器B的比较匹配A */
DMA_VECTOR_TMB_IMFB = 36U, /* 定时器B的比较匹配B */
DMA_VECTOR_TMA_UNF = 37U, /* 定时器A的下溢 */
DMA_VECTOR_CMP0 = 38U, /* 比较器0 */
DMA_VECTOR_CMP1 = 39U /* 比较器1 */
} dma_vector_t;
typedef enum {
DMA_SIZE_BYTE, /* 8bits transfer */
DMA_SIZE_HALF, /* 16bits transfer */
DMA_SIZE_WORD /* 32bits transfer */
} dma_size_t;
typedef enum {
DMA_MODE_NORMAL, /* Normal mode */
DMA_MODE_REPEAT /* Repeat mode */
} dma_mode_t;
/***********************************************************************************************************************
Global functions
***********************************************************************************************************************/
#if 1
void DMA_Start(dma_vector_t vect_num, uint8_t ctrl_data_num, dma_mode_t mode, dma_size_t size, uint16_t count, void *src_adr, void *dst_adr);
#else
void DMA_Start(dma_vector_t vect_num, uint8_t ctrl_data_num, DMAVEC_CTRL_Type ctrl_data);
#endif
void DMA_Enable(dma_vector_t vect_num);
void DMA_Stop(dma_vector_t vect_num);
void DMA_Trigger(dma_vector_t vect_num);
/* Start user code for function. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */
#endif
utility/MCU_Cfg/inc/elc.h deleted 100644 → 0
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/***********************************************************************************************************************
* Copyright (C) All rights reserved.
***********************************************************************************************************************/
/***********************************************************************************************************************
* @file elc.h
* @brief This file implements device driver for ELC module.
* @version 1.0.0
* @date 2019/12/24
***********************************************************************************************************************/
#ifndef ELC_H
#define ELC_H
/***********************************************************************************************************************
Macro definitions (Register bit)
***********************************************************************************************************************/
/*
Event input resources number (ELSELRn)
*/
#define _00_ELC_EVENT_INTP0 (0x00U) /* ELSELR00 */
#define _01_ELC_EVENT_INTP1 (0x01U) /* ELSELR01 */
#define _02_ELC_EVENT_INTP2 (0x02U) /* ELSELR02 */
#define _03_ELC_EVENT_INTP3 (0x03U) /* ELSELR03 */
#define _04_ELC_EVENT_INTP4 (0x04U) /* ELSELR04 */
#define _05_ELC_EVENT_INTP5 (0x05U) /* ELSELR05 */
#define _06_ELC_EVENT_INTKR (0x06U) /* ELSELR06 */
#define _07_ELC_EVENT_INTRTC (0x07U) /* ELSELR07 */
#define _08_ELC_EVENT_TMIMFA0 (0x08U) /* ELSELR08 */
#define _09_ELC_EVENT_TMIMFB0 (0x09U) /* ELSELR09 */
#define _0A_ELC_EVENT_TMIMFA1 (0x0AU) /* ELSELR10 */
#define _0B_ELC_EVENT_TMIMFB1 (0x0BU) /* ELSELR11 */
#define _0C_ELC_EVENT_TMUDF1 (0x0CU) /* ELSELR12 */
#define _0D_ELC_EVENT_INTTA (0x0DU) /* ELSELR13 */
#define _0E_ELC_EVENT_TBIMFA (0x0EU) /* ELSELR14 */
#define _0F_ELC_EVENT_TBIMFB (0x0FU) /* ELSELR15 */
#define _10_ELC_EVENT_INTTM00 (0x10U) /* ELSELR16 */
#define _11_ELC_EVENT_INTTM01 (0x11U) /* ELSELR17 */
#define _12_ELC_EVENT_INTTM02 (0x12U) /* ELSELR18 */
#define _13_ELC_EVENT_INTTM03 (0x13U) /* ELSELR19 */
#define _14_ELC_EVENT_INTCMP0 (0x14U) /* ELSELR20 */
#define _15_ELC_EVENT_INTCMP1 (0x15U) /* ELSELR21 */
/*
Event output destination select register n (ELSELRn)
*/
/* Event output destination select register n (ELSELn3 - ELSELn0) */
#define _00_ELC_EVENT_LINK_OFF (0x00U) /* event link disabled */
#define _01_ELC_EVENT_LINK_AD (0x01U) /* select operation of peripheral function 1 to A/D converter */
#define _02_ELC_EVENT_LINK_TI00 (0x02U) /* select operation of peripheral function 2 to Timer input of timer 4 channel 0 */
#define _03_ELC_EVENT_LINK_TI01 (0x03U) /* select operation of peripheral function 3 to Timer input of timer 4 channel 1 */
#define _04_ELC_EVENT_LINK_TA (0x04U) /* select operation of peripheral function 4 to Timer A */
#define _05_ELC_EVENT_LINK_TB (0x05U) /* select operation of peripheral function 5 to Timer B */
#define _06_ELC_EVENT_LINK_TM0 (0x06U) /* select operation of peripheral function 6 to Timer M0 */
#define _07_ELC_EVENT_LINK_TM1 (0x07U) /* select operation of peripheral function 7 to Timer M1 */
#define _08_ELC_EVENT_LINK_DA0 (0x08U) /* select operation of peripheral function 8 to DA0 */
#define _09_ELC_EVENT_LINK_DA1 (0x09U) /* select operation of peripheral function 9 to DA1 */
#define _0A_ELC_EVENT_LINK_PWMOP (0x0AU) /* select operation of peripheral function 10 to PWMOP */
/***********************************************************************************************************************
Macro definitions
***********************************************************************************************************************/
#define ELC_DESTINATION_COUNT (0x16U)
/***********************************************************************************************************************
Typedef definitions
***********************************************************************************************************************/
/***********************************************************************************************************************
Global functions
***********************************************************************************************************************/
void ELC_Start(uint32_t event_src, uint32_t event_dst);
void ELC_Stop(uint32_t event);
/* Start user code for function. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */
#endif
utility/MCU_Cfg/inc/flash.h deleted 100644 → 0
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/***********************************************************************************************************************
* Copyright (C) All rights reserved.
***********************************************************************************************************************/
/***********************************************************************************************************************
* @file flash.h
* @brief This file implements device driver for FMC module.
* @version 1.0.0
* @date 2019/12/24
***********************************************************************************************************************/
#ifndef FLASH_H
#define FLASH_H
#include "userdefine.h"
/***********************************************************************************************************************
Macro definitions (Register bit)
***********************************************************************************************************************/
/***********************************************************************************************************************
Macro definitions
***********************************************************************************************************************/
/***********************************************************************************************************************
Typedef definitions
***********************************************************************************************************************/
/***********************************************************************************************************************
Global functions
***********************************************************************************************************************/
int EraseChip (uint32_t adr);
int EraseSector (uint32_t adr);
int ProgramPage (uint32_t adr, uint32_t sz, uint8_t *buf);
MD_STATUS flash_write(uint32_t adr, uint32_t sz, uint8_t *buf);
/* Start user code for function. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */
#endif
utility/MCU_Cfg/inc/gpio.h deleted 100644 → 0
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utility/MCU_Cfg/inc/iica.h deleted 100644 → 0
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utility/MCU_Cfg/inc/intp.h deleted 100644 → 0
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/***********************************************************************************************************************
* Copyright (C) All rights reserved.
***********************************************************************************************************************/
/***********************************************************************************************************************
* @file intp.h
* @brief This file implements device driver for INTP module.
* @version 1.0.0
* @date 2019/12/24
***********************************************************************************************************************/
#ifndef INTP_H
#define INTP_H
/***********************************************************************************************************************
Macro definitions (Register bit)
***********************************************************************************************************************/
/***********************************************************************************************************************
Macro definitions
***********************************************************************************************************************/
#define INTP_WAITTIME (1U) /* change the waiting time according to the system */
/***********************************************************************************************************************
Typedef definitions
***********************************************************************************************************************/
typedef enum
{
INTP_NONE,
INTP_FALLING,
INTP_RISING,
INTP_BOTH
} intp_edge_t;
/***********************************************************************************************************************
Global variables
***********************************************************************************************************************/
extern volatile uint32_t g_intp0Taken; /* INTP0 taken */
extern volatile uint32_t g_intp1Taken; /* INTP1 taken */
extern volatile uint32_t g_intp2Taken; /* INTP2 taken */
extern volatile uint32_t g_intp3Taken; /* INTP3 taken */
extern volatile uint32_t g_intp4Taken; /* INTP4 taken */
extern volatile uint32_t g_intp5Taken; /* INTP5 taken */
extern volatile uint32_t g_intp6Taken; /* INTP6 taken */
extern volatile uint32_t g_intp7Taken; /* INTP7 taken */
extern volatile uint32_t g_intp8Taken; /* INTP8 taken */
extern volatile uint32_t g_intp9Taken; /* INTP9 taken */
extern volatile uint32_t g_intp10Taken; /* INTP10 taken */
extern volatile uint32_t g_intp11Taken; /* INTP11 taken */
/***********************************************************************************************************************
Global functions
***********************************************************************************************************************/
void INTP_Init(uint16_t pinMsk, intp_edge_t edge);
void INTP_Start(uint16_t pinMsk);
void INTP_Stop(uint16_t pinMsk);
static void intp0_callback(void);
static void intp1_callback(void);
static void intp2_callback(void);
static void intp3_callback(void);
static void intp4_callback(void);
static void intp5_callback(void);
static void intp6_callback(void);
static void intp7_callback(void);
static void intp8_callback(void);
static void intp9_callback(void);
static void intp10_callback(void);
static void intp11_callback(void);
/* Start user code for function. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */
#endif
utility/MCU_Cfg/inc/lin.h deleted 100644 → 0
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/***********************************************************************************************************************
* Copyright (C) All rights reserved.
***********************************************************************************************************************/
/***********************************************************************************************************************
* @file lin.h
* @brief This file implements device driver for LIN Send and Receive.
* @version 1.0.0
* @date 2019/12/24
***********************************************************************************************************************/
#ifndef LIN_H
#define LIN_H
/***********************************************************************************************************************
Macro definitions
***********************************************************************************************************************/
/***********************************************************************************************************************
Includes
***********************************************************************************************************************/
#include "userdefine.h"
#include "BAT32A239.h"
#include "sci.h"
#include "tim4.h"
#include "intp.h"
/**************************************************************************
* UART Data and Status Register
**************************************************************************/
#define UART_TXDR (SCI0->TXD0) /* transmission data register */
#define UART_RXDR (SCI0->RXD0) /* reception data register */
#define UART_TXBR (SCI0->SDR00) /* transmission baudrate */
#define UART_RXBR (SCI0->SDR01) /* reception baudrate */
#define UART_PRS (SCI0->SPS0 & 0x0FU) /* prescale value */
#define UART_BUSY (SCI0->SSR00 & (_0040_SCI_UNDER_EXECUTE | _0020_SCI_VALID_STORED)) /* busy */
#define UART_RRDY (SCI0->SSR01 & _0020_SCI_VALID_STORED) /* read ready */
#define UART_TXST (SCI0->SS0 |= _0001_SCI_CH0_START_TRG_ON) /* transmission start */
#define UART_TXSP (SCI0->ST0 |= _0001_SCI_CH0_STOP_TRG_ON) /* transmission stop */
#define UART_RXST (SCI0->SS0 |= _0002_SCI_CH1_START_TRG_ON) /* reception start */
#define UART_RXSP (SCI0->ST0 |= _0002_SCI_CH1_STOP_TRG_ON) /* reception stop */
#define LIN_BAUDRATE (19200) /* baudrate: 19200bps */
#define RESPONSE_TIME (1000)
//#define POLLING_STYLE
/**************************************************************************
* Typedef defination
**************************************************************************/
typedef struct
{
union {
uint8_t PID;
struct {
uint8_t ID : 6;
uint8_t P0 : 1; /* odd parity: P0 = (ID0 ^ ID1 ^ ID2 ^ ID4) */
uint8_t P1 : 1; /* even parity: P1 = ~(ID1 ^ ID3 ^ ID4 ^ ID5) */
} PID_b;
};
uint8_t Data[8]; /* data field: 1 ~ 8 bytes */
uint8_t ChkSum; /* check sum field */
} lin_frame_t;
/**************************************************************************
* Global functions
**************************************************************************/
void LIN_SetConfig(void);
void LIN_SetBaudRate(uint16_t baudrate);
void LIN_SendWakeUp(void);
void LIN_SendBreak(void);
void LIN_SendSync(void);
void LIN_ReceiveBreak(void);
int16_t LIN_GetBreakWidth(void);
void LIN_ReceiveSync(void);
uint16_t LIN_GetBaudRate(void);
#ifdef POLLING_STYLE /* polling-based */
void LIN_Send(lin_frame_t *pFrame);
void LIN_Receive(lin_fram_t *pFrame);
#else /* interrupt-based */
void LIN_Send(uint8_t * tx_buf, uint8_t tx_num);
void LIN_Receive(uint8_t * rx_buf, uint8_t rx_num);
#endif
#endif
utility/MCU_Cfg/inc/pcbz.h deleted 100644 → 0
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/***********************************************************************************************************************
* Copyright (C) All rights reserved.
***********************************************************************************************************************/
/***********************************************************************************************************************
* @file pcbz.h
* @brief This file implements device driver for PCLBUZ module.
* @version 1.0.0
* @date 2019/12/24
***********************************************************************************************************************/
#ifndef PCBZ_H
#define PCBZ_H
/***********************************************************************************************************************
Macro definitions (Register bit)
***********************************************************************************************************************/
/***********************************************************************************************************************
Macro definitions
***********************************************************************************************************************/
/***********************************************************************************************************************
Typedef definitions
***********************************************************************************************************************/
typedef enum
{
PCBZ_CHANNEL_0,
PCBZ_CHANNEL_1,
} pcbz_channel_t;
typedef enum
{
PCBZ_FMAIN_0 = 0x00U, /* fMAIN/2**0 */
PCBZ_FMAIN_1 = 0x01U, /* fMAIN/2**1 */
PCBZ_FMAIN_2 = 0x02U, /* fMAIN/2**2 */
PCBZ_FMAIN_3 = 0x03U, /* fMAIN/2**3 */
PCBZ_FMAIN_4 = 0x04U, /* fMAIN/2**4 */
PCBZ_FMAIN_11 = 0x05U, /* fMAIN/2**11 */
PCBZ_FMAIN_12 = 0x06U, /* fMAIN/2**12 */
PCBZ_FMAIN_13 = 0x07U, /* fMAIN/2**13 */
PCBZ_FSUB_0 = 0x08U, /* fSUB/2**0 */
PCBZ_FSUB_1 = 0x09U, /* fSUB/2**1 */
PCBZ_FSUB_2 = 0x0AU, /* fSUB/2**2 */
PCBZ_FSUB_3 = 0x0BU, /* fSUB/2**3 */
PCBZ_FSUB_4 = 0x0CU, /* fSUB/2**4 */
PCBZ_FSUB_5 = 0x0DU, /* fSUB/2**5 */
PCBZ_FSUB_6 = 0x0EU, /* fSUB/2**6 */
PCBZ_FSUB_7 = 0x0FU /* fSUB/2**7 */
} pcbz_clock_t;
/***********************************************************************************************************************
Global variables
***********************************************************************************************************************/
/***********************************************************************************************************************
Global functions
***********************************************************************************************************************/
void PCBZ_Init(pcbz_channel_t ch, pcbz_clock_t cks);
void PCBZ_Start(pcbz_channel_t ch);
void PCBZ_Stop(pcbz_channel_t ch);
/* Start user code for function. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */
#endif
utility/MCU_Cfg/inc/pga.h deleted 100644 → 0
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/***********************************************************************************************************************
* Copyright (C) All rights reserved.
***********************************************************************************************************************/
/***********************************************************************************************************************
* @file pga.h
* @brief This file implements device driver for PGA module.
* @version 1.0.0
* @date 2019/12/24
***********************************************************************************************************************/
#ifndef PGA_H
#define PGA_H
/***********************************************************************************************************************
Macro definitions (Register bit)
***********************************************************************************************************************/
/*
PGA control register (PGACTL)
*/
/* PGA operation selection (PGAEN) */
#define _00_PGA_OPERATION_STOP (0x00U) /* PGA operation stopped */
#define _80_PGA_OPERATION_ENABLE (0x80U) /* PGA operation enabled */
/* GND selection of feedback resistance of the programmable gain amplifier (PVRVS) */
#define _00_PGA_VSS_SELECTED (0x00U) /* selects VSS */
#define _08_PGA_PGAGND_SELECTED (0x08U) /* selects PGAGND */
/* Selected PGA amplification (PGAVG1,PGAVG0) */
#define _00_PGA_AMPLIFICATION_X4 (0x00U) /* *4 is selected as the gain */
#define _01_PGA_AMPLIFICATION_X8 (0x01U) /* *8 is selected as the gain */
#define _02_PGA_AMPLIFICATION_X10 (0x02U) /* *10 is selected as the gain */
#define _03_PGA_AMPLIFICATION_X12 (0x03U) /* *12 is selected as the gain */
#define _04_PGA_AMPLIFICATION_X14 (0x04U) /* *14 is selected as the gain */
#define _05_PGA_AMPLIFICATION_X16 (0x05U) /* *16 is selected as the gain */
#define _06_PGA_AMPLIFICATION_X32 (0x06U) /* *32 is selected as the gain */
#define _07_PGA_AMPLIFICATION_X32 (0x07U) /* *32 is selected as the gain */
#define PGAEN (0x80U) /* PGA operation enabled */
#define C0MON (1<<3U) /* CMP0 monitor flag */
#define C1MON (1<<7U) /* CMP1 monitor flag */
/***********************************************************************************************************************
Macro definitions
***********************************************************************************************************************/
/***********************************************************************************************************************
Typedef definitions
***********************************************************************************************************************/
typedef enum
{
PGA_CHANNEL_0 = 1U, // PGA0
PGA_CHANNEL_1 = 2U, // PGA1
PGA_CHANNEL_A = 3U // PGA0 & PGA1
} pga_channel_t;
typedef enum
{
PGA_VSS_REFERENCE_VOLTAGE = 0U, // Select VSS as GROUND of feedback resistance string
PGA_PGAGND_REFERENCE_VOLTAGE = 1U // Select PGAGND as GROUND of feedback resistance string
} pga_vref_t;
typedef enum
{
PGA_GAIN_X4 = 0U, // X4
PGA_GAIN_X8 = 1U, // X8
PGA_GAIN_X10 = 2U, // X10
PGA_GAIN_X12 = 3U, // X12
PGA_GAIN_X14 = 4U, // X14
PGA_GAIN_X16 = 5U, // X16
PGA_GAIN_X32 = 6U // X32
} pga_gain_t;
/***********************************************************************************************************************
Global functions
***********************************************************************************************************************/
void PGA_Init(pga_channel_t ch, pga_vref_t vref, pga_gain_t gain);
void PGA_Start(pga_channel_t ch);
void PGA_Stop(pga_channel_t ch);
/* Start user code for function. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */
#endif
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/***********************************************************************************************************************
* Copyright (C) All rights reserved.
***********************************************************************************************************************/
/***********************************************************************************************************************
* @file rst.h
* @brief This file implements device driver for RST module.
* @version 1.0.0
* @date 2019/12/24
***********************************************************************************************************************/
#ifndef RST_H
#define RST_H
/***********************************************************************************************************************
Macro definitions (Register bit)
***********************************************************************************************************************/
/***********************************************************************************************************************
Macro definitions
***********************************************************************************************************************/
/***********************************************************************************************************************
Typedef definitions
***********************************************************************************************************************/
/***********************************************************************************************************************
Global functions
***********************************************************************************************************************/
uint8_t RST_Get_Flag(void);
#endif
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/***********************************************************************************************************************
* Copyright (C) All rights reserved.
***********************************************************************************************************************/
/***********************************************************************************************************************
* @file rtc.h
* @version 1.0.0
* @brief This file implements device driver for RTC module.
* @date 2019/12/24
***********************************************************************************************************************/
#ifndef RTC_H
#define RTC_H
typedef struct
{
uint8_t sec;
uint8_t min;
uint8_t hour;
uint8_t day;
uint8_t week;
uint8_t month;
uint8_t year;
}rtc_counter_value_t;
typedef enum
{
RTC_FSUB,
RTC_FIL,
RTC_48MHZ, /* fHOCO = 48MHz */
RTC_32MHZ, /* fHOCO = 32MHz */
RTC_16MHZ, /* fMX = 16MHz */
RTC_8MHZ, /* fMX = 8MHz */
} rtc_cks_t;
extern void bsp_Rtc_isr_Handler(void);
extern void RTC_Init(rtc_cks_t rtccks);
extern void RTC_Get_CounterValue(rtc_counter_value_t *counter_val);
extern void RTC_Set_CounterValue(rtc_counter_value_t *counter_val);
extern void RTC_Service(void);
extern void Get_RTC_Time(rtc_counter_value_t* pCalendar);
#endif
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/*
* bsp_clock.h
*
* Created on: 2021
* Author: QTC
*/
#ifndef _BSPTIMER4_H_
#define _BSPTIMER4_H_
#include "common.h"
#define TIMER4_CH0 0x01
#define TIMER4_CH1 0x02
#define TIMER4_CH2 0x04
#define TIMER4_CH3 0x08
#define EdgeRising 0X0144
#define EdgeFalling 0X0104
#define TI00_PORT_SETTING() do{ \
PORT->PM0 |= (1 << 0); /* P00 is used as TI00 input */ \
PORT->PMC0 &= ~(1 << 0); /* P00 is digital function */ \
}while(0)
#define TI01_PORT_SETTING() do{ \
PORT->PM1 |= (1 << 6); /* P16 is used as TI01 input */ \
}while(0)
#define TI02_PORT_SETTING() do{ \
PORT->PM1 |= (1 << 7); /* P17 is used as TI02 input */ \
}while(0)
#define TI03_PORT_SETTING() do{ \
PORT->PM3 |= (1 << 1); /* P31 is used as TI03 input */ \
}while(0)
extern void Timer4_Init(uint16_t Frequency,uint8_t ch);
extern void Capture_Init(uint8_t pin_num);
extern void Capture_Stop(uint8_t pin_num);
void bsp_tim4_01_isr_Handler( void );
void bsp_tim4_02_isr_Handler( void );
#endif /* _BSPTIMER4_H_ */
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