1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
1001
1002
1003
1004
1005
1006
1007
1008
1009
1010
1011
1012
1013
1014
1015
1016
1017
1018
1019
1020
1021
1022
1023
1024
1025
1026
1027
1028
1029
1030
1031
1032
1033
1034
1035
1036
1037
1038
1039
1040
1041
1042
1043
1044
1045
1046
1047
1048
1049
1050
1051
1052
1053
1054
1055
1056
1057
1058
1059
1060
1061
/**
******************************************************************************
* @file i2c.c
* @author CMS Application Team
* @version Vx.x.x
* @date 24-April-2022
* @brief This file provides firmware functions to manage the following
* functionalities of the I2C bus to transmit data or receive:
@verbatim
===============================================================================
##### How to use this driver #####
===============================================================================
[..]
@endverbatim
******************************************************************************
* @attention
*
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "i2c.h"
#include "cgc.h"
/** @addtogroup bat32g135_StdPeriph_Driver
* @{
*/
/** @defgroup I2C
* @brief I2C driver modules
* @{
*/
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* I2C init define by clock and clock source select */
#define I2Cx_Init(I2C_Instance, clock, clock_sel) \
{ \
uint16_t tmpreg = 0; \
\
I2C_Instance->ST = I2C_STOP_EN; \
\
tmpreg |= I2C_CLEAR_FLAG_FEF; \
tmpreg |= I2C_CLEAR_FLAG_PEF; \
tmpreg |= I2C_CLEAR_FLAG_OVF; \
I2C_Instance->SIR = tmpreg; \
\
tmpreg = SCI_SMRMN_DEFAULT_VALUE; \
tmpreg |= SCI_CLOCK_MODE_CKS | SCI_MODE_IIC | SCI_TRANSFER_END; \
tmpreg |= clock_sel; \
I2C_Instance->SMR = tmpreg; \
\
tmpreg = SCI_SCRMN_DEFAULT_VALUE; \
tmpreg |= SCI_TIMING_1; \
tmpreg |= I2C_DIR_MSB; \
tmpreg |= I2C_DATA_LENGTH_8; \
tmpreg |= I2C_DATA_STOPBIT_1; \
I2C_Instance->SCR = tmpreg; \
\
I2C_Instance->SPS&= ~I2C_SPS_MAX_VALUE; \
I2C_Instance->SPS = clock.sps; \
I2C_Instance->SDR = clock.sdr; \
\
I2C_Instance->CKO = I2C_BusLevel_High; \
I2C_Instance->SO = I2C_BusLevel_High; \
}
/* I2C BUS mode configurate by send or receive */
#define I2Cx_Chanel_ModeConfigurate(I2C_Instance, Mode) \
{ \
I2C_Instance->SCR &= (uint16_t) ~(SCI_RECEPTION_TRANSMISSION); \
I2C_Instance->SCR |= (Mode == I2C_TransmitMode_Send) ? \
SCI_TRANSMISSION : SCI_RECEPTION; \
}
/* I2C BUS generate START signal */
#define I2Cx_StartCondition(I2C_Instance) \
{ \
I2C_Instance->SO = I2C_BusLevel_Low; \
I2C_DelayCycle(); \
I2C_Instance->CKO = I2C_BusLevel_Low; \
}
/* I2C BUS generate STOP signal */
#define I2Cx_StopCondition(I2C_Instance) \
{ \
I2C_Instance->SO = I2C_BusLevel_Low; \
I2C_Instance->CKO = I2C_BusLevel_High; \
I2C_DelayCycle(); \
I2C_Instance->SO = I2C_BusLevel_High; \
}
/* I2C BUS channel enable */
#define I2Cx_Channel_Enable(I2C_Instance) \
{ \
I2C_Instance->SOE = I2C_START_EN; \
I2C_Instance->SS = I2C_START_EN; \
}
/* I2C BUS channel disable */
#define I2Cx_Channel_Disable(I2C_Instance) \
{ \
I2C_Instance->ST = I2C_STOP_EN; \
I2C_Instance->SOE = I2C_START_DIS; \
}
/* Private macro -------------------------------------------------------------*/
#define I2C_DELAY_CYCLE 1u
#define I2C_BUS_MAX_NUM 10u
/* Private variables ---------------------------------------------------------*/
static uint8_t I2C_IRQTable[I2C_BUS_MAX_NUM] =
{IIC00_IRQn, IIC01_IRQn, IIC10_IRQn, IIC11_IRQn, IIC20_IRQn, IIC21_IRQn,0,0,IIC30_IRQn, IIC31_IRQn};
/* Private function prototypes -----------------------------------------------*/
/* Private functions ---------------------------------------------------------*/
static uint32_t I2C_GetSysClock(void)
{
return SystemCoreClock;
}
__STATIC_INLINE void I2C_DelayCycle(void)
{
for (int w_count = 0U; w_count <= I2C_DELAY_CYCLE; w_count++)
__NOP();
}
/**
* @brief Deinitializes the I2Cx peripheral registers to their default reset values.
* @param I2Cx: where x can be 0, 1, 2, 3, 4 or 5 to select the I2C peripheral.
* @retval None
*/
void I2C_DeInit(SCIAFSelect_TypeDef I2Cx)
{
/* Check the parameters */
assert_param(IS_I2C_ALL_PERIPH(I2Cx));
CGC_PER0PeriphClockCmd(I2Cx >> 10, DISABLE);
SCIChannel_Free(I2Cx, SCI_DEFAULT_MODE);
}
/**
* @brief Set I2Cx Bus init status and setting the bus speed
* @param I2Cx: where x can be 0, 1, 2, 3, 4 or 5 to select the I2C peripheral.
* @param I2C_InitStruct: I2C bus peripheral setting arg data structure.
* @retval None.
*/
int I2C_Init(SCIAFSelect_TypeDef I2Cx, I2C_InitTypeDef* I2C_InitStruct)
{
assert_param(IS_I2C_ALL_PERIPH(I2Cx));
int8_t ret = SCI_SUCCESS;
SCIPeriph_Clock_TypeDef pValue;
ret = SCIChannel_Alloca(I2Cx, SCI_DEFAULT_MODE);
if(ret != SCI_SUCCESS)
return ret;
switch(I2Cx)
{
case I2C00:
{
/* Clock gate control register setting to enable SCI0 clock */
CGC_PER0PeriphClockCmd((uint8_t)((I2Cx >> 10)+SCI_UINT_OFFSET), ENABLE);
I2C0_TypeDef *I2C_Instance = &SCI0->I2C0;
SCIPeriphal_ClockUpdate(I2Cx, I2C_GetSysClock(),
I2C_InitStruct->I2C_ClockSpeed,
I2C_Instance->SPS,
&pValue);
I2Cx_Init(I2C_Instance, pValue, SCI_CLOCK_SELECT_CK00);
}
break;
case I2C01:
{
CGC_PER0PeriphClockCmd((uint8_t)((I2Cx >> 10)+SCI_UINT_OFFSET), ENABLE);
I2C1_TypeDef *I2C_Instance = &SCI0->I2C1;
SCIPeriphal_ClockUpdate(I2Cx, I2C_GetSysClock(),
I2C_InitStruct->I2C_ClockSpeed,
I2C_Instance->SPS,
&pValue);
I2Cx_Init(I2C_Instance, pValue, SCI_CLOCK_SELECT_CK00);
}
break;
case I2C10:
{
CGC_PER0PeriphClockCmd((uint8_t)((I2Cx >> 10)+SCI_UINT_OFFSET), ENABLE);
I2C2_TypeDef *I2C_Instance = &SCI0->I2C2;
SCIPeriphal_ClockUpdate(I2Cx, I2C_GetSysClock(),
I2C_InitStruct->I2C_ClockSpeed,
I2C_Instance->SPS,
&pValue);
I2Cx_Init(I2C_Instance, pValue, SCI_CLOCK_SELECT_CK01);
}
break;
case I2C11:
{
CGC_PER0PeriphClockCmd((uint8_t)((I2Cx >> 10)+SCI_UINT_OFFSET), ENABLE);
I2C3_TypeDef *I2C_Instance = &SCI0->I2C3;
SCIPeriphal_ClockUpdate(I2Cx, I2C_GetSysClock(),
I2C_InitStruct->I2C_ClockSpeed,
I2C_Instance->SPS,
&pValue);
I2Cx_Init(I2C_Instance, pValue, SCI_CLOCK_SELECT_CK01);
}
break;
case I2C20:
{
CGC_PER0PeriphClockCmd((uint8_t)((I2Cx >> 10)+SCI_UINT_OFFSET), ENABLE);
I2C4_TypeDef *I2C_Instance = &SCI1->I2C4;
SCIPeriphal_ClockUpdate(I2Cx, I2C_GetSysClock(),
I2C_InitStruct->I2C_ClockSpeed,
I2C_Instance->SPS,
&pValue);
I2Cx_Init(I2C_Instance, pValue, SCI_CLOCK_SELECT_CK00);
}
break;
case I2C21:
{
CGC_PER0PeriphClockCmd((uint8_t)((I2Cx >> 10)+SCI_UINT_OFFSET), ENABLE);
I2C5_TypeDef *I2C_Instance = &SCI1->I2C5;
SCIPeriphal_ClockUpdate(I2Cx, I2C_GetSysClock(),
I2C_InitStruct->I2C_ClockSpeed,
I2C_Instance->SPS,
&pValue);
I2Cx_Init(I2C_Instance, pValue, SCI_CLOCK_SELECT_CK00);
}
break;
#if defined(BAT32G1XX_80PIN) || defined(BAT32G1XX_100PIN)
case I2C30:
{
CGC_PER2PeriphClockCmd((uint8_t)((I2Cx >> 11)), ENABLE);
I2C6_TypeDef *I2C_Instance = &SCI2->I2C6;
SCIPeriphal_ClockUpdate(I2Cx, I2C_GetSysClock(),
I2C_InitStruct->I2C_ClockSpeed,
I2C_Instance->SPS,
&pValue);
I2Cx_Init(I2C_Instance, pValue, SCI_CLOCK_SELECT_CK00);
}
break;
case I2C31:
{
CGC_PER2PeriphClockCmd((uint8_t)(I2Cx >> 11), ENABLE);
I2C7_TypeDef *I2C_Instance = &SCI2->I2C7;
SCIPeriphal_ClockUpdate(I2Cx, I2C_GetSysClock(),
I2C_InitStruct->I2C_ClockSpeed,
I2C_Instance->SPS,
&pValue);
I2Cx_Init(I2C_Instance, pValue, SCI_CLOCK_SELECT_CK00);
}
break;
#endif
default:
break;
}
return ret;
}
/**
* @brief Set I2Cx Bus to generate a START signal and enable the bus.
* @param I2Cx: where x can be 0, 1, 2, 3, 4 or 5 to select the I2C peripheral.
* @retval None.
*/
static inline void I2C_StartCondition(SCIAFSelect_TypeDef I2Cx)
{
assert_param(IS_I2C_ALL_PERIPH(I2Cx));
switch(I2Cx)
{
case I2C00:
{
I2C0_TypeDef *I2C_Instance = &SCI0->I2C0;
I2Cx_StartCondition(I2C_Instance);
I2Cx_Channel_Enable(I2C_Instance);
}
break;
case I2C01:
{
I2C1_TypeDef *I2C_Instance = &SCI0->I2C1;
I2Cx_StartCondition(I2C_Instance);
I2Cx_Channel_Enable(I2C_Instance);
}
break;
case I2C10:
{
I2C2_TypeDef *I2C_Instance = &SCI0->I2C2;
I2Cx_StartCondition(I2C_Instance);
I2Cx_Channel_Enable(I2C_Instance);
}
break;
case I2C11:
{
I2C3_TypeDef *I2C_Instance = &SCI0->I2C3;
I2Cx_StartCondition(I2C_Instance);
I2Cx_Channel_Enable(I2C_Instance);
}
break;
case I2C20:
{
I2C4_TypeDef *I2C_Instance = &SCI1->I2C4;
I2Cx_StartCondition(I2C_Instance);
I2Cx_Channel_Enable(I2C_Instance);
}
break;
case I2C21:
{
I2C5_TypeDef *I2C_Instance = &SCI1->I2C5;
I2Cx_StartCondition(I2C_Instance);
I2Cx_Channel_Enable(I2C_Instance);
}
break;
#if defined(BAT32G1XX_80PIN) || defined(BAT32G1XX_100PIN)
case I2C30:
{
I2C6_TypeDef *I2C_Instance = &SCI2->I2C6;
I2Cx_StartCondition(I2C_Instance);
I2Cx_Channel_Enable(I2C_Instance);
}
break;
case I2C31:
{
I2C7_TypeDef *I2C_Instance = &SCI2->I2C7;
I2Cx_StartCondition(I2C_Instance);
I2Cx_Channel_Enable(I2C_Instance);
}
break;
#endif
default:
break;
}
}
/**
* @brief Set I2Cx Bus to generate a STOP signal and disable the bus.
* @param I2Cx: where x can be 0, 1, 2, 3, 4 or 5 to select the I2C peripheral.
* @retval None.
*/
static inline void I2C_StopCondition(SCIAFSelect_TypeDef I2Cx)
{
assert_param(IS_I2C_ALL_PERIPH(I2Cx));
switch(I2Cx)
{
case I2C00:
{
I2C0_TypeDef *I2C_Instance = &SCI0->I2C0;
I2Cx_Channel_Disable(I2C_Instance);
I2Cx_StopCondition(I2C_Instance);
}
break;
case I2C01:
{
I2C1_TypeDef *I2C_Instance = &SCI0->I2C1;
I2Cx_Channel_Disable(I2C_Instance);
I2Cx_StopCondition(I2C_Instance);
}
break;
case I2C10:
{
I2C2_TypeDef *I2C_Instance = &SCI0->I2C2;
I2Cx_Channel_Disable(I2C_Instance);
I2Cx_StopCondition(I2C_Instance);
}
break;
case I2C11:
{
I2C3_TypeDef *I2C_Instance = &SCI0->I2C3;
I2Cx_Channel_Disable(I2C_Instance);
I2Cx_StopCondition(I2C_Instance);
}
break;
case I2C20:
{
I2C4_TypeDef *I2C_Instance = &SCI1->I2C4;
I2Cx_Channel_Disable(I2C_Instance);
I2Cx_StopCondition(I2C_Instance);
}
break;
case I2C21:
{
I2C5_TypeDef *I2C_Instance = &SCI1->I2C5;
I2Cx_Channel_Disable(I2C_Instance);
I2Cx_StopCondition(I2C_Instance);
}
break;
#if defined(BAT32G1XX_80PIN) || defined(BAT32G1XX_100PIN)
case I2C30:
{
I2C6_TypeDef *I2C_Instance = &SCI2->I2C6;
I2Cx_Channel_Disable(I2C_Instance);
I2Cx_StopCondition(I2C_Instance);
}
break;
case I2C31:
{
I2C7_TypeDef *I2C_Instance = &SCI2->I2C7;
I2Cx_Channel_Disable(I2C_Instance);
I2Cx_StopCondition(I2C_Instance);
}
break;
#endif
default:
break;
}
}
/**
* @brief Set I2Cx bus output enable or disable
* @param I2Cx: where x can be 0, 1, 2, 3, 4 or 5 to select the I2C peripheral.
* @param NewState: I2Cx bus signal output status.
* This parameter can be one of the following values:
* @arg ENABLE: I2Cx bus signal output wave enable.
* @arg ISABLE: I2Cx bus signal output wave disable.
* @retval None.
*/
void I2C_Output_Cmd(SCIAFSelect_TypeDef I2Cx, FunctionalState NewState)
{
assert_param(IS_I2C_ALL_PERIPH(I2Cx));
switch(I2Cx)
{
case I2C00:
{
I2C0_TypeDef *I2C_Instance = &SCI0->I2C0;
I2C_Instance->SOE = (NewState == ENABLE) ? I2C_START_EN : I2C_START_DIS;
}
break;
case I2C01:
{
I2C1_TypeDef *I2C_Instance = &SCI0->I2C1;
I2C_Instance->SOE = (NewState == ENABLE) ? I2C_START_EN : I2C_START_DIS;
}
break;
case I2C10:
{
I2C2_TypeDef *I2C_Instance = &SCI0->I2C2;
I2C_Instance->SOE = (NewState == ENABLE) ? I2C_START_EN : I2C_START_DIS;
}
break;
case I2C11:
{
I2C3_TypeDef *I2C_Instance = &SCI0->I2C3;
I2C_Instance->SOE = (NewState == ENABLE) ? I2C_START_EN : I2C_START_DIS;
}
break;
case I2C20:
{
I2C4_TypeDef *I2C_Instance = &SCI1->I2C4;
I2C_Instance->SOE = (NewState == ENABLE) ? I2C_START_EN : I2C_START_DIS;
}
break;
case I2C21:
{
I2C5_TypeDef *I2C_Instance = &SCI1->I2C5;
I2C_Instance->SOE = (NewState == ENABLE) ? I2C_START_EN : I2C_START_DIS;
}
break;
#if defined(BAT32G1XX_80PIN) || defined(BAT32G1XX_100PIN)
case I2C30:
{
I2C6_TypeDef *I2C_Instance = &SCI2->I2C6;
I2C_Instance->SOE = (NewState == ENABLE) ? I2C_START_EN : I2C_START_DIS;
}
break;
case I2C31:
{
I2C7_TypeDef *I2C_Instance = &SCI2->I2C7;
I2C_Instance->SOE = (NewState == ENABLE) ? I2C_START_EN : I2C_START_DIS;
}
break;
#endif
default:
break;
}
}
/**
* @brief Set I2Cx bus output channel start or stop
* @param I2Cx: where x can be 0, 1, 2, 3, 4 or 5 to select the I2C peripheral.
* @param NewState: I2Cx bus signal output status.
* This parameter can be one of the following values:
* @arg ENABLE: I2Cx bus channle start enable.
* @arg DISABLE: I2Cx bus channle stop
* @retval None.
*/
void I2C_ChannelStart_Cmd(SCIAFSelect_TypeDef I2Cx, FunctionalState NewState)
{
assert_param(IS_I2C_ALL_PERIPH(I2Cx));
switch(I2Cx)
{
case I2C00:
{
I2C0_TypeDef *I2C_Instance = &SCI0->I2C0;
if(NewState == ENABLE)
I2C_Instance->SS = I2C_START_EN;
else
I2C_Instance->ST = I2C_START_EN;
}
break;
case I2C01:
{
I2C1_TypeDef *I2C_Instance = &SCI0->I2C1;
if(NewState == ENABLE)
I2C_Instance->SS = I2C_START_EN;
else
I2C_Instance->ST = I2C_START_EN;
}
break;
case I2C10:
{
I2C2_TypeDef *I2C_Instance = &SCI0->I2C2;
if(NewState == ENABLE)
I2C_Instance->SS = I2C_START_EN;
else
I2C_Instance->ST = I2C_START_EN;
}
break;
case I2C11:
{
I2C3_TypeDef *I2C_Instance = &SCI0->I2C3;
if(NewState == ENABLE)
I2C_Instance->SS = I2C_START_EN;
else
I2C_Instance->ST = I2C_START_EN;
}
break;
case I2C20:
{
I2C4_TypeDef *I2C_Instance = &SCI1->I2C4;
if(NewState == ENABLE)
I2C_Instance->SS = I2C_START_EN;
else
I2C_Instance->ST = I2C_START_EN;
}
break;
case I2C21:
{
I2C5_TypeDef *I2C_Instance = &SCI1->I2C5;
if(NewState == ENABLE)
I2C_Instance->SS = I2C_START_EN;
else
I2C_Instance->ST = I2C_START_EN;
}
break;
#if defined(BAT32G1XX_80PIN) || defined(BAT32G1XX_100PIN)
case I2C30:
{
I2C6_TypeDef *I2C_Instance = &SCI2->I2C6;
if(NewState == ENABLE)
I2C_Instance->SS = I2C_START_EN;
else
I2C_Instance->ST = I2C_START_EN;
}
break;
case I2C31:
{
I2C7_TypeDef *I2C_Instance = &SCI2->I2C7;
if(NewState == ENABLE)
I2C_Instance->SS = I2C_START_EN;
else
I2C_Instance->ST = I2C_START_EN;
}
break;
#endif
default:
break;
}
}
/**
* @brief Set I2Cx communication mode in send or receive.
* @param I2Cx: where x can be 0, 1, 2, 3, 4 or 5 to select the I2C peripheral.
* @param Mode: I2Cx Transmit mode configurate.
* This parameter can be one of the following values:
* @arg I2C_TransmitMode_Send: Send mode setting for I2Cx bus.
* @arg I2C_TransmitMode_Recv: Receive mode setting for I2Cx bus.
* @retval None.
*/
void I2C_Set_TransmitMode(SCIAFSelect_TypeDef I2Cx, uint8_t Mode)
{
assert_param(IS_I2C_ALL_PERIPH(I2Cx));
assert_param(IS_I2C_TRANSMIT_MODE(Mode));
switch(I2Cx)
{
case I2C00:
{
I2C0_TypeDef *I2C_Instance = &SCI0->I2C0;
I2Cx_Chanel_ModeConfigurate(I2C_Instance, Mode);
}
break;
case I2C01:
{
I2C1_TypeDef *I2C_Instance = &SCI0->I2C1;
I2Cx_Chanel_ModeConfigurate(I2C_Instance, Mode);
}
break;
case I2C10:
{
I2C2_TypeDef *I2C_Instance = &SCI0->I2C2;
I2Cx_Chanel_ModeConfigurate(I2C_Instance, Mode);
}
break;
case I2C11:
{
I2C3_TypeDef *I2C_Instance = &SCI0->I2C3;
I2Cx_Chanel_ModeConfigurate(I2C_Instance, Mode);
}
break;
case I2C20:
{
I2C4_TypeDef *I2C_Instance = &SCI1->I2C4;
I2Cx_Chanel_ModeConfigurate(I2C_Instance, Mode);
}
break;
case I2C21:
{
I2C5_TypeDef *I2C_Instance = &SCI1->I2C5;
I2Cx_Chanel_ModeConfigurate(I2C_Instance, Mode);
}
break;
#if defined(BAT32G1XX_80PIN) || defined(BAT32G1XX_100PIN)
case I2C30:
{
I2C6_TypeDef *I2C_Instance = &SCI2->I2C6;
I2Cx_Chanel_ModeConfigurate(I2C_Instance, Mode);
}
break;
case I2C31:
{
I2C7_TypeDef *I2C_Instance = &SCI2->I2C7;
I2Cx_Chanel_ModeConfigurate(I2C_Instance, Mode);
}
break;
#endif
default:
break;
}
}
/**
* @brief Get I2Cx communication mode in send or receive.
* @param I2Cx: where x can be 0, 1, 2, 3, 4 or 5 to select the I2C peripheral.
* @retval Mode: I2Cx Transmit mode in configurate.
*/
uint8_t I2C_Get_TransmitMode(SCIAFSelect_TypeDef I2Cx)
{
uint8_t Mode = 0;
assert_param(IS_I2C_ALL_PERIPH(I2Cx));
switch(I2Cx)
{
case I2C00:
{
I2C0_TypeDef *I2C_Instance = &SCI0->I2C0;
Mode = I2C_TransmitMode_Mask & ((I2C_Instance->SCR & SCI_RECEPTION_TRANSMISSION) >> 14);
}
break;
case I2C01:
{
I2C1_TypeDef *I2C_Instance = &SCI0->I2C1;
Mode = I2C_TransmitMode_Mask & ((I2C_Instance->SCR & SCI_RECEPTION_TRANSMISSION) >> 14);
}
break;
case I2C10:
{
I2C2_TypeDef *I2C_Instance = &SCI0->I2C2;
Mode = I2C_TransmitMode_Mask & ((I2C_Instance->SCR & SCI_RECEPTION_TRANSMISSION) >> 14);
}
break;
case I2C11:
{
I2C3_TypeDef *I2C_Instance = &SCI0->I2C3;
Mode = I2C_TransmitMode_Mask & ((I2C_Instance->SCR & SCI_RECEPTION_TRANSMISSION) >> 14);
}
break;
case I2C20:
{
I2C4_TypeDef *I2C_Instance = &SCI1->I2C4;
Mode = I2C_TransmitMode_Mask & ((I2C_Instance->SCR & SCI_RECEPTION_TRANSMISSION) >> 14);
}
break;
case I2C21:
{
I2C5_TypeDef *I2C_Instance = &SCI1->I2C5;
Mode = I2C_TransmitMode_Mask & ((I2C_Instance->SCR & SCI_RECEPTION_TRANSMISSION) >> 14);
}
break;
#if defined(BAT32G1XX_80PIN) || defined(BAT32G1XX_100PIN)
case I2C30:
{
I2C6_TypeDef *I2C_Instance = &SCI2->I2C6;
Mode = I2C_TransmitMode_Mask & ((I2C_Instance->SCR & SCI_RECEPTION_TRANSMISSION) >> 14);
}
break;
case I2C31:
{
I2C7_TypeDef *I2C_Instance = &SCI2->I2C7;
Mode = I2C_TransmitMode_Mask & ((I2C_Instance->SCR & SCI_RECEPTION_TRANSMISSION) >> 14);
}
break;
#endif
default:
break;
}
return Mode;
}
/**
* @brief Generates I2Cx communication START condition.
* @param I2Cx: where x can be 0, 1, 2, 3, 4 or 5 to select the I2C peripheral.
* @retval None.
*/
void I2C_GenerateSTART(SCIAFSelect_TypeDef I2Cx)
{
/* Check the parameters */
assert_param(IS_I2C_ALL_PERIPH(I2Cx));
I2C_StartCondition(I2Cx);
}
/**
* @brief Generates I2Cx communication STOP condition.
* @param I2Cx: where x can be 0, 1, 2, 3, 4 or 5 to select the I2C peripheral.
* @retval None.
*/
void I2C_GenerateSTOP(SCIAFSelect_TypeDef I2Cx)
{
/* Check the parameters */
assert_param(IS_I2C_ALL_PERIPH(I2Cx));
I2C_StopCondition(I2Cx);
}
/** @defgroup I2C_Group Data transfers functions
* @brief Data transfers functions
*
@verbatim
===============================================================================
##### Data transfers functions #####
===============================================================================
@endverbatim
* @{
*/
/**
* @brief Sends a data byte through the I2Cx peripheral.
* @param I2Cx: where x can be 1, 2 or 3 to select the I2C peripheral.
* @param Data: Byte to be transmitted..
* @retval None
*/
void I2C_SendByte(SCIAFSelect_TypeDef I2Cx, uint8_t Data)
{
/* Check the parameters */
assert_param(IS_I2C_ALL_PERIPH(I2Cx));
/* Write in the SIO register the data to be sent */
switch(I2Cx)
{
case I2C00:
{
I2C0_TypeDef *I2C_Instance = &SCI0->I2C0;
I2C_Instance->SIO = Data;
}
break;
case I2C01:
{
I2C1_TypeDef *I2C_Instance = &SCI0->I2C1;
I2C_Instance->SIO = Data;
}
break;
case I2C10:
{
I2C2_TypeDef *I2C_Instance = &SCI0->I2C2;
I2C_Instance->SIO = Data;
}
break;
case I2C11:
{
I2C3_TypeDef *I2C_Instance = &SCI0->I2C3;
I2C_Instance->SIO = Data;
}
break;
case I2C20:
{
I2C4_TypeDef *I2C_Instance = &SCI1->I2C4;
I2C_Instance->SIO = Data;
}
break;
case I2C21:
{
I2C5_TypeDef *I2C_Instance = &SCI1->I2C5;
I2C_Instance->SIO = Data;
}
break;
#if defined(BAT32G1XX_80PIN) || defined(BAT32G1XX_100PIN)
case I2C30:
{
I2C6_TypeDef *I2C_Instance = &SCI2->I2C6;
I2C_Instance->SIO = Data;
}
break;
case I2C31:
{
I2C7_TypeDef *I2C_Instance = &SCI2->I2C7;
I2C_Instance->SIO = Data;
}
break;
#endif
default:
break;
}
}
/**
* @brief Send a data buffer through the I2Cx peripheral to write.
* @param I2Cx: where x can be 1, 2 or 3 to select the I2C peripheral.
* @param Address: Device address in the I2C bus.
* @param Reg: Register address in the Device.
* @param Data: Data buffer address.
* @param Len: Data buffer length need to transmit.
* @retval None
*/
void I2C_WriteData(SCIAFSelect_TypeDef I2Cx, uint8_t Address, uint8_t Reg, uint8_t *Data, uint16_t Len)
{
IRQn_Type irq;
/* Check the parameters */
assert_param(IS_I2C_ALL_PERIPH(I2Cx));
/* Get the IQR number depend on the I2Cx in SCI unit */
irq = (IRQn_Type)I2C_IRQTable[(((I2Cx >> 13)) * 4) + (I2Cx & 0x0F)];
/* When the I2C bus start,we should set the bus register mode in Send */
I2C_Set_TransmitMode(I2Cx, I2C_TransmitMode_Send);
/* Generate a START signal to transmission */
I2C_GenerateSTART(I2Cx);
/* Device address send */
I2C_SendByte(I2Cx, Address&0xFE);
/* Wait device address send succes */
while(!INTC_GetPendingIRQ(irq));
INTC_ClearPendingIRQ(irq);
/* Register address send */
I2C_SendByte(I2Cx, Reg);
/* Wait register address send succes */
while(!INTC_GetPendingIRQ(irq));
INTC_ClearPendingIRQ(irq);
/* Data buffer send byte by byte */
do {
I2C_SendByte(I2Cx, *Data++);
while(!INTC_GetPendingIRQ(irq));
INTC_ClearPendingIRQ(irq);
}while(--Len);
/* Generate a STOP signal in transmission end */
I2C_GenerateSTOP(I2Cx);
}
/**
* @brief Returns the most recent received data by the I2Cx peripheral.
* @param I2Cx: where x can be 1, 2 or 3 to select the I2C peripheral.
* @retval The value of the received byte data.
*/
uint8_t I2C_ReceiveByte(SCIAFSelect_TypeDef I2Cx)
{
uint8_t data = 0;
/* Return the data in the SIO register */
/* Check the parameters */
assert_param(IS_I2C_ALL_PERIPH(I2Cx));
switch(I2Cx)
{
case I2C00:
{
I2C0_TypeDef *I2C_Instance = &SCI0->I2C0;
data = I2C_Instance->SIO;
}
break;
case I2C01:
{
I2C1_TypeDef *I2C_Instance = &SCI0->I2C1;
data = I2C_Instance->SIO;
}
break;
case I2C10:
{
I2C2_TypeDef *I2C_Instance = &SCI0->I2C2;
data = I2C_Instance->SIO;
}
break;
case I2C11:
{
I2C3_TypeDef *I2C_Instance = &SCI0->I2C3;
data = I2C_Instance->SIO;
}
break;
case I2C20:
{
I2C4_TypeDef *I2C_Instance = &SCI1->I2C4;
data = I2C_Instance->SIO;
}
break;
case I2C21:
{
I2C5_TypeDef *I2C_Instance = &SCI1->I2C5;
data = I2C_Instance->SIO;
}
break;
#if defined(BAT32G1XX_80PIN) || defined(BAT32G1XX_100PIN)
case I2C30:
{
I2C6_TypeDef *I2C_Instance = &SCI2->I2C6;
data = I2C_Instance->SIO;
}
break;
case I2C31:
{
I2C7_TypeDef *I2C_Instance = &SCI2->I2C7;
data = I2C_Instance->SIO;
}
break;
#endif
default:
break;
}
return data;
}
/**
* @brief Read a data buffer through the I2Cx peripheral to device register address.
* @param I2Cx: where x can be 1, 2 or 3 to select the I2C peripheral.
* @param Address: Device address in the I2C bus.
* @param Reg: Register address in the Device.
* @param Data: Data buffer address.
* @param Len: Data buffer length need to transmit read.
* @retval None
*/
void I2C_ReadData(SCIAFSelect_TypeDef I2Cx, uint8_t Address, uint8_t Reg, uint8_t *Data, uint16_t Len)
{
IRQn_Type irq;
/* Check the parameters */
assert_param(IS_I2C_ALL_PERIPH(I2Cx));
/* Get the IQR number depend on the I2Cx in SCI unit */
irq = (IRQn_Type)I2C_IRQTable[((I2Cx >> 13) * 4) + (I2Cx & 0x0F)];
/* When the I2C bus start,we should set the bus register mode in Send */
I2C_Set_TransmitMode(I2Cx, I2C_TransmitMode_Send);
/* Generate a START signal to transmission */
I2C_GenerateSTART(I2Cx);
/* Device address send */
I2C_SendByte(I2Cx, Address & 0xFE);
/* Wait device address send succes */
while(!INTC_GetPendingIRQ(irq));
INTC_ClearPendingIRQ(irq);
/* Register address send */
I2C_SendByte(I2Cx, Reg);
/* Wait register address send succes */
while(!INTC_GetPendingIRQ(irq));
INTC_ClearPendingIRQ(irq);
/* I2C bus restart and mode configurated by receive mode */
I2C_GenerateSTOP(I2Cx);
I2C_Set_TransmitMode(I2Cx, I2C_TransmitMode_Recv);
I2C_GenerateSTART(I2Cx);
/* Send device address retry and sign the WR bit to read */
I2C_SendByte(I2Cx, Address | 0x01);
while(!INTC_GetPendingIRQ(irq));
INTC_ClearPendingIRQ(irq);
/* Start to receive data to the dest memory buffer */
do {
/* When the last byte to receive, we should not output ACK */
if(Len == 1U)
I2C_Output_Cmd(I2Cx, DISABLE);
/* Write the virtual data to SIO in order to start receive data */
I2C_SendByte(I2Cx, 0xFFU);
/* Wait the virtual data send success */
while(!INTC_GetPendingIRQ(irq));
INTC_ClearPendingIRQ(irq);
/* Read the receive data from SIO register to target memory buffer */
*Data++ = I2C_ReceiveByte(I2Cx);
}while(--Len);
/* Generate STOP signal to the read flow completed */
I2C_GenerateSTOP(I2Cx);
}
/**
* @brief Clear the specified I2C flag is set.
* @param I2Cx: where x can be 0, 1, 2, 4, 5 to select the I2C peripheral.
* @param I2C_FLAG: specifies the flag to check.
* This parameter can be one of the following values:
* @arg I2C_FLAG_NOACK: Transmission frame have no ack check.
* @arg I2C_FLAG_OVERRUN: Data over run.
* @retval None.
*/
FlagStatus I2C_GetErrStaus(SCIAFSelect_TypeDef I2Cx, uint16_t I2C_FLAG)
{
FlagStatus status;
/* Check the parameters */
assert_param(IS_I2C_ALL_PERIPH(I2Cx));
assert_param(IS_I2C_FLAG(I2C_FLAG));
/* Clear the selected I2C flag */
status = SCI_GetErrStaus(I2Cx,I2C_FLAG);
return status;
}
/**
* @brief Clear the specified I2C flag is set.
* @param I2Cx: where x can be 0, 1, 2, 4, 5 to select the I2C peripheral.
* @param I2C_FLAG: specifies the flag to check.
* This parameter can be one of the following values:
* @arg I2C_CLEAR_FLAG_FEF: Transmission frame data error flag
* @arg I2C_CLEAR_FLAG_PEF: I2C Parity error flag
* @arg I2C_CLEAR_FLAG_OVF: Transmission over run error flag
* @retval None.
*/
void I2C_ClearFlag(SCIAFSelect_TypeDef I2Cx, uint16_t I2C_FLAG)
{
/* Check the parameters */
assert_param(IS_I2C_ALL_PERIPH(I2Cx));
assert_param(IS_I2C_CLEAR_FLAG(I2C_FLAG));
/* Clear the selected I2C flag */
SCI_ClearFlag(I2Cx,I2C_FLAG);
}