diff --git a/Firmware/Source/Device/Cmsemicon/BAT32A279/RTE/CLOCK_Select/RTE_CLOCK_Select_BAT32A279.c b/Firmware/Source/Device/Cmsemicon/BAT32A279/RTE/CLOCK_Select/RTE_CLOCK_Select_BAT32A279.c
index 688700776c17aa60114e404538c9529825a9541b..b2e6e9fc2f1cda0195362350aefe20d8e2729223 100644
--- a/Firmware/Source/Device/Cmsemicon/BAT32A279/RTE/CLOCK_Select/RTE_CLOCK_Select_BAT32A279.c
+++ b/Firmware/Source/Device/Cmsemicon/BAT32A279/RTE/CLOCK_Select/RTE_CLOCK_Select_BAT32A279.c
@@ -11,24 +11,21 @@ uint32_t RTE_SystemCoreClock;
 extern uint32_t SystemCoreClock; 
 void RTE_CLOCK_Select_Start(void)
 {
-	////uint32_t msCnt; 
+
 
 #ifdef USED_FX_FCLK
-/* config clock */
-    CGC_HSEConfig(OSC_OSCILLATOR,OSC_UNDER_10M);
-	CGC_PLL_Setting(PLL_SR_fMX,PLL_DIV_2,PLL_MUL_16);
-	CGC_PLL_CFG_AS_FCLK(); 
-	SystemCoreClockUpdate();
-	RTE_SystemCoreClock = SystemCoreClock;
-	delay_init(64000000);
-	SystemCoreClock = 64000000UL;
+ CGC_Osc_Setting(OSC_OSCILLATOR,OSC_UNDER_10M,OSC_OSCILLATOR,OSC_NORMAL_POWER);
+ CGC_PLL_Setting(PLL_SR_fMX,PLL_DIV_2,PLL_MUL_16);
+ CGC_PLL_CFG_AS_FCLK(); 
+ delay_init(64000000);
+ SystemCoreClock = 64000000UL;
 #endif
 
-#ifdef USED_FHOCO_FCLK	
-	SystemCoreClockUpdate();
-  msCnt = SystemCoreClock / 1000;
-  SysTick_Config(msCnt);
-  delay_init(SystemCoreClock);
+#ifdef USED_FHOCO_FCLK 
+ SystemCoreClockUpdate();
+ msCnt = SystemCoreClock / 1000;
+ SysTick_Config(msCnt);
+ delay_init(SystemCoreClock);
 #endif
 }