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haoJin750TFT
Commit d39519b3 authored by 张金硕's avatar 张金硕
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✨ feat:替换cgc.c文件

parent 6c5b505d
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Firmware/Project/Cmsemicon/BAT32A279/MDK_ARM/HaoJin750TFT.uvprojx
View file @ d39519b3
......@@ -275,7 +275,7 @@
</OCR_RVCT3>
<OCR_RVCT4>
<Type>1</Type>
<StartAddress>0xc400</StartAddress>
<StartAddress>0x0</StartAddress>
<Size>0x73c00</Size>
</OCR_RVCT4>
<OCR_RVCT5>
......
Firmware/Project/Cmsemicon/BAT32A279/MDK_ARM/Objects/HaoJin750TFT.sct
View file @ d39519b3
......@@ -2,8 +2,8 @@
; *** Scatter-Loading Description File generated by uVision ***
; *************************************************************
LR_IROM1 0x0000C400 0x00073C00 { ; load region size_region
ER_IROM1 0x0000C400 0x00073C00 { ; load address = execution address
LR_IROM1 0x00000000 0x00073C00 { ; load region size_region
ER_IROM1 0x00000000 0x00073C00 { ; load address = execution address
*.o (RESET, +First)
*(InRoot$$Sections)
.ANY (+RO)
......
Firmware/Source/Device/Cmsemicon/BAT32A279/Library/Driver/src/cgc.c
View file @ d39519b3
#include "cgc.h"
uint8_t USE_HSE_SYSTYEM_CLOCK = SYSTYEM_CLOCK_CLOSE;
uint8_t USE_HSI_SYSTYEM_CLOCK = SYSTYEM_CLOCK_CLOSE;
uint8_t USE_LSE_SYSTYEM_CLOCK = SYSTYEM_CLOCK_CLOSE;
uint8_t USE_LSI_SYSTYEM_CLOCK = SYSTYEM_CLOCK_CLOSE;
/**
* @brief Enables or disables the PER0 peripheral clock.
* @note After reset, the peripheral clock (used for registers read/write access)
......@@ -107,7 +102,6 @@ void CGC_PER2PeriphClockCmd(uint32_t CGC_PER2Periph, FunctionalState NewState)
CGC->PER2 &= ~CGC_PER2Periph;
}
}
/**
* @brief Enables or disables the PER3 peripheral clock.
* @note After reset, the peripheral clock (used for registers read/write access)
......@@ -155,32 +149,29 @@ void CGC_Osc_Setting(OSC_Pin_Mode_t main,OSC_Speed_Mode_t amph, OSC_Pin_Mode_t s
uint8_t tmp;
tmp = 0x00;
if(main == OSC_PORT )
if(main == OSC_OSCILLATOR)
{
tmp |= (0 << CGC_CMC_EXCLK_Pos) | (0 << CGC_CMC_OSCSEL_Pos);
tmp |= (0 << CGC_CMC_EXCLK_Pos) | (1 << CGC_CMC_OSCSEL_Pos) | (((uint8_t)amph) << CGC_CMC_AMPH_Pos);
}
if(sub == OSC_PORT )
else if(main == OSC_PORT )
{
tmp |= (0 << CGC_CMC_EXCLKS_Pos) | (0 << CGC_CMC_OSCSELS_Pos);
tmp |= (0 << CGC_CMC_EXCLK_Pos) | (0 << CGC_CMC_OSCSEL_Pos);
}
if(main == OSC_OSCILLATOR)
else if(main == OSC_EXCLK)
{
tmp |= (0 << CGC_CMC_EXCLK_Pos) | (1 << CGC_CMC_OSCSEL_Pos) | (1 << CGC_CMC_AMPH_Pos);
tmp |= (1 << CGC_CMC_EXCLK_Pos) | (1 << CGC_CMC_OSCSEL_Pos);
}
if(sub == OSC_OSCILLATOR)
{
tmp |= (0 << CGC_CMC_EXCLKS_Pos) | (1 << CGC_CMC_OSCSELS_Pos) | (1 << CGC_CMC_AMPHS_Pos);
tmp |= (0 << CGC_CMC_EXCLKS_Pos) | (1 << CGC_CMC_OSCSELS_Pos) | (((uint8_t)amphs) << CGC_CMC_AMPHS_Pos);
}
if(main == OSC_EXCLK)
else if(sub == OSC_PORT )
{
tmp |= (1 << CGC_CMC_EXCLK_Pos) | (1 << CGC_CMC_OSCSEL_Pos);
tmp |= (0 << CGC_CMC_EXCLKS_Pos) | (0 << CGC_CMC_OSCSELS_Pos);
}
if(sub == OSC_EXCLK)
else if(sub == OSC_EXCLK)
{
tmp |= (1 << CGC_CMC_EXCLKS_Pos) | (1 << CGC_CMC_OSCSELS_Pos);
}
......@@ -188,7 +179,7 @@ void CGC_Osc_Setting(OSC_Pin_Mode_t main,OSC_Speed_Mode_t amph, OSC_Pin_Mode_t s
CGC->CMC = tmp;
/* Set fMX */
CGC->CSC &= ~(1<<7) ; //MSTOP = 0
CGC->CSC &= ~(1 << CGC_CSC_MSTOP_Pos) ; //MSTOP = 0
if(main == OSC_OSCILLATOR)
{
......@@ -203,7 +194,7 @@ void CGC_Osc_Setting(OSC_Pin_Mode_t main,OSC_Speed_Mode_t amph, OSC_Pin_Mode_t s
}
/* Set fSUB */
CGC->CSC &= ~(1<<6) ; //XTSTOP = 0
CGC->CSC &= ~(1 << CGC_CSC_XTSTOP_Pos) ; //XTSTOP = 0
if(sub == OSC_OSCILLATOR)
{
......@@ -234,25 +225,24 @@ void CGC_Osc_Setting(OSC_Pin_Mode_t main,OSC_Speed_Mode_t amph, OSC_Pin_Mode_t s
*/
void CGC_LSEConfig(OSC_Pin_Mode_t sub, OSC_Power_Mode_t amphs)
{
/* Check the parameters */
assert_param(IS_CGC_LSE_MODE(sub));
assert_param(IS_CGC_LSE_PWR_MODE(amphs));
volatile uint32_t w_count;
uint8_t tmp;
/* Check the parameters */
assert_param(IS_CGC_OSC_PIN_MODE(sub));
assert_param(IS_CGC_LSE_PWR_MODE(amphs));
tmp = 0x00;
if(sub == OSC_PORT )
{
tmp |= (0 << CGC_CMC_EXCLKS_Pos) | (0 << CGC_CMC_OSCSELS_Pos);
}
if(sub == OSC_OSCILLATOR)
{
tmp |= (0 << CGC_CMC_EXCLKS_Pos) | (1 << CGC_CMC_OSCSELS_Pos) | (amphs << CGC_CMC_AMPHS_Pos);
tmp |= (0 << CGC_CMC_EXCLKS_Pos) | (1 << CGC_CMC_OSCSELS_Pos) | (((uint8_t)amphs) << CGC_CMC_AMPHS_Pos);
}
if(sub == OSC_EXCLK)
else if(sub == OSC_PORT)
{
tmp |= (0 << CGC_CMC_EXCLKS_Pos) | (0 << CGC_CMC_OSCSELS_Pos);
}
else if(sub == OSC_EXCLK)
{
tmp |= (1 << CGC_CMC_EXCLKS_Pos) | (1 << CGC_CMC_OSCSELS_Pos);
}
......@@ -260,7 +250,7 @@ void CGC_LSEConfig(OSC_Pin_Mode_t sub, OSC_Power_Mode_t amphs)
CGC->CMC = tmp;
/* Set fSUB */
CGC->CSC &= ~(1<<6) ; //XTSTOP = 0
CGC->CSC &= ~(1 << CGC_CSC_XTSTOP_Pos) ; //XTSTOP = 0
if(sub == OSC_OSCILLATOR)
{
......@@ -275,7 +265,7 @@ void CGC_LSEConfig(OSC_Pin_Mode_t sub, OSC_Power_Mode_t amphs)
/**
* @brief Configures the External High Speed oscillator (HSE).
* @note External High Speed oscillator clock source can be choose from PORT
* @note External High Speed oscillator clock source can be choose from PORT��
* OSC_OSCILLATOR or external input clock.
* at same time, OSC_OSCILLATOR can be 1MHz < fx < 10MHz or 10MHz < fx < 20MHz
* @param pinMode
......@@ -290,27 +280,25 @@ void CGC_LSEConfig(OSC_Pin_Mode_t sub, OSC_Power_Mode_t amphs)
*/
void CGC_HSEConfig(OSC_Pin_Mode_t main, OSC_Speed_Mode_t amph)
{
/* Check the parameters */
assert_param(IS_CGC_LSE_MODE(main));
assert_param(IS_CGC_HSE_OSC_SPEED(amph));
volatile uint32_t w_count;
uint8_t temp_stab_set;
uint8_t temp_stab_wait;
uint8_t tmp;
/* Check the parameters */
assert_param(IS_CGC_OSC_PIN_MODE(main));
assert_param(IS_CGC_HSE_OSC_SPEED(amph));
tmp = 0x00;
if(main == OSC_PORT )
{
tmp |= (0 << CGC_CMC_EXCLK_Pos) | (0 << CGC_CMC_OSCSEL_Pos);
}
if(main == OSC_OSCILLATOR)
{
tmp |= (0 << CGC_CMC_EXCLK_Pos) | (1 << CGC_CMC_OSCSEL_Pos) | (amph << CGC_CMC_AMPH_Pos);
tmp |= (0 << CGC_CMC_EXCLK_Pos) | (1 << CGC_CMC_OSCSEL_Pos) | (((uint8_t)amph) << CGC_CMC_AMPH_Pos);
}
if(main == OSC_EXCLK)
else if(main == OSC_PORT )
{
tmp |= (0 << CGC_CMC_EXCLK_Pos) | (0 << CGC_CMC_OSCSEL_Pos);
}
else if(main == OSC_EXCLK)
{
tmp |= (1 << CGC_CMC_EXCLK_Pos) | (1 << CGC_CMC_OSCSEL_Pos);
}
......@@ -318,7 +306,7 @@ void CGC_HSEConfig(OSC_Pin_Mode_t main, OSC_Speed_Mode_t amph)
CGC->CMC = tmp;
/* Set fMX */
CGC->CSC &= ~(1<<7) ; //MSTOP = 0
CGC->CSC &= ~(1 << CGC_CSC_MSTOP_Pos) ; //MSTOP = 0
if(main == OSC_OSCILLATOR)
{
......@@ -333,6 +321,18 @@ void CGC_HSEConfig(OSC_Pin_Mode_t main, OSC_Speed_Mode_t amph)
}
}
/* Clock switching needs to be executed in SRAM */
#if defined (__CC_ARM)
#pragma arm section code = "RW_FUNC_PLL" // Arm Compiler 5
#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION > 6010050)
#pragma clang section text = "RW_FUNC_PLL" // Arm Compiler 6
#endif
#if defined(__ICCARM__)
__ramfunc
#endif
/**
* @brief Enables External Low Speed oscillator (LSE/Fsub) used as CPU
* system clock and Clock source of peripheral hardware circuit.
......@@ -342,9 +342,12 @@ void CGC_HSEConfig(OSC_Pin_Mode_t main, OSC_Speed_Mode_t amph)
void CGC_LSE_CFG_AS_FCLK()
{
CGC->CKC = (1 << CGC_CKC_CSS_Pos) | (0 << CGC_CKC_MCM0_Pos);
__NOP();
__NOP();
__NOP();
__NOP();
while ((CGC->CKC & CGC_CKC_CLS_Msk) == 0);
USE_LSE_SYSTYEM_CLOCK = SYSTYEM_CLOCK_OPEN;
}
/**
......@@ -356,8 +359,11 @@ void CGC_LSE_CFG_AS_FCLK()
void CGC_HSE_CFG_AS_FCLK()
{
CGC->CKC = (0 << CGC_CKC_CSS_Pos) | (1 << CGC_CKC_MCM0_Pos );
__NOP();
__NOP();
__NOP();
__NOP();
while((CGC->CKC & CGC_CKC_MCS_Msk) == 0);
USE_HSE_SYSTYEM_CLOCK = SYSTYEM_CLOCK_OPEN;
}
/**
......@@ -369,12 +375,48 @@ void CGC_HSE_CFG_AS_FCLK()
*/
void CGC_HSI_CFG_AS_FCLK()
{
CGC->CKC = 0 << CGC_CKC_CSS_Pos ;
if (CGC->MCKC & CGC_MCKC_CKSTR_Msk)
{
CGC->MCKC &= ~(1 << CGC_MCKC_CKSELR_Pos);
__NOP();
__NOP();
__NOP();
__NOP();
while(CGC->MCKC & CGC_MCKC_CKSTR_Msk);
}
CGC->CKC = (0 << CGC_CKC_CSS_Pos) | (0 << CGC_CKC_MCM0_Pos );
__NOP();
__NOP();
__NOP();
__NOP();
while((CGC->CKC & (CGC_CKC_CSS_Msk | CGC_CKC_MCS_Msk)));
}
/**
* @brief Enables output frequency by PLL used as CPU
* system clock and Clock source of peripheral hardware circuit.
* @note
* @retval None
*/
void CGC_PLL_CFG_AS_FCLK(void)
{
CGC->MCKC |= (1 << CGC_MCKC_CKSELR_Pos);
__NOP();
__NOP();
__NOP();
__NOP();
while((CGC->MCKC & CGC_MCKC_CKSTR_Msk) == 0);
while((CGC->CKC & CGC_CKC_CSS_Msk) == 1);
USE_HSI_SYSTYEM_CLOCK = SYSTYEM_CLOCK_OPEN;
CGC->CKC = (0 << CGC_CKC_CSS_Pos) | (0 << CGC_CKC_MCM0_Pos );
__NOP();
__NOP();
__NOP();
__NOP();
while(CGC->CKC & CGC_CKC_CSS_Msk);
}
#if 0
/**
* @brief Enables External High Speed oscillator (HSE) used as MAIN system clock
* which can provided for clock output/buzzer or CPU/peripheral hardware circuit.
......@@ -383,7 +425,11 @@ void CGC_HSI_CFG_AS_FCLK()
*/
void CGC_HSE_CFG_AS_FMAIN()
{
CGC->CKC = 1 << CGC_CKC_MCM0_Pos;
CGC->CKC = (1 << CGC_CKC_MCM0_Pos);
__NOP();
__NOP();
__NOP();
__NOP();
while((CGC->CKC & CGC_CKC_MCS_Msk) == 0);
}
/**
......@@ -394,9 +440,20 @@ void CGC_HSE_CFG_AS_FMAIN()
*/
void CGC_HSI_CFG_AS_FMAIN()
{
CGC->CKC = 0 << CGC_CKC_MCM0_Pos;
while((CGC->CKC & CGC_CKC_MCS_Msk) == 1);
CGC->CKC = (0 << CGC_CKC_MCM0_Pos);
__NOP();
__NOP();
__NOP();
__NOP();
while(CGC->CKC & CGC_CKC_MCS_Msk);
}
#endif
#if defined (__CC_ARM)
#pragma arm section code // Arm Compiler 5
#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION > 6010050)
#pragma clang section text = "" // Arm Compiler 6
#endif
/**
* @brief Setting PLL used as system clock and Clock source of peripheral hardware circuit.
......@@ -451,7 +508,7 @@ void CGC_PLL_Setting(PLL_Src_t src, PLL_Div_t div, PLL_Mul_t mul)
CGC->PLLCR = tmp;
CGC->PLLCR |= 1<<0; /* PLLON = 1 */
CGC->PLLCR |= (1 << CGC_PLLCR_PLLON_Pos); /* PLLON = 1 */
for (i = 0U; i <= 2000; i++)
{
__NOP();
......@@ -459,19 +516,6 @@ void CGC_PLL_Setting(PLL_Src_t src, PLL_Div_t div, PLL_Mul_t mul)
}
/**
* @brief Enables output frequency by PLL used as CPU
* system clock and Clock source of peripheral hardware circuit.
* @note
* @retval None
*/
__attribute__((section("RW_FUNC_PLL"))) void CGC_PLL_CFG_AS_FCLK(void)
{
CGC->MCKC = 0x01;
while((CGC->MCKC & CGC_MCKC_CKSTR_Msk) == 0);
USE_HSE_SYSTYEM_CLOCK = SYSTYEM_CLOCK_OPEN;
}
/**
* @brief This function stops the main system clock oscilator (MOSC).
* @param None
......@@ -479,7 +523,7 @@ __attribute__((section("RW_FUNC_PLL"))) void CGC_PLL_CFG_AS_FCLK(void)
*/
void CGC_MainOsc_Stop(void)
{
CGC->CSC |= 1<<7; /* MSTOP = 1 */
CGC->CSC |= (1 << CGC_CSC_MSTOP_Pos); /* MSTOP = 1 */
}
/**
......@@ -489,7 +533,7 @@ void CGC_MainOsc_Stop(void)
*/
void CGC_MainOsc_Start(void)
{
CGC->CSC &= ~(1<<7); /* MSTOP = 0 */
CGC->CSC &= ~(1 << CGC_CSC_MSTOP_Pos); /* MSTOP = 0 */
}
/**
......@@ -499,7 +543,7 @@ void CGC_MainOsc_Start(void)
*/
void CGC_SubOsc_Stop(void)
{
CGC->CSC |= 1<<6; /* XTSTOP = 1 */
CGC->CSC |= (1 << CGC_CSC_XTSTOP_Pos); /* XTSTOP = 1 */
}
/**
......@@ -509,7 +553,7 @@ void CGC_SubOsc_Stop(void)
*/
void CLK_SubOsc_Start(void)
{
CGC->CSC &= ~(1<<6); /* XTSTOP = 0 */
CGC->CSC &= ~(1 << CGC_CSC_XTSTOP_Pos); /* XTSTOP = 0 */
}
/**
......@@ -519,7 +563,7 @@ void CLK_SubOsc_Start(void)
*/
void CGC_Hoco_Stop(void)
{
CGC->CSC |= 1<<0; /* HIOSTOP = 1 */
CGC->CSC |= (1 << CGC_CSC_HIOSTOP_Pos); /* HIOSTOP = 1 */
}
/**
......@@ -529,5 +573,5 @@ void CGC_Hoco_Stop(void)
*/
void CGC_Hoco_Start(void)
{
CGC->CSC &= ~(1<<0); /* HIOSTOP = 0 */
CGC->CSC &= ~(1 << CGC_CSC_HIOSTOP_Pos); /* HIOSTOP = 0 */
}
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