/******************************************************************************
* $Revision: 414 $
* $Date: 2015-03-27 15:15:51 +0900$
*****************************************************************************/
/* __DISCLAIMER_START__ */
/******************************************************************************
* (c) 2014-2016, Cypress Semiconductor Corporation
* or a subsidiary of Cypress Semiconductor Corporation. All rights
* reserved.
*
* This software, including source code, documentation and related
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/*****************************************************************************/
/** \file standalone_tcflash.icf
**
**
** History:
** - 2016-09-26 0.01 WO Initial version for Traveo
*****************************************************************************/
//
// for S6J3400
//
/* Memory area start addresses */
define symbol start_addr_tcmram_private = 0x00000000; /*RAM*/
define symbol start_addr_tcflash_private_small_0_tcm = 0x009F0000; /*BOOTROM 勿动 */
define symbol start_addr_tcflash_private_small_1_7_tcm = 0x009F2000; /*BOOTROM 勿动 */
define symbol start_addr_tcflash_private_big_tcm = 0x00A20010; /* APP Flash起始地址 芯片内部访问的地址*/
define symbol start_addr_tcflash_private_small_0_axi = 0x019F0000; /*BOOTROM 勿动 */
define symbol start_addr_tcflash_private_small_1_7_axi = 0x019F2000; /*BOOTROM 勿动 */
define symbol start_addr_tcflash_private_big_axi = 0x01A20010; /*APP Flash起始地址 用于刷写的地址 0x01A20000-0x01A2000F 用于刷写app 标志位*/
define symbol start_addr_bakupram = 0x02000000; /*BackupRam起始地址*/
define symbol start_addr_sysram = 0x02006000; /*普通Ram起始地址*/
define symbol start_addr_tcmram_public_core0 = 0x04000000; /* 勿动 */
define symbol start_addr_tcflash_public_core0_small_0_axi = 0x059F0000; /* 勿动 */
define symbol start_addr_tcflash_public_core0_small_1_7_axi = 0x059F2000; /* 勿动 */
define symbol start_addr_tcflash_public_core0_big_axi = 0x05A00000; /* 勿动 */
define symbol start_addr_workflash_mirror1 = 0x0E000000; /* WorkFlash勿动 */
define symbol start_addr_workflash_mirror3 = 0x0E200000; /* WorkFlash勿动 */
define symbol start_addr_workflash_mirror4 = 0x0E300000; /* WorkFlash勿动 */
define symbol start_addr_bakupram_mirror = 0x0E800000; /* WorkFlash勿动 */
define symbol start_addr_sysram_mirror = 0x0E806000;
/* Memory area sizes */
define symbol size_tcmram = 0x00020000; // 128 KB /*普通RAM 128K*/
define symbol size_tcflash_small_0 = 0x00002000; // 8 KB (Flash Marker) /*勿动*/
define symbol size_tcflash_small_1_7 = 0x00006000; // 24 KB /*BACKUPRAM大小 勿动*/
define symbol size_tcflash_big = 0x001DFFE0; // 2048 KB -128KB - 32BYTE
define symbol size_bakupram = 0x00006000; // 24 KB
define symbol size_sysram = 0x0001A000; // 104 KB
define symbol size_workflash_mirror1 = 0x0001C000; // 112 KB
define symbol size_workflash_mirror3 = 0x0001C000; // 112 KB
define symbol size_workflash_mirror4 = 0x0001C000; // 112 KB
/* Heap & stack sizes */
define symbol heap_reserve = 0x1000;
define symbol usr_stack_size = 0x2000;
define symbol svc_stack_size = 0x80;
define symbol irq_stack_size = 0x800;
define symbol fiq_stack_size = 0x800;
define symbol und_stack_size = 0x80;
define symbol abt_stack_size = 0x80;
/* Memory definition */
define memory mem with size = 4G;
/* Region definitions */
/* Areas with "private" in the name are only accessible by the CPU core for which this linker file is intended.*/
/* Mirror areas with "public" in the name exist which are accessible by all masters (e.g. DMA, GFX subsystem) */
/* in the MCU and have unique addresses per CPU core */
define region tcmram_private = mem:[from start_addr_tcmram_private size size_tcmram ];
define region tcflash_private_small_0_tcm = mem:[from start_addr_tcflash_private_small_0_tcm size size_tcflash_small_0 ];
define region tcflash_private_small_1_7_tcm = mem:[from start_addr_tcflash_private_small_1_7_tcm size size_tcflash_small_1_7 ];
define region tcflash_private_big_tcm = mem:[from start_addr_tcflash_private_big_tcm size size_tcflash_big ];
define region tcflash_private_small_0_axi = mem:[from start_addr_tcflash_private_small_0_axi size size_tcflash_small_0 ];
define region tcflash_private_small_1_7_axi = mem:[from start_addr_tcflash_private_small_1_7_axi size size_tcflash_small_1_7 ];
define region tcflash_private_big_axi = mem:[from start_addr_tcflash_private_big_axi size size_tcflash_big ];
define region bakupram = mem:[from start_addr_bakupram size size_bakupram ];
define region sysram = mem:[from start_addr_sysram size size_sysram ];
define region tcmram_public_core0 = mem:[from start_addr_tcmram_public_core0 size size_tcmram ];
define region tcflash_public_core0_small_0_axi = mem:[from start_addr_tcflash_public_core0_small_0_axi size size_tcflash_small_0 ];
define region tcflash_public_core0_small_1_7_axi = mem:[from start_addr_tcflash_public_core0_small_1_7_axi size size_tcflash_small_1_7 ];
define region tcflash_public_core0_big_axi = mem:[from start_addr_tcflash_public_core0_big_axi size size_tcflash_big ];
define region workflash_mirror1 = mem:[from start_addr_workflash_mirror1 size size_workflash_mirror1 ];
define region workflash_mirror3 = mem:[from start_addr_workflash_mirror3 size size_workflash_mirror3 ];
define region workflash_mirror4 = mem:[from start_addr_workflash_mirror4 size size_workflash_mirror4 ];
define region bakupram_mirror = mem:[from start_addr_bakupram_mirror size size_bakupram ];
define region sysram_mirror = mem:[from start_addr_sysram_mirror size size_sysram ];
/* Memory block definition */
define block HEAP with alignment = 8, size = heap_reserve { };
define block USR_STACK with alignment = 8, size = usr_stack_size { };
define block SVC_STACK with alignment = 8, size = svc_stack_size { };
define block IRQ_STACK with alignment = 8, size = irq_stack_size { };
define block FIQ_STACK with alignment = 8, size = fiq_stack_size { };
define block UND_STACK with alignment = 8, size = und_stack_size { };
define block ABT_STACK with alignment = 8, size = abt_stack_size { };
define block FLASH_MARKER with alignment = 1, fixed order {
section .MK,
section .DDR,
section .BDR,
section .WDR,
};
// Content for TCMRAM is defined with fixed order here, so that no static variables will be
// linked to address 0 (which could lead false positive SW errors due to NULL pointer checks)
define block TCMRAM_CONTENT with alignment = 8, fixed order {
block USR_STACK,
block FIQ_STACK,
block IRQ_STACK,
block SVC_STACK,
block ABT_STACK,
block UND_STACK,
block HEAP,
readwrite,
};
/* Init handling directives */
initialize by copy {
readwrite,
};
do not initialize {
section .noinit,
section .bss, // Zero-Init of .bss done by DMA during start-up
section BACKUP_RAM_CONTENT
};
"BACKUP RAM Content":
place in bakupram {
readwrite section BACKUP_RAM_CONTENT
};
initialize manually
{
section BACKUP_RAM_CONTENT
};
/* Section/block assignment */
"Default Program Entry":
place at start of tcflash_private_big_axi { section .BOOTSTART };
"TCFLASH Content":
place in tcflash_private_big_axi {
readonly,
};
"TCMRAM Content":
place in tcmram_private {
block TCMRAM_CONTENT
};
"Flash Marker Content":
place in tcflash_private_small_0_axi {
block FLASH_MARKER // Must be placed at the start of small sector 0
};