🔧 build:更新驱动文件

Firmware/Project/Cmsemicon/BAT32A239/MDK_ARM/RMR42E.uvprojx

@@ -768,16 +768,6 @@
               <FileType>5</FileType>
               <FilePath>..\..\..\..\Source\Device\Cmsemicon\BAT32A239\RTE\GPIO\RTE_GPIO_BAT32A239.h</FilePath>
             </File>
-            <File>
-              <FileName>UART.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\..\..\Source\Device\Cmsemicon\BAT32A239\RTE\UART\UART.c</FilePath>
-            </File>
-            <File>
-              <FileName>UART.h</FileName>
-              <FileType>5</FileType>
-              <FilePath>..\..\..\..\Source\Device\Cmsemicon\BAT32A239\RTE\UART\UART.h</FilePath>
-            </File>
             <File>
               <FileName>DeepSleep.c</FileName>
               <FileType>1</FileType>
@@ -838,6 +828,16 @@
               <FileType>1</FileType>
               <FilePath>..\..\..\..\Source\Device\Cmsemicon\BAT32A239\RTE\CLOCK_Select\RTE_CLOCK_Select_BAT32A239.c</FilePath>
             </File>
+            <File>
+              <FileName>UART_DEMO.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\Source\Device\Cmsemicon\BAT32A239\RTE\UART\UART_DEMO.c</FilePath>
+            </File>
+            <File>
+              <FileName>UART_DEMO.h</FileName>
+              <FileType>5</FileType>
+              <FilePath>..\..\..\..\Source\Device\Cmsemicon\BAT32A239\RTE\UART\UART_DEMO.h</FilePath>
+            </File>
           </Files>
         </Group>
         <Group>

Firmware/Source/Application/CAN_User/Can_User.c

@@ -52,7 +52,7 @@ void Can_RX_Apply_Buff(void)
     CAN_RecvMsg.Data[5] = 0;
     CAN_RecvMsg.Data[6] = 0;
     CAN_RecvMsg.Data[7] = 0;
-    // CAN_RecvMsg.OverWriteConfig = 0;
+    CAN_RecvMsg.OverWriteConfig = 0;
 
     #if (PART_NUMBER == RMR42E_60)
         CAN_RecvMsg.Id = 0x125;
@@ -148,7 +148,7 @@ void Can_RX_Apply_Buff(void)
     #else
         CAN_RecvMsg.Id = 0x1FF;
         CAN_RecvMsg.IDE = CAN_Id_Standard;
-        CAN_RecvMsg.CacheType = CAN_CacheType_Rx_1Mask;
+        CAN_RecvMsg.CacheType = CAN_CacheType_Rx_Mask1;
         CAN_RecvMsg.RTR = CAN_RTR_Data;
         CAN_RecvMsg.Interrupt = ENABLE;
         CAN_MessageCache_DeInit(CAN0MSG00);
@@ -157,7 +157,7 @@ void Can_RX_Apply_Buff(void)
 
         CAN_RecvMsg.Id = 0x2FF;
         CAN_RecvMsg.IDE = CAN_Id_Standard;
-        CAN_RecvMsg.CacheType = CAN_CacheType_Rx_1Mask;
+        CAN_RecvMsg.CacheType = CAN_CacheType_Rx_Mask2;
         CAN_RecvMsg.RTR = CAN_RTR_Data;
         CAN_RecvMsg.Interrupt = ENABLE;
         CAN_MessageCache_DeInit(CAN0MSG01);
@@ -166,7 +166,7 @@ void Can_RX_Apply_Buff(void)
 
         CAN_RecvMsg.Id = 0x3FF;
         CAN_RecvMsg.IDE = CAN_Id_Standard;
-        CAN_RecvMsg.CacheType = CAN_CacheType_Rx_1Mask;
+        CAN_RecvMsg.CacheType = CAN_CacheType_Rx_Mask3;
         CAN_RecvMsg.RTR = CAN_RTR_Data;
         CAN_RecvMsg.Interrupt = ENABLE;
         CAN_MessageCache_DeInit(CAN0MSG02);
@@ -175,7 +175,7 @@ void Can_RX_Apply_Buff(void)
 
         CAN_RecvMsg.Id = 0x7FF;
         CAN_RecvMsg.IDE = CAN_Id_Standard;
-        CAN_RecvMsg.CacheType = CAN_CacheType_Rx_1Mask;
+        CAN_RecvMsg.CacheType = CAN_CacheType_Rx_Mask4;
         CAN_RecvMsg.RTR = CAN_RTR_Data;
         CAN_RecvMsg.Interrupt = ENABLE;
         CAN_MessageCache_DeInit(CAN0MSG03);

Firmware/Source/Application/CommonInterface/CommonInterface.h

@@ -17,11 +17,6 @@ typedef enum
     CAN_SIG_LOST = 0x55U,
 } CAN_MSG_Status_t;
 
-typedef enum
-{
-    EX_OK = 0u,
-    EX_ERR,
-} _Fun_Res;
 
 typedef enum
 {

Firmware/Source/Application/SEG_DISPLAY/SEG_DISPLAY.h

@@ -40,6 +40,12 @@ enum
   Gear_OFF,      //D
 }; 
 
+typedef enum
+{
+    EX_OK = 0u,
+    EX_ERR,
+} _Fun_Res;
+
 /**@brief 边框线显示函数*/
 _Fun_Res SEG_SET_Frame(uint8_t m_Flag);
 

Firmware/Source/Device/Cmsemicon/BAT32A239/Library/Driver/include/can.h

@@ -34,9 +34,10 @@
   * @{
   */
 
-/** @addtogroup CAN
+/** @addtogroup CAN   
   * @{
   */
+#define LIST_BUF_MAX_NUM 	23
 
 /* Exported types ------------------------------------------------------------*/
 #define MAX_CAN_MSGCACHE_CNT			((uint8_t)0x10)
@@ -132,8 +133,21 @@ typedef struct
 
 	uint8_t Data[8];	/*!< Contains the data to be transmitted. It ranges from 0 
 						to 0xFF. */
+						
+	uint8_t OverWriteConfig;	/*!< Specifies the CAN message mail cache over write config
+						This parameter can be a value for ENABLE or DISABLE */	
 } CanTxRxMsg;
 
+/** 
+  * @brief  CAN Rx message history list
+  */
+typedef struct
+{
+	uint16_t  Head;
+	uint16_t  Tail;
+	uint16_t	length;
+	CanTxRxMsg data[LIST_BUF_MAX_NUM];
+}CANBuffList_t;
 
 /** @defgroup CAN_InitStatus 
   * @{
@@ -280,14 +294,14 @@ typedef struct
   */
 #define CAN_CacheType_Tx		((uint8_t)0x00)
 #define CAN_CacheType_Rx_NoMask	((uint8_t)0x01)
-#define CAN_CacheType_Rx_1Mask	((uint8_t)0x02)
-#define CAN_CacheType_Rx_2Mask	((uint8_t)0x03)
-#define CAN_CacheType_Rx_3Mask	((uint8_t)0x04)
-#define CAN_CacheType_Rx_4Mask	((uint8_t)0x05)
+#define CAN_CacheType_Rx_Mask1	((uint8_t)0x02)
+#define CAN_CacheType_Rx_Mask2	((uint8_t)0x03)
+#define CAN_CacheType_Rx_Mask3	((uint8_t)0x04)
+#define CAN_CacheType_Rx_Mask4	((uint8_t)0x05)
 
 #define IS_CAN_CACHETYPE(TYPE)	(((TYPE) == CAN_CacheType_Tx) || ((TYPE) == CAN_CacheType_Rx_NoMask) || \
-								((TYPE) == CAN_CacheType_Rx_1Mask) || ((TYPE) == CAN_CacheType_Rx_2Mask) || \
-								((TYPE) == CAN_CacheType_Rx_3Mask) || ((TYPE) == CAN_CacheType_Rx_4Mask))
+								((TYPE) == CAN_CacheType_Rx_Mask1) || ((TYPE) == CAN_CacheType_Rx_Mask2) || \
+								((TYPE) == CAN_CacheType_Rx_Mask3) || ((TYPE) == CAN_CacheType_Rx_Mask4))
 
 /** @defgroup CAN_identifier_type 
   * @{
@@ -364,6 +378,17 @@ typedef struct
 #define CAN_CCTRL_AL_MASK		((uint16_t)0x0040)
 #define CAN_CCTRL_VALID_MASK	((uint16_t)0x0020)
 
+#define CAN_CCTRL_PSMODE_IDLE 				((uint16_t)0x0018U)
+#define CAN_CCTRL_PSMODE_SLEEP 				((uint16_t)0x0810U)//0x0800U
+#define CAN_CCTRL_PSMODE_STOP 				((uint16_t)0x1800U)
+
+#define CAN_CCTRL_OPMODE_IDLE 				((uint16_t)0x0007U)
+#define CAN_CCTRL_OPMODE_NORMAL 			((uint16_t)0x0106U)//0x0100U
+#define CAN_CCTRL_OPMODE_NORMAL_ABT 	((uint16_t)0x0205U)//0x0200U
+#define CAN_CCTRL_OPMODE_ONLY_RX 			((uint16_t)0x0304U)//0x0300U
+#define CAN_CCTRL_OPMODE_SHOT 				((uint16_t)0x0403U)//0x0400U
+#define CAN_CCTRL_OPMODE_TEST 				((uint16_t)0x0502U)//0x0500U
+
 /*******************  Bit definition for CLEC register  ********************/
 #define CAN_CLEC_ERRNONE_MASK	((uint8_t)0x00)
 #define CAN_CLEC_ERRFILL_MASK	((uint8_t)0x01)
@@ -382,6 +407,14 @@ typedef struct
 #define CAN_GET_TECS(CINFO)		((uint8_t)(((CINFO) & CAN_CINFO_TECS_MASK) >> 2))
 #define CAN_GET_RECS(CINFO)		((uint8_t)(((CINFO) & CAN_CINFO_RECS_MASK) >> 0))
 
+/*******************  Bit definition for INTS register  ********************/
+#define CAN_INTS_TX_READ 			((uint8_t)0x0001U)
+#define CAN_INTS_RX_READ 			((uint8_t)0x0002U)
+#define CAN_INTS_ERR_READ 		((uint8_t)0x0004U)
+#define CAN_INTS_PERR_READ	  ((uint8_t)0x0008U)
+#define CAN_INTS_AL_READ 			((uint8_t)0x0010U)
+#define CAN_INTS_WK_READ 			((uint8_t)0x0020U)
+
 /*******************  Bit definition for CERC register  ********************/
 #define CAN_CERC_REPS_MASK		((uint16_t)0x8000)
 #define CAN_CERC_REC_MASK		((uint16_t)0x7F00)
@@ -512,8 +545,11 @@ void CAN_MessageCache_OverWriteConfig(CANMSG_Type *CANxMSGy, FunctionalState New
 uint8_t CAN_Transmit(CANMSG_Type *CANxMSGy, CanTxRxMsg* TxMessage);
 
 /* Function used to receive CAN frame data from message cache to RxMessage, timeout unit is system clock tick */
-uint8_t CAN_Receive(CAN_Type* CANx, CANMSG_Type *CANxMSGy, CanTxRxMsg* RxMessage, uint32_t Timeout);
-uint8_t CAN_Receive_IT(CAN_Type* CANx, CANMSG_Type *CANxMSGy, CanTxRxMsg* RxMessage);
+uint8_t CAN_Receive(CAN_Type* CANx, CanTxRxMsg* RxMessage, uint32_t Timeout);
+
+void CAN_Receive_IT(CAN_Type* CANx, CANBuffList_t *listbuf);
+
+uint8_t CANErr_Recover(CAN_Type* CANx);
 
 /* CAN Bus Error management functions *****************************************/
 uint8_t CAN_GetLastErrorCode(CAN_Type* CANx);

Firmware/Source/Device/Cmsemicon/BAT32A239/Library/Driver/include/gpio.h

@@ -12,33 +12,33 @@ typedef enum
 	GPIO_Control_DIG   = 0, /*!< GPIO Control Digital */
 	GPIO_Control_ANA	 = 1, /*!< GPIO Control Analogy  */
 }GPIOControl_TypeDef;
-#define IS_GPIO_Control(Ctrl) (((Ctrl) == GPIO_Control_ANA)  || ((Ctrl) == GPIO_Control_DIG) )? 1:0
+#define IS_GPIO_Control(Ctrl) (((Ctrl) == GPIO_Control_ANA)  || ((Ctrl) == GPIO_Control_DIG) )
 
 typedef enum
 { 
 	GPIO_Mode_OUT  = 0, /*!< GPIO Output Mode */
 	GPIO_Mode_IN	 = 1, /*!< GPIO Input Mode */
 }GPIOMode_TypeDef;
-#define IS_GPIO_MODE(MODE) (((MODE) == GPIO_Mode_IN)  || ((MODE) == GPIO_Mode_OUT) )? 1:0
+#define IS_GPIO_MODE(MODE) (((MODE) == GPIO_Mode_IN)  || ((MODE) == GPIO_Mode_OUT) )
 
 typedef enum
 { 
-	GPIO_OType_PP = 0,//普通输?
-	GPIO_OType_OD = 1 //开漏输?
+	GPIO_OType_PP = 0,//普通输出
+	GPIO_OType_OD = 1 //开漏输出
 }GPIOOType_TypeDef;
-#define IS_GPIO_OTYPE(OTYPE) (((OTYPE) == GPIO_OType_PP) || ((OTYPE) == GPIO_OType_OD))? 1:0
+#define IS_GPIO_OTYPE(OTYPE) (((OTYPE) == GPIO_OType_PP) || ((OTYPE) == GPIO_OType_OD))
 typedef enum
 { 
 	GPIO_PuPd_NOPULL = 0x00,
-	GPIO_PuPd_UP     = 0x01,    
+	GPIO_PuPd_UP     = 0x01,
 	GPIO_PuPd_DOWN   = 0x02
 }GPIOPuPd_TypeDef;
 #define IS_GPIO_PUPD(PUPD) (((PUPD) == GPIO_PuPd_NOPULL) || ((PUPD) == GPIO_PuPd_UP) || \
-                            ((PUPD) == GPIO_PuPd_DOWN))? 1:0
+                            ((PUPD) == GPIO_PuPd_DOWN))
 typedef enum
 { 
 	GPIO_Level_LOW	= 0x00,
-	GPIO_Level_HIGH = 0x01,
+	GPIO_Level_HIGH = 0x01
 }GPIOInit_Level;
 
 typedef enum
@@ -58,7 +58,7 @@ typedef enum
 #endif	
 	GPIO_PORT12 = 0x0C,
 	GPIO_PORT13 = 0x0D,
-	GPIO_PORT14 = 0x0E,
+	GPIO_PORT14 = 0x0E
 }GPIO_Port_t;
 
 #ifdef BAT32G1XX_80PIN
@@ -97,7 +97,7 @@ typedef enum
 #define GPIO_Pin_7                 ((uint16_t)0x0080)  /* Pin 7 selected */
 
 #define GPIO_PIN_MASK              ((uint16_t)0x00FF) /* PIN mask for assert test */
-#define IS_GPIO_PIN(PIN)           (((PIN) & GPIO_PIN_MASK ) != (uint16_t)0x00) ? 1:0
+#define IS_GPIO_PIN(PIN)           ((((PIN) & ~GPIO_PIN_MASK ) == (uint16_t)0x00) && ((PIN) != (uint16_t)0x00))
 
 #define IS_GET_GPIO_PIN(PIN) (((PIN) == GPIO_Pin_0) || \
                               ((PIN) == GPIO_Pin_1) || \
@@ -106,7 +106,7 @@ typedef enum
                               ((PIN) == GPIO_Pin_4) || \
                               ((PIN) == GPIO_Pin_5) || \
                               ((PIN) == GPIO_Pin_6) || \
-                              ((PIN) == GPIO_Pin_7))? 1:0
+                              ((PIN) == GPIO_Pin_7))
 															
 
 typedef enum
@@ -176,8 +176,8 @@ typedef enum
 	GROUP_AF_SDA10 ,	
 #endif
 
-	GROUP_AF_TAIO ,  //定时器A外部事件输入和脉冲输?
-	GROUP_AF_TAO ,   //定时器A的脉冲输?
+	GROUP_AF_TAIO ,  //定时器A外部事件输入和脉冲输出
+	GROUP_AF_TAO ,   //定时器A的脉冲输出
 
 	GROUP_AF_VCOUT0,
 	GROUP_AF_VCOUT1,
@@ -190,9 +190,10 @@ typedef enum
 	GROUP_AF_TMIOB0,
 
 	GROUP_AF_CRXD ,
-	GROUP_AF_CTXD ,	
+	GROUP_AF_CTXD ,
+	GROUP_AF_END
 }GROUP_AF_t;
-#define IS_GPIO_AF(GPIO_AF) ((GPIO_AF) < GROUP_AF_CTXD || ((GPIO_AF) == GROUP_AF_CTXD))
+#define IS_GPIO_AF(GPIO_AF) (GPIO_AF < GROUP_AF_END)
 
 
 
@@ -283,7 +284,7 @@ typedef enum
 	GPIO_P152 ,		
 	GPIO_P153 ,		
 #endif
-	GPIO_PIN_END ,
+	GPIO_PIN_END
 }GPIO_Source_t;
 
 typedef enum
@@ -292,7 +293,7 @@ typedef enum
 	GPIO_PIOR2 =0,
 	GPIO_PIOR0 =2,
 	GPIO_PIOR1 =4,
-	GPIO_PIOR3 =7,
+	GPIO_PIOR3 =7
 }GPIO_PIOR_t;
 
 typedef enum
@@ -305,8 +306,8 @@ typedef enum
 	PIOR_BIT5,
 	PIOR_BIT6,
 	PIOR_BIT7,
-	PIOR_CBIT10,   //组合bit位（bit1 bit0?
-	PIOR_CBIT67,   //组合bit位（bit6 bit7?	
+	PIOR_CBIT10,   //组合bit位（bit1 bit0）
+	PIOR_CBIT67    //组合bit位（bit6 bit7）	
 }PIOR_BIT_t;
 
 typedef struct
@@ -355,6 +356,6 @@ void GPIO_ResetBits(GPIO_Port_t PORTx, uint16_t GPIO_Pin);
 void GPIO_ToggleBits(GPIO_Port_t PORTx, uint16_t GPIO_Pin);
 
 void GPIO_Init(GPIO_Port_t PORTx,GPIO_InitTypeDef* GPIO_InitStruct);
-int GPIO_PinAFConfig(GPIO_Port_t PORTx, uint16_t GPIO_Pin, GPIO_Source_t GPIO_Source_Grp, GROUP_AF_t GPIO_AF);
+uint8_t GPIO_PinAFConfig(GPIO_Port_t PORTx, uint16_t GPIO_Pin, GPIO_Source_t GPIO_Source_Grp, GROUP_AF_t GPIO_AF);
 #endif
 

Firmware/Source/Device/Cmsemicon/BAT32A239/Library/Driver/include/timm.h

@@ -354,8 +354,8 @@ typedef struct
 	
 	uint8_t		TMM_CounterClear;	/*!< TMM counter TM Register clear conditon This parameter can be a value of @ref TMM_Counter_Clear_t */
 	
-	uint8_t		TMM_Combine_TransMode;	/*!< TMM counter TM buffer Register transfer mode: 1buffer register copyed to general register when TM1 
-										underflows 2buffer register copyed to general register when TM0 compare match to  TMGRA0; it only used 
+	uint8_t		TMM_Combine_TransMode;	/*!< TMM counter TM buffer Register transfer mode: 1��buffer register copyed to general register when TM1 
+										underflows 2��buffer register copyed to general register when TM0 compare match to  TMGRA0; it only used 
 											in complementary PWM mode This parameter can be a value of @ref TMM_Combine_TransMode_t */
 
 	uint8_t TMM_Intp;         /*!< Specifies the whether open the interrupt flag of Capture Compare Register TBGRA.TBGRB/TBGRC/TBGRD 
@@ -392,6 +392,7 @@ void TMM_Init(TMM_InitTypeDef *TMM_InitStruct);
 void TMM1_Start(FunctionalState match_flag);
 void TMM0_Start(FunctionalState match_flag);
 void TMM0_Stop(void);
+void TMM1_Stop(void);
 void TMM_All_Start(void);
 void TMM_All_Stop(void);
 FlagStatus TMM_GetFlagStatus(TMMSelect_TypeDef TMMx, uint8_t TMM_FLAG);

Firmware/Source/Device/Cmsemicon/BAT32A239/Library/Driver/include/uart.h

@@ -122,7 +122,7 @@
 #define UART1_PHASE_POS				((uint16_t)((1 << 2) & UART_PHASE_MASK))
 #define UART2_PHASE_POS				((uint16_t)((1 << 0) & UART_PHASE_MASK))
 
-#define UART_CTRL_POS				((uint16_t)0x01)
+#define UART_CTRL_POS				((uint8_t)0x01)
 
 /** @defgroup UART_Flags 
   * @{

Firmware/Source/Device/Cmsemicon/BAT32A239/Library/Driver/src/adc.c

@@ -121,36 +121,42 @@ uint16_t ADC_Converse_Scan(ADC_Channel_t ch, uint32_t times, uint16_t *buf)
 	uint32_t i,j;
 	volatile uint8_t  flag;
 	uint32_t total = 0;
-
-	assert_param(IS_SCAN_START_CHAN(ch));
+	uint16_t *buff = buf;
+	if(times == 0)
+	{
+		return 0;
+	}
+	else{
+		assert_param(IS_SCAN_START_CHAN(ch));
 	
-	INTC_DisableIRQ(ADC_IRQn);     // disable INTAD interrupt 
+		INTC_DisableIRQ(ADC_IRQn);     // disable INTAD interrupt 
 
-	ADC->ADM0 &= ~ADC_Enable;
+		ADC->ADM0 &= ~ADC_Enable;
 
-	ADC->ADM1 |= 0x08; //enable one-shot convertion
-	ADC->ADM1 |= 0x80; //set sacn mode
+		ADC->ADM1 |= 0x08; //enable one-shot convertion
+		ADC->ADM1 |= 0x80; //set sacn mode
 
-	ADC->ADTRG = ADC_ExternalTrig_Software;
-	ADC->ADM0 |= ADC_Enable;
+		ADC->ADTRG = ADC_ExternalTrig_Software;
+		ADC->ADM0 |= ADC_Enable;
 
-	ADC->ADS  = ch;
+		ADC->ADS  = ch;
 
-	for(i=0; i<times;i++)
-	{
-		ADC->ADM0 |= ADC_Start_Cmp; //adc start
-		for (j=0; j<4; j++)
+		for(i=0; i<times;i++)
 		{
-			while(INTC_GetPendingIRQ(ADC_IRQn) == 0);
-			INTC_ClearPendingIRQ(ADC_IRQn); 	// clear INTAD interrupt flag 
+			ADC->ADM0 |= ADC_Start_Cmp; //adc start
+			for (j=0; j<4; j++)
+			{
+				while(INTC_GetPendingIRQ(ADC_IRQn) == 0);
+				INTC_ClearPendingIRQ(ADC_IRQn); 	// clear INTAD interrupt flag 
 
-			*buf++ = ADC->ADCR;
-			total += ADC->ADCR;
+				*buff++ = ADC->ADCR;
+				total += ADC->ADCR;
 
 
+			}
+		}
+		return (uint16_t)(total / times); // return average value
 		}
-	}
-	return (total / times); // return average value
 }
 
 /**
@@ -166,27 +172,34 @@ uint16_t ADC_Converse(ADC_Channel_t ch, uint32_t times, uint16_t *buf)
 	volatile uint8_t  flag;
 	uint32_t total = 0;
 
-	INTC_DisableIRQ(ADC_IRQn);     // disable INTAD interrupt 
+	if(times == 0)
+	{
+		return 0;
+	}
+	else
+	{
+		INTC_DisableIRQ(ADC_IRQn);     // disable INTAD interrupt 
 
-	ADC->ADM0 &= ~ADC_Enable;
+		ADC->ADM0 &= ~ADC_Enable;
 
-	ADC->ADM1 |= ADC_Conv_Oneshot; //enable one-shot convertion
-	ADC->ADTRG = ADC_ExternalTrig_Software;
-	ADC->ADM0 |= ADC_Enable;
+		ADC->ADM1 |= ADC_Conv_Oneshot; //enable one-shot convertion
+		ADC->ADTRG = ADC_ExternalTrig_Software;
+		ADC->ADM0 |= ADC_Enable;
 
-	ADC->ADS  = ch;
+		ADC->ADS  = ch;
 
-	for(i=0; i<times;i++)
-	{
-		ADC->ADM0 |= ADC_Start_Cmp;  //adc start
-		
-		while(INTC_GetPendingIRQ(ADC_IRQn) == 0);
-		INTC_ClearPendingIRQ(ADC_IRQn); 	// clear INTAD interrupt flag 
+		for(i=0; i<times;i++)
+		{
+			ADC->ADM0 |= ADC_Start_Cmp;  //adc start
+			
+			while(INTC_GetPendingIRQ(ADC_IRQn) == 0);
+			INTC_ClearPendingIRQ(ADC_IRQn); 	// clear INTAD interrupt flag 
 
-		*buf++ = ADC->ADCR;
-		total += ADC->ADCR;
+			*buf++ = ADC->ADCR;
+			total += ADC->ADCR;
+		}
+		return (uint16_t)(total / times); // return average value
 	}
-	return (total / times); // return average value
 }
 
 

Firmware/Source/Device/Cmsemicon/BAT32A239/Library/Driver/src/can.c

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    can.c
   * @author  MCD Application Team
-  * @version V1.0.0
-  * @date    27-January-2022
+  * @version V1.0.1
+  * @date    2-April-2024
   * @brief   This file provides firmware functions to manage the following 
   *          functionalities of the Controller area network (CAN) peripheral:
   *           + Initialization and Configuration 
@@ -92,7 +92,7 @@
 #define SMODE_TIMEOUT       ((uint32_t)0x0000FFFF)
 
 /* Time out for cache init */
-#define CACHE_TIMEOUT       ((uint32_t)0x000000FF)
+#define CACHE_TIMEOUT       ((uint32_t)0x0000FFFF)
 
 /**
   * @brief  Deinitializes the CAN peripheral registers to their default reset values.
@@ -522,7 +522,7 @@ uint8_t CAN_ABTModeTransmitConfig(CAN_Type* CANx, uint16_t DBT)
 	}
 	
 	/* Set ABT time delay for each block transmit */
-	CANx->CGMABTD = DBT;
+	CANx->CGMABTD = (uint8_t)DBT;
 	
 	/* Set ABTTRG to start trigger ABT mode */
 	CANx->CGMABT = CAN_GMABT_START_ABTTRG;
@@ -645,6 +645,16 @@ uint8_t CAN_MessageCache_Init(CANMSG_Type *CANxMSGy, CanTxRxMsg *TxRxMessage)
         CANxMSGy->CMCONF &= ~CAN_MCONF_RTR;
     }
 	
+    /* message cache overwrite config */	
+	if (TxRxMessage->OverWriteConfig != DISABLE)
+	{
+		CANxMSGy->CMCONF |=  CAN_MCONF_OWS;
+	}
+	else
+	{
+		CANxMSGy->CMCONF &= ~CAN_MCONF_OWS;
+	}
+	
 	/* When frame type is tx type, set frame data and length */
 	if (TxRxMessage->CacheType == CAN_CacheType_Tx)
 	{
@@ -679,7 +689,7 @@ uint8_t CAN_MessageCache_Init(CANMSG_Type *CANxMSGy, CanTxRxMsg *TxRxMessage)
 }
 
 /**
-  * @brief  CAN periphal for nessage cache over write config.
+  * @brief  CAN periphal for message cache over write config.
   * @param  CANxMSGy: where x can be 0 to select the CAN peripheral.
   *                   where y can be 0 to 15 to select the cache.
   * @param  NewState: new state of the CAN interrupts.
@@ -725,10 +735,10 @@ uint8_t CAN_Transmit(CANMSG_Type *CANxMSGy, CanTxRxMsg* TxMessage)
         CANxMSGy->CMCTRL = CAN_MCTRL_CLR_RDY;
 		
         /* Wait the operate complete */
-        while (((CANxMSGy->CMCTRL & CAN_MCTRL_RDY_MASK) != 0x00) && (timeout != 0))
-        {
-            timeout--;
-        }
+        //while (((CANxMSGy->CMCTRL & CAN_MCTRL_RDY_MASK) != 0x00) && (timeout != 0))
+        //{
+        //    timeout--;
+        //}
     }
 	
 	/* check RDY clear is or not success */
@@ -778,13 +788,13 @@ uint8_t CAN_Transmit(CANMSG_Type *CANxMSGy, CanTxRxMsg* TxMessage)
   * @retval 0 is failed and true value is success for receive data length.
   * @note   This function is used by polling type.
   */
-uint8_t CAN_Receive(CAN_Type* CANx, CANMSG_Type *CANxMSGy, CanTxRxMsg* RxMessage, uint32_t Timeout)
+uint8_t CAN_Receive(CAN_Type* CANx, CanTxRxMsg* RxMessage, uint32_t Timeout)
 {
 	uint32_t timeout_temp = Timeout;
 	uint16_t reg_crgpt = 0;
-    volatile uint8_t cache_num = 0;
+    uint8_t cache_num = 0;
     uint8_t recv_flag = 0;
-	int i = 0;
+	CANMSG_Type *CANxMSGy;
 	
     /* Check the parameters */
 	assert_param(IS_CAN_ALL_PERIPH(CANx));
@@ -803,6 +813,7 @@ uint8_t CAN_Receive(CAN_Type* CANx, CANMSG_Type *CANxMSGy, CanTxRxMsg* RxMessage
 			/* clear interrupt status flag */
             CANx->CINTS = CAN_FLAG_REC;
             recv_flag = 1;
+            break;
         }
     }
 
@@ -824,11 +835,18 @@ uint8_t CAN_Receive(CAN_Type* CANx, CANMSG_Type *CANxMSGy, CanTxRxMsg* RxMessage
         return 0;
     }
 
-	/* clear DN register to enable next frame data cache */
-    CANxMSGy->CMCTRL = CAN_MCTRL_CLR_DN;
-
 	/* Get cache number and receive data length and valid data */
     cache_num = (((reg_crgpt) & CAN_CRGPT_RGPT_MASK) >> 8) & 0x0F;
+	if(CANx == CAN0)
+	{
+		CANxMSGy = (CANMSG_Type*)CAN0MSG00 + cache_num;
+	}
+	else if(CANx == CAN1)
+	{
+		CANxMSGy = (CANMSG_Type*)CAN1MSG00 + cache_num;		
+	}	
+	/* clear DN register to enable next frame data cache */
+    CANxMSGy->CMCTRL = CAN_MCTRL_CLR_DN;
 	
 	/* judge frame type is standard or extended */
 	if (CANxMSGy->CMIDH & 0x8000)
@@ -848,8 +866,7 @@ uint8_t CAN_Receive(CAN_Type* CANx, CANMSG_Type *CANxMSGy, CanTxRxMsg* RxMessage
     RxMessage->DLC = CANxMSGy->CMDLC;
 	
 	/* Get receive frame valid data to memory */
-		
-    for(i = 0; i < RxMessage->DLC; i++)
+    for(int i = 0; i < RxMessage->DLC; i++)
     {
         RxMessage->Data[i] = *(((uint8_t *)&(CANxMSGy->CMDB0)) + i);
     }
@@ -889,55 +906,157 @@ CANMSG_Type* CAN_Get_CANxMSGy(CAN_Type* CANx)
   * @retval 0 is failed and true value is success for receive data length.
   * @note   This function is used by interrupt type.
   */
-uint8_t CAN_Receive_IT(CAN_Type* CANx, CANMSG_Type *CANxMSGy, CanTxRxMsg* RxMessage)
+void CAN_Receive_IT(CAN_Type* CANx, CANBuffList_t *listbuf)
 {
 	uint16_t reg_crgpt = 0;
-    // uint8_t cache_num = 0;
-	int i=0;
+	uint8_t cache_num = 0;
+	CANMSG_Type *CANxMSGy;
+	CanTxRxMsg canMsgRec;
+	
+    canMsgRec.CacheType = 0;
+    canMsgRec.Interrupt = 0;
+    canMsgRec.OverWriteConfig = 0;
+    canMsgRec.RTR = 0;
     /* Check the parameters */
 	assert_param(IS_CAN_ALL_PERIPH(CANx));
-    assert_param(IS_CAN_ALL_MSGCACHE(CANxMSGy));
-	assert_param(RxMessage == NULL);
 
+    /* Read CRGPT register value to memory */
+    reg_crgpt = CANx->CRGPT;
+	
 	/* check ROVF register set or not and to clear it */
     if (reg_crgpt & CAN_CRGPT_ROVF_MASK)
     {
         CANx->CRGPT = CAN_CRGPT_CLR_ROVF;
     }
+		
+	while(!(reg_crgpt & CAN_CRGPT_RHPM_MASK))
+	{
+	
+		/* Get cache number and receive data length and valid data */
+		cache_num = (((reg_crgpt) & CAN_CRGPT_RGPT_MASK) >> 8) & 0x0F;
+		if(CANx == CAN0)
+		{
+			CANxMSGy = (CANMSG_Type*)CAN0MSG00 + cache_num;
+		}
+		else if(CANx == CAN1)
+		{
+			CANxMSGy = (CANMSG_Type*)CAN1MSG00 + cache_num;		
+		}
+		
+		/* clear DN register to enable next frame data cache */
+		CANxMSGy->CMCTRL = CAN_MCTRL_CLR_DN;
 
-	/* clear DN register to enable next frame data cache */
-    CANxMSGy->CMCTRL = CAN_MCTRL_CLR_DN;
+	
+		/* judge frame type is standard or extended */
+		if (CANxMSGy->CMIDH & 0x8000)
+		{
+			/* Extended frame to fetch ID0~ID28 */
+			canMsgRec.IDE = CAN_Id_Extended;
+			canMsgRec.Id = ((CANxMSGy->CMIDH & 0x1FFF) << 16) | (CANxMSGy->CMIDL);
+		}
+		else
+		{
+			/* Standard frame to fetch ID18~ID28 */
+			canMsgRec.IDE = CAN_Id_Standard;
+			canMsgRec.Id  = (CANxMSGy->CMIDH & 0x1FFC) >> 2;
+		}
+	
+		/* Get receive frame data length */
+			canMsgRec.DLC = CANxMSGy->CMDLC;
+	
+		/* Get receive frame valid data to memory */
+			for(int i = 0; i < canMsgRec.DLC; i++)
+			{
+				canMsgRec.Data[i] = *(((uint8_t *)&(CANxMSGy->CMDB0)) + i);
+			}
+			
+			/* Start user code. Do not edit comment generated here */
+			if(listbuf->length >= LIST_BUF_MAX_NUM)
+			{
+				listbuf->length = 0;
+			}
+			listbuf->data[listbuf->Tail] = canMsgRec;
+			listbuf->Tail = (listbuf->Tail+1)%LIST_BUF_MAX_NUM;
+			listbuf->length++;
+			
+			/* End user code. Do not edit comment generated here */
+			
+			reg_crgpt = CANx->CRGPT;
+		}
+}
+
+/***********************************************************************************************************************
+* Function Name: CAN0Err_recover
+* @brief  CAN error interrupt service routine
+* @param  None
+* @return None
+***********************************************************************************************************************/
+uint8_t CANErr_Recover(CAN_Type* CANx)
+{
+	uint8_t i;
+	uint16_t can0ints;
+	CANMSG_Type* pMsg;
+	uint8_t canerr = 0;	
+	/* Check the parameters */
+	assert_param(IS_CAN_ALL_PERIPH(CANx));
 
+	can0ints = CANx->CINTS&0x001C;//read error interrupt flag
+	CANx->CINTS = can0ints;	//clear error interrupt flag
 	
-	/* judge frame type is standard or extended */
-	if (CANxMSGy->CMIDH & 0x8000)
+	if((can0ints & CAN_INTS_ERR_READ) && (can0ints & CAN_INTS_PERR_READ))
 	{
-		/* Extended frame to fetch ID0~ID28 */
-		RxMessage->IDE = CAN_Id_Extended;
-		RxMessage->Id  = ((CANxMSGy->CMIDH & 0x1FFF) << 16) | (CANxMSGy->CMIDL);
+		canerr = 1;
 	}
-	else
+	
+#if 1	
+	if(can0ints & CAN_INTS_ERR_READ)//ERR interrrupt?
 	{
-		/* Standard frame to fetch ID18~ID28 */
-		RxMessage->IDE = CAN_Id_Standard;
-		RxMessage->Id  = (CANxMSGy->CMIDH & 0x1FFC) >> 2;
+		if(CANx->CINFO & CAN_CINFO_BOFF_MASK)//bus off?
+		{
+			//recovery bus
+			//clear all TRQ
+			if(CANx == CAN0)
+			{
+				pMsg = (CANMSG_Type*)CAN0MSG00_BASE;
+			}
+			else
+			{
+				pMsg = (CANMSG_Type*)CAN1MSG00_BASE;			
+			}
+			
+			for(i=0;i<16;i++)//clear all msg buffer TRQ
+			{
+				while(pMsg->CMCTRL & CAN_MCTRL_RDY_MASK)
+				{
+					pMsg->CMCTRL = CAN_MCTRL_CLR_RDY;//clear RDY
+				}
+				pMsg->CMCTRL = CAN_MCTRL_CLR_TRQ;//clear TRQ
+				
+				pMsg++;
+			}
+			
+			CANx->CCTRL = CAN_CCTRL_CLR_CCERC| CAN_CCTRL_CLR_AL| CAN_CCTRL_CLR_VALID| CAN_CCTRL_PSMODE_IDLE| CAN_CCTRL_OPMODE_IDLE;//CAN initialize
+			//Read can registor
+			if(CANx->CLEC)
+			{
+				CANx->CLEC = 0x00;//clear CLEC
+			}
+			
+			//set CCERC
+			CANx->CCTRL = CAN_CCTRL_SET_CCERC;//clear CCERC
+			
+			CANx->CCTRL = CAN_CCTRL_OPMODE_NORMAL;//CAN resume
+		}
 	}
 	
-	/* Get receive frame data length */
-    RxMessage->DLC = CANxMSGy->CMDLC;
+	if(can0ints & CAN_INTS_PERR_READ)//PERR interrrupt?
+	{
+		if(CANx->CLEC)
+		{
+			CANx->CLEC = 0x00;//clear CLEC
+		}
+	}
 	
-	/* Get receive frame valid data to memory */
-    for(i = 0; i < RxMessage->DLC; i++)
-    {
-        RxMessage->Data[i] = *(((uint8_t *)&(CANxMSGy->CMDB0)) + i);
-    }
-
-	/* when DN or MUC register bit is set, the frame cache data is invalid */
-    if ((CANxMSGy->CMCTRL & CAN_MCTRL_DN_MASK) || (CANxMSGy->CMCTRL & CAN_MCTRL_MUC_MASK))
-    {
-        return 0;
-    }
-
-    return RxMessage->DLC;
+	return canerr;
+#endif		
 }
-

Firmware/Source/Device/Cmsemicon/BAT32A239/Library/Driver/src/dac.c

@@ -34,11 +34,11 @@ void DAC_Start(DAC_Channel_t ch)
 {
     if(ch & 0x01) 
     {
-        DAC->DAM  |= DAC_DAM_DACE0_Msk;     /* enables D/A conversion operation */
+        DAC->DAM  |= (uint8_t)DAC_DAM_DACE0_Msk;     /* enables D/A conversion operation */
     }
     if(ch & 0x02) 
     {
-        DAC->DAM  |= DAC_DAM_DACE1_Msk;     /* enables D/A conversion operation */
+        DAC->DAM  |= (uint8_t)DAC_DAM_DACE1_Msk;     /* enables D/A conversion operation */
     }
 }
 /***********************************************************************************************************************
@@ -51,11 +51,11 @@ void DAC_Stop(DAC_Channel_t ch)
 {
     if(ch & 0x01) 
     {
-        DAC->DAM  &= ~DAC_DAM_DACE0_Msk;     /* stops D/A conversion operation */
+        DAC->DAM  &= (uint8_t)(~DAC_DAM_DACE0_Msk);     /* stops D/A conversion operation */
     }
     if(ch & 0x02) 
     {
-        DAC->DAM  &= ~DAC_DAM_DACE1_Msk;     /* stops D/A conversion operation */
+        DAC->DAM  &= (uint8_t)(~DAC_DAM_DACE1_Msk);     /* stops D/A conversion operation */
     }
 }
 
@@ -85,5 +85,5 @@ void DAC_Set_Value(DAC_Channel_t ch, uint8_t regvalue)
 ***********************************************************************************************************************/
 void DAC_Set_PowerOff(void)
 {
-    CGC->PER1 &= ~CGC_PER1_DACEN_Msk;     /* stops input clock supply */
+    CGC->PER1 &= (uint8_t)(~CGC_PER1_DACEN_Msk);     /* stops input clock supply */
 }

Firmware/Source/Device/Cmsemicon/BAT32A239/Library/Driver/src/delay.c

@@ -53,5 +53,5 @@ void m0_delay_us(uint32_t volatile number_of_us)
 ***********************************************************************************************************************/
 void delay_init(uint32_t sysclk)
 {
-	Value_us = sysclk/1000000;
+	Value_us = (uint8_t)(sysclk/1000000);
 }

Firmware/Source/Device/Cmsemicon/BAT32A239/Library/Driver/src/dma.c

@@ -19,13 +19,13 @@ void DMA_Init(DMA_InitTypeDef * DMA_InitStruct)
 	}
 	if(DMA_InitStruct->DMA_ChainTrans == 0)
 	{
-		DMAVEC->VEC[DMA_InitStruct->DMA_Vector] = DMA_InitStruct->DMA_CtrlId;
+		DMAVEC->VEC[DMA_InitStruct->DMA_Vector] = (uint8_t)(DMA_InitStruct->DMA_CtrlId);
 	}
 	else
 	{
 		if(DMA_InitStruct->DMA_ChainTrans == DMA_ChainTrans_Head)
 		{
-			DMAVEC->VEC[DMA_InitStruct->DMA_Vector] = DMA_InitStruct->DMA_CtrlId;
+			DMAVEC->VEC[DMA_InitStruct->DMA_Vector] = (uint8_t)(DMA_InitStruct->DMA_CtrlId);
 		}
 	}
 	DMAVEC->CTRL[DMA_InitStruct->DMA_CtrlId].DMACR = DMA_InitStruct->DMA_DataSize |  (DMA_InitStruct->DMA_RepeatInt << 5)  \

Firmware/Source/Device/Cmsemicon/BAT32A239/Library/Driver/src/elc.c

@@ -20,7 +20,7 @@ void ELC_Start(uint32_t event_src, uint32_t event_dst)
     sfr_addr = &ELC->ELSELR00;
     
     // ELSELRn(n=00~14) = Link Destination Number
-    *(sfr_addr + event_src) = event_dst;
+    *(sfr_addr + event_src) = (uint8_t)(event_dst);
 }
 
 /***********************************************************************************************************************

Firmware/Source/Device/Cmsemicon/BAT32A239/Library/Driver/src/flash.c

@@ -207,7 +207,7 @@ FLASH_STATUS flash_write(uint32_t adr, uint32_t sz, uint8_t *buf)
             cross = 0;
         }
         ptr_base = (uint8_t *)(adr & ~(SECTOR_SIZE-1));    /* get sector base address: Each sector is 512 bytes (i.e. 128 words) */
-        offset   = adr & (SECTOR_SIZE-1);                  /* get offset */
+        offset   = (uint16_t)(adr & (SECTOR_SIZE-1));                  /* get offset */
         
         /* Save the Flash data temporarily */
         if(cross) 

Firmware/Source/Device/Cmsemicon/BAT32A239/Library/Driver/src/gpio.c

@@ -19,7 +19,7 @@ void assert_failed(uint8_t* file, uint32_t line)
 
 
 #if defined(BAT32G1XX_64PIN) || defined(BAT32G1XX_80PIN)
-GPIO_PIN_AF_TABLE_t funcAfTab[] =
+const GPIO_PIN_AF_TABLE_t funcAfTab[] =
 {
 		{GROUP_AF_INTP1, {{GPIO_PIOR0,PIOR_BIT0,GPIO_P52},  {PIOR_NONE,PIOR_BIT0,GPIO_DEF},  {PIOR_NONE,PIOR_BIT0,GPIO_DEF}}},
 		{GROUP_AF_INTP2, {{GPIO_PIOR0,PIOR_BIT0,GPIO_P53},  {PIOR_NONE,PIOR_BIT0,GPIO_DEF},  {PIOR_NONE,PIOR_BIT0,GPIO_DEF}}},
@@ -62,7 +62,7 @@ GPIO_PIN_AF_TABLE_t funcAfTab[] =
 		{GROUP_AF_ODEFAULT,{{PIOR_NONE,PIOR_BIT0,GPIO_DEF}, {PIOR_NONE,PIOR_BIT0,GPIO_DEF}, {PIOR_NONE,PIOR_BIT0,GPIO_DEF}}},	
 };
 #elif defined BAT32G1XX_48PIN	
-GPIO_PIN_AF_TABLE_t funcAfTab[] =
+const GPIO_PIN_AF_TABLE_t funcAfTab[] =
 {
 		{GROUP_AF_INTP8,    {{PIOR_NONE,PIOR_BIT0,GPIO_DEF},  {GPIO_PIOR0,PIOR_BIT7,GPIO_P00}, {PIOR_NONE,PIOR_BIT0,GPIO_DEF}}},
 		{GROUP_AF_RXD1,     {{GPIO_PIOR0,PIOR_BIT5,GPIO_P73},  {PIOR_NONE,PIOR_BIT0,GPIO_DEF},  {PIOR_NONE,PIOR_BIT0,GPIO_DEF}}},
@@ -166,7 +166,7 @@ void GPIO_Set_Value(__IO uint8_t *port, uint8_t value)
 uint8_t GPIO_Get_Value(__IO uint8_t *port)
 {
 //    PORT->PMS = 0x01;        /*!< Digital output level of the pin is read */        
-    return (*port);          /*!< PL = value                              */
+    return (*(port - 0x260));          /*!< PL = value                              */
 }
 
 /**
@@ -175,8 +175,9 @@ uint8_t GPIO_Get_Value(__IO uint8_t *port)
  * @param port, such as P0, P1, P2...
  * @param pinMsk 
  *             e.g., bit0: 0x01, bit1: 0x02, bit0~3: 0x0F, bit0~7: 0xFF
+ * @retval ERROR or NO_ERROR .
  */
-int GPIO_PinCheck(GPIO_Port_t PORTx, uint16_t GPIO_Pin)
+static uint8_t GPIO_PinCheck(GPIO_Port_t PORTx, uint16_t GPIO_Pin)
 {
 	if(PORTx == GPIO_PORT0)
 	{
@@ -235,41 +236,41 @@ void GPIO_Init(GPIO_Port_t PORTx,GPIO_InitTypeDef* GPIO_InitStruct)
 			
 			if(GPIO_InitStruct->GPIO_Level == GPIO_Level_HIGH)
 			{
-				*((volatile uint8_t*)(&PORT->P0 + PORTx))|= (1<<currentpin);
+				*((volatile uint8_t*)(&PORT->P0 + (uint8_t)PORTx)) |= (1<<currentpin);
 			}
 			else
 			{
-				*((volatile uint8_t*)(&PORT->P0 + PORTx))&= ~(1<<currentpin);
+				*((volatile uint8_t*)(&PORT->P0 + (uint8_t)PORTx)) &= ~(uint8_t)(1<<currentpin);
 			}
 			if(GPIO_InitStruct->GPIO_Ctrl == GPIO_Control_DIG ) /*digitial input/output*/
 			{
-				*((volatile uint8_t*)(&PORT->PMC0 +PORTx)) &= ~((!GPIO_InitStruct->GPIO_Ctrl) << currentpin);
+				*((volatile uint8_t*)(&PORT->PMC0 +(uint8_t)PORTx)) &= ~(uint8_t)((!(GPIO_InitStruct->GPIO_Ctrl)) << currentpin);
 				if(GPIO_InitStruct->GPIO_Mode == GPIO_Mode_OUT)
 				{
-					*((volatile uint8_t*)(&PORT->PM0 +PORTx)) &= ~((!GPIO_InitStruct->GPIO_Mode) << currentpin);
+					*((volatile uint8_t*)(&PORT->PM0 +(uint8_t)PORTx)) &= ~(uint8_t)(!(GPIO_InitStruct->GPIO_Mode) << currentpin);
 					assert_param(IS_GPIO_OTYPE(GPIO_InitStruct->GPIO_OType));
 					if(GPIO_InitStruct->GPIO_OType == GPIO_OType_PP)
 					{
-						*((volatile uint8_t*)(&PORT->POM0 +PORTx)) &= ~((!GPIO_InitStruct->GPIO_OType) << currentpin);
+						*((volatile uint8_t*)(&PORT->POM0 +(uint8_t)PORTx)) &= ~(uint8_t)((!GPIO_InitStruct->GPIO_OType) << currentpin);
 					}
 					else
 					{
-						*((volatile uint8_t*)(&PORT->POM0 +PORTx)) |= GPIO_InitStruct->GPIO_OType << currentpin;
+						*((volatile uint8_t*)(&PORT->POM0 +(uint8_t)PORTx)) |= (uint8_t)(GPIO_InitStruct->GPIO_OType << currentpin);
 					}					
 				}
 				else
 				{
-					*((volatile uint8_t*)(&PORT->PM0 +PORTx)) |= (GPIO_InitStruct->GPIO_Mode << currentpin);
+					*((volatile uint8_t*)(&PORT->PM0 +(uint8_t)PORTx)) |= (uint8_t)(GPIO_InitStruct->GPIO_Mode << currentpin);
 				}
 			}
 			else /*analogy input*/                        
 			{
-				*((volatile uint8_t*)(&PORT->PMC0 +PORTx)) |= GPIO_InitStruct->GPIO_Ctrl << currentpin;
+				*((volatile uint8_t*)(&PORT->PMC0 +(uint8_t)PORTx)) |= (uint8_t)(GPIO_InitStruct->GPIO_Ctrl << currentpin);
 			}
 			assert_param(IS_GPIO_PUPD(GPIO_InitStruct->GPIO_PuPd));	
 			if(GPIO_InitStruct->GPIO_PuPd == GPIO_PuPd_UP)
 			{
-				*((volatile uint8_t*)(&PORT->PU0 +PORTx)) |= (1<<currentpin);
+				*((volatile uint8_t*)(&PORT->PU0 +(uint8_t)PORTx)) |= (uint8_t)(1<<currentpin);
 			}
 			else if(GPIO_InitStruct->GPIO_PuPd == GPIO_PuPd_DOWN)
 			{
@@ -297,7 +298,7 @@ void GPIO_SetBits(GPIO_Port_t  PORTx, uint16_t GPIO_Pin)
 	assert_param(IS_GPIO_ALL_PERIPH(PORTx));
 	assert_param(IS_GPIO_PIN(GPIO_Pin));
 
-	*((volatile uint8_t*)(&PORT->P0 +PORTx))|= GPIO_Pin;
+	*((volatile uint8_t*)(&PORT->PSET0 +(uint8_t)PORTx)) = GPIO_Pin;
 
 }
 
@@ -316,7 +317,7 @@ void GPIO_ResetBits(GPIO_Port_t PORTx, uint16_t GPIO_Pin)
 	assert_param(IS_GPIO_ALL_PERIPH(PORTx));
 	assert_param(IS_GPIO_PIN(GPIO_Pin));
 
-	*((volatile uint8_t*)(&PORT->P0 +PORTx)) &= ~GPIO_Pin;
+	*((volatile uint8_t*)(&PORT->PCLR0 +(uint8_t)PORTx)) = GPIO_Pin;
 }
 
 /**
@@ -334,7 +335,7 @@ void GPIO_ToggleBits(GPIO_Port_t PORTx, uint16_t GPIO_Pin)
 	assert_param(IS_GPIO_ALL_PERIPH(PORTx));
 	assert_param(IS_GPIO_PIN(GPIO_Pin));
 
-	*((volatile uint8_t*)(&PORT->P0 +PORTx)) ^= GPIO_Pin;
+	*((volatile uint8_t*)(&PORT->P0 +(uint8_t)PORTx)) ^= GPIO_Pin;
 }
 /**
   * @brief  Reads the specified input port pin.
@@ -351,7 +352,7 @@ uint8_t GPIO_ReadInputDataBit(GPIO_Port_t PORTx, uint16_t GPIO_Pin)
 	assert_param(IS_GPIO_ALL_PERIPH(PORTx));
 	assert_param(IS_GET_GPIO_PIN(GPIO_Pin));
 
-	if(((*((volatile uint8_t*)(&PORT->P0 +PORTx))) & GPIO_Pin) != Bit_RESET)
+	if(((*((volatile uint8_t*)(&PORT->PREAD0 +(uint8_t)PORTx))) & GPIO_Pin) != (uint8_t)Bit_RESET)
 	{
 		bitstatus = (uint8_t)Bit_SET;
 	}
@@ -379,7 +380,7 @@ uint8_t GPIO_ReadOutputDataBit(GPIO_Port_t PORTx, uint16_t GPIO_Pin)
 	assert_param(IS_GET_GPIO_PIN(GPIO_Pin));
 
 
-	if(((*((volatile uint8_t*)(&PORT->P0 +PORTx))) & GPIO_Pin) != Bit_RESET)
+	if(((*((volatile uint8_t*)(&PORT->P0 +(uint8_t)PORTx))) & GPIO_Pin) != (uint8_t)Bit_RESET)
 	{
 		bitstatus = (uint8_t)Bit_SET;
 	}
@@ -396,23 +397,42 @@ void GPIO_SetPIOR(uint16_t idx,GPIO_Source_t GPIO_Source_Grp)
 {
 	uint8_t i;
 
-	for(i=0;i<PIOR_MAX_NUM;i++)
+	for(i=0;i< sizeof(funcAfTab[idx].piorInfo)/sizeof(PIOR_INFO_t); i++)
 	{
+		if(funcAfTab[idx].piorInfo[i].pior != PIOR_NONE)
+		{
+			if(funcAfTab[idx].piorInfo[i].bitIndex == PIOR_CBIT10) 
+			{
+				*((volatile uint8_t*)(GPIO_PIOR_CFG_BASE + (uint8_t)funcAfTab[idx].piorInfo[i].pior))  &= ~(1<<0);
+				*((volatile uint8_t*)(GPIO_PIOR_CFG_BASE + (uint8_t)funcAfTab[idx].piorInfo[i].pior))  &= ~(1<<1);
+			}
+			else if(funcAfTab[idx].piorInfo[i].bitIndex == PIOR_CBIT67)
+			{
+				*((volatile uint8_t*)(GPIO_PIOR_CFG_BASE + (uint8_t)funcAfTab[idx].piorInfo[i].pior))  &= ~(1<<6);
+				*((volatile uint8_t*)(GPIO_PIOR_CFG_BASE + (uint8_t)funcAfTab[idx].piorInfo[i].pior))  &= ~(1<<7);
+			}
+			else
+			{			
+				//Clear PIOR bit
+				*((volatile uint8_t*)(GPIO_PIOR_CFG_BASE + (uint8_t)funcAfTab[idx].piorInfo[i].pior))  &= ~ (1<<funcAfTab[idx].piorInfo[i].bitIndex);
+			}
+		}
+		
 		if(GPIO_Source_Grp == funcAfTab[idx].piorInfo[i].bitHigPin)
 		{
-			if(funcAfTab[idx].piorInfo[i].bitIndex == PIOR_CBIT10) //只针对pior1 的pior11 pior10组合bit 
+			if(funcAfTab[idx].piorInfo[i].bitIndex == PIOR_CBIT10) 
 			{
-				*((volatile uint8_t*)(GPIO_PIOR_CFG_BASE + funcAfTab[idx].piorInfo[i].pior))  |= (1<<0);
-				*((volatile uint8_t*)(GPIO_PIOR_CFG_BASE + funcAfTab[idx].piorInfo[i].pior))  |= (1<<1);
+				*((volatile uint8_t*)(GPIO_PIOR_CFG_BASE + (uint8_t)funcAfTab[idx].piorInfo[i].pior))  |= (1<<0);
+				*((volatile uint8_t*)(GPIO_PIOR_CFG_BASE + (uint8_t)funcAfTab[idx].piorInfo[i].pior))  |= (1<<1);
 			}
-			else if(funcAfTab[idx].piorInfo[i].bitIndex == PIOR_CBIT67) //只针对pior3 的bit6 bit7组合bit 
+			else if(funcAfTab[idx].piorInfo[i].bitIndex == PIOR_CBIT67) 
 			{
-				*((volatile uint8_t*)(GPIO_PIOR_CFG_BASE + funcAfTab[idx].piorInfo[i].pior))  |= (1<<6);
-				*((volatile uint8_t*)(GPIO_PIOR_CFG_BASE + funcAfTab[idx].piorInfo[i].pior))  &= ~(1<<7);
+				*((volatile uint8_t*)(GPIO_PIOR_CFG_BASE + (uint8_t)funcAfTab[idx].piorInfo[i].pior))  |= (1<<6);
+				*((volatile uint8_t*)(GPIO_PIOR_CFG_BASE + (uint8_t)funcAfTab[idx].piorInfo[i].pior))  &= ~(1<<7);
 			}			
 			else
 			{				
-				*((volatile uint8_t*)(GPIO_PIOR_CFG_BASE + funcAfTab[idx].piorInfo[i].pior))  |= (1<<funcAfTab[idx].piorInfo[i].bitIndex);
+				*((volatile uint8_t*)(GPIO_PIOR_CFG_BASE + (uint8_t)funcAfTab[idx].piorInfo[i].pior))  |= (1<<(uint8_t)funcAfTab[idx].piorInfo[i].bitIndex);
 			}
 			break;
 		}
@@ -424,11 +444,11 @@ void GPIO_SetPIOR(uint16_t idx,GPIO_Source_t GPIO_Source_Grp)
   * @param  PORTx: where x can be (0..14) to select the GPIO peripheral for BAT32G137 devices
   * @param  GPIO_Pin: specifies the port bits to be written.
   *          This parameter can be any combination of GPIO_Pin_x where x can be (0..7).
-  * @param  GPIO_Source_Grp: specifies the port bits and port,such as P70、P51......
+  * @param  GPIO_Source_Grp: specifies the port bits and port,such as P70��P51......
   * @param  GPIO_AF: digital functions which can be mapped to any chip pin
   * @retval error or success .
   */
-int GPIO_PinAFConfig(GPIO_Port_t PORTx, uint16_t GPIO_Pin, GPIO_Source_t GPIO_Source_Grp, GROUP_AF_t GPIO_AF)
+uint8_t GPIO_PinAFConfig(GPIO_Port_t PORTx, uint16_t GPIO_Pin, GPIO_Source_t GPIO_Source_Grp, GROUP_AF_t GPIO_AF)
 {
 	uint16_t id = 0;
 	/* Check the parameters */
@@ -441,7 +461,7 @@ int GPIO_PinAFConfig(GPIO_Port_t PORTx, uint16_t GPIO_Pin, GPIO_Source_t GPIO_So
 		return GPIO_ERR;
 	}
 
-	for(id =0;funcAfTab[id].func !=0;id++)
+	for(id =0; id < sizeof(funcAfTab)/sizeof(GPIO_PIN_AF_TABLE_t);id++)
 	{
 		if(funcAfTab[id].func == GPIO_AF)
 		{

Firmware/Source/Device/Cmsemicon/BAT32A239/Library/Driver/src/i2c.c

@@ -664,37 +664,37 @@ uint8_t I2C_Get_TransmitMode(SCIAFSelect_TypeDef I2Cx)
 		case I2C00:
 		{
 			I2C0_TypeDef *I2C_Instance = &SCI0->I2C0;
-            Mode = I2C_TransmitMode_Mask & ((I2C_Instance->SCR & SCI_RECEPTION_TRANSMISSION) >> 14);
+            Mode = (uint8_t)(I2C_TransmitMode_Mask & ((I2C_Instance->SCR & SCI_RECEPTION_TRANSMISSION) >> 14));
 		}
 		break;
 		case I2C01:
 		{
 			I2C1_TypeDef *I2C_Instance = &SCI0->I2C1;
-            Mode = I2C_TransmitMode_Mask & ((I2C_Instance->SCR & SCI_RECEPTION_TRANSMISSION) >> 14);
+            Mode = (uint8_t)(I2C_TransmitMode_Mask & ((I2C_Instance->SCR & SCI_RECEPTION_TRANSMISSION) >> 14));
 		}
 		break;
 		case I2C10:
 		{
 			I2C2_TypeDef *I2C_Instance = &SCI0->I2C2;
-            Mode = I2C_TransmitMode_Mask & ((I2C_Instance->SCR & SCI_RECEPTION_TRANSMISSION) >> 14);
+            Mode = (uint8_t)(I2C_TransmitMode_Mask & ((I2C_Instance->SCR & SCI_RECEPTION_TRANSMISSION) >> 14));
 		}
 		break;
 		case I2C11:
 		{
 			I2C3_TypeDef *I2C_Instance = &SCI0->I2C3;
-            Mode = I2C_TransmitMode_Mask & ((I2C_Instance->SCR & SCI_RECEPTION_TRANSMISSION) >> 14);
+            Mode = (uint8_t)(I2C_TransmitMode_Mask & ((I2C_Instance->SCR & SCI_RECEPTION_TRANSMISSION) >> 14));
 		}
 		break;
 		case I2C20:
 		{
 			I2C4_TypeDef *I2C_Instance = &SCI1->I2C4;
-            Mode = I2C_TransmitMode_Mask & ((I2C_Instance->SCR & SCI_RECEPTION_TRANSMISSION) >> 14);
+            Mode = (uint8_t)(I2C_TransmitMode_Mask & ((I2C_Instance->SCR & SCI_RECEPTION_TRANSMISSION) >> 14));
 		}
 		break;
 		case I2C21:
 		{
 			I2C5_TypeDef *I2C_Instance = &SCI1->I2C5;
-            Mode = I2C_TransmitMode_Mask & ((I2C_Instance->SCR & SCI_RECEPTION_TRANSMISSION) >> 14);
+            Mode = (uint8_t)(I2C_TransmitMode_Mask & ((I2C_Instance->SCR & SCI_RECEPTION_TRANSMISSION) >> 14));
 		}
 		break;
 #if defined(BAT32G1XX_80PIN) || defined(BAT32G1XX_100PIN)

Firmware/Source/Device/Cmsemicon/BAT32A239/Library/Driver/src/i2ca.c

@@ -77,8 +77,8 @@ void I2CA_DeInit(I2CASelect_TypeDef I2CAx)
 static void IICA_Init(IICA_TypeDef *IICA_Instance, I2CA_InitTypeDef* I2CA_InitStruct)
 {
     uint8_t tmpreg = 0;
-    uint8_t tmp_wl, tmp_wh;
-    uint32_t fmck;
+    uint8_t tmp_wl = 0, tmp_wh = 0;
+    uint32_t fmck = 0;
 	
 	tmpreg = IICA_Instance->IICCTL1;
     /* I2CA register setting for control register n1 */
@@ -752,13 +752,13 @@ I2CA_Status I2CA_Slave_TransmitData(I2CASelect_TypeDef I2CAx,uint8_t *Reg, uint8
         else
         {
 			/* When the address match is success */
-            if ((Address_Match < 2) && I2CA_GetFlagStaus(I2CAx,I2CA_STATUS_COI))  //接收地址和自身从机地址一致
+            if ((Address_Match < 2) && I2CA_GetFlagStaus(I2CAx,I2CA_STATUS_COI))  //���յ�ַ�������ӻ���ַһ��
             {
                 Address_Match ++;
 				
 				if (Address_Match == 1)
 				{
-					I2CA_Instance->SVA|= 0x01;    //第一次先读		
+					I2CA_Instance->SVA|= 0x01;    //��һ���ȶ�		
 				} 
 				else if (Address_Match == 2)
 				{
@@ -775,7 +775,7 @@ I2CA_Status I2CA_Slave_TransmitData(I2CASelect_TypeDef I2CAx,uint8_t *Reg, uint8
 				/* Sending or receiving */
 				if (I2CA_GetFlagStaus(I2CAx,I2CA_STATUS_TRC))    //send status
 				{
-					I2CA_SET_REG(I2CAx,IICCTL00,I2CA_WTIM_BIT);//在输入9个时钟，将时钟置为低电平
+					I2CA_SET_REG(I2CAx,IICCTL00,I2CA_WTIM_BIT);//������9��ʱ�ӣ���ʱ����Ϊ�͵�ƽ
 					I2CA_WriteByte(I2CAx,*Data);
 					Data++;
 					Send_Length++;

Firmware/Source/Device/Cmsemicon/BAT32A239/Library/Driver/src/intp.c

@@ -24,19 +24,19 @@ void INTP_Init(INTP_InitTypeDef* Intp_InitStruct)
 	}
 	if(Intp_InitStruct->INTP_Select < INTP8)
 	{
-		INTM->EGN0 &= ~Intp_InitStruct->INTP_Select;
-		INTM->EGP0 &= ~Intp_InitStruct->INTP_Select;
+		INTM->EGN0 &= (uint8_t)(~Intp_InitStruct->INTP_Select);
+		INTM->EGP0 &= (uint8_t)(~Intp_InitStruct->INTP_Select);
 		
-		INTM->EGN0 |= ((Intp_InitStruct->EXTI_Trigger & 0x01U) >> 0) << currentpin;
-		INTM->EGP0 |= ((Intp_InitStruct->EXTI_Trigger & 0x02U) >> 1) << currentpin;	
+		INTM->EGN0 |= (uint8_t)(((Intp_InitStruct->EXTI_Trigger & 0x01U) >> 0) << currentpin);
+		INTM->EGP0 |= (uint8_t)(((Intp_InitStruct->EXTI_Trigger & 0x02U) >> 1) << currentpin);	
 	}
 	else
 	{
-		INTM->EGN1 &= ~Intp_InitStruct->INTP_Select;
-		INTM->EGP1 &= ~Intp_InitStruct->INTP_Select;
+		INTM->EGN1 &= (uint8_t)(~Intp_InitStruct->INTP_Select);
+		INTM->EGP1 &= (uint8_t)(~Intp_InitStruct->INTP_Select);
 		
-		INTM->EGN1 |= ((Intp_InitStruct->EXTI_Trigger & 0x01U) >> 0) << (currentpin-8);
-		INTM->EGP1 |= ((Intp_InitStruct->EXTI_Trigger & 0x02U) >> 1) << (currentpin-8);	
+		INTM->EGN1 |= (uint8_t)(((Intp_InitStruct->EXTI_Trigger & 0x01U) >> 0) << (currentpin-8));
+		INTM->EGP1 |= (uint8_t)(((Intp_InitStruct->EXTI_Trigger & 0x02U) >> 1) << (currentpin-8));	
 	
 	}
     for (w_count = 0U; w_count <= KEY_WAITTIME; w_count++)

Firmware/Source/Device/Cmsemicon/BAT32A239/Library/Driver/src/sci_common.c

@@ -103,7 +103,96 @@ void sci_error_log_internal(int8_t err, const char *file, int32_t line)
         /* Do nothing. */
     }
 }
+#if 1
+/**
+  * @brief  Calculate the register setting options for baud rate to UART peripheral.
+  * @param  fclk_freq: System clock value on chip.
+  * @param  baud: The target baud rate which want to setting.
+  * @param  pValue: UART baud rate setting option data structure.
+  * @param 	cur_sps: current SPS register value, clock sharing it with other channels,  Try not to modify it as much as possible.
+  * 				 if 'cur_sps = 0x00' or 'cur_sps = FORCE_RECONF', Ignore the original register value and force reconfiguration.			laidi
+  * @retval None
+  */
+float SCIPeriphal_ClockUpdate(SCIAFSelect_TypeDef func, uint32_t fclk, uint32_t ftclk, uint8_t cur_sps, SCIPeriph_Clock_TypeDef *clock)
+{
+#define CALCULATE_MAX_SPS		0x0F
+#define CALCULATE_MAX_SDR		0x7F
+#define FORCE_RECONF  			0xFF
+	uint8_t i;
+	uint8_t min_sdr, max_sps;
+	uint32_t cal_fmck = 0;
+	int16_t idea_sdr;
+	uint8_t sdr_int;
+	uint16_t max_err = 0xFFFF, temp_err = 0xFFFF;
+	float ret_err = 100.0;
+	
+	if(ftclk == 0)
+	{
+		return ret_err;
+	}
 
+	if (func & SCI_UART_MASK)
+	{
+		min_sdr = 2;
+	}
+	else if (func & SCI_I2C_MASK)
+	{
+		min_sdr = 1;
+	}
+	else
+	{
+		min_sdr = 0;
+	}
+
+	if ((cur_sps == 0x00) || (cur_sps == FORCE_RECONF))
+	{
+		max_sps = CALCULATE_MAX_SPS + 1;
+	}
+	else
+	{
+		clock->sps = cur_sps;
+		max_sps = 1;		/* for (i..) loop once */
+	}
+
+  for (i = 0; i < max_sps; i++)
+  {
+		/* cac fMCK, SPS reg*/
+		if ((cur_sps == 0x00) || (cur_sps == FORCE_RECONF))
+		{
+			cal_fmck = fclk / sps_tab[i];
+		}
+		else
+		{
+			i = cur_sps;
+			cal_fmck = fclk / sps_tab[cur_sps];
+		}
+
+		/* cal_ftclk = cal_fmck /2 /(SDR[15:9]+1), data scaled up 100 times for calculations.*/
+		idea_sdr = ((cal_fmck >> 1) *100) / ftclk;
+		if((idea_sdr > (min_sdr*100 +50)) && (idea_sdr < (CALCULATE_MAX_SDR*100 +50)))
+		{
+			sdr_int = (idea_sdr + 50)/100;
+			temp_err = abs((sdr_int * 100) - idea_sdr) * 10000 / idea_sdr;
+			
+			if(temp_err < max_err)
+			{
+				clock->sps = i;
+				clock->sdr = sdr_int - 1;
+				max_err = temp_err;
+			}
+			if(max_err == 0)
+			{
+				return (float)0.0;
+			}
+		}
+	}
+
+	ret_err = max_err /(float)100.0;
+	return ret_err;
+}
+#endif
+
+#if 0
 /**
   * @brief  Calculate the register setting options for baud rate to UART peripheral.
   * @param  fclk_freq: System clock value on chip.
@@ -167,6 +256,7 @@ float SCIPeriphal_ClockUpdate(SCIAFSelect_TypeDef func, uint32_t fclk, uint32_t
 	return max_err;
 }
 
+#endif
 /**
   * @brief  This function is aimed to check sci unit and its channel is used or not  
   * @param  func: The AF function for SCI channel periphal.

Firmware/Source/Device/Cmsemicon/BAT32A239/Library/Driver/src/sspi.c

@@ -505,37 +505,37 @@ uint8_t SSPI_Get_TransmitMode(SCIAFSelect_TypeDef SSPIx)
 		case SSPI00:
 		{
 			I2C0_TypeDef *SSPI_Instance = &SCI0->I2C0;
-            Mode = SSPI_TransmitMode_Mask & ((SSPI_Instance->SCR & SCI_RECEPTION_TRANSMISSION) >> 14);
+            Mode = (uint8_t)(SSPI_TransmitMode_Mask & ((SSPI_Instance->SCR & SCI_RECEPTION_TRANSMISSION) >> 14));
 		}
 		break;
 		case SSPI01:
 		{
 			I2C1_TypeDef *SSPI_Instance = &SCI0->I2C1;
-            Mode = SSPI_TransmitMode_Mask & ((SSPI_Instance->SCR & SCI_RECEPTION_TRANSMISSION) >> 14);
+            Mode = (uint8_t)(SSPI_TransmitMode_Mask & ((SSPI_Instance->SCR & SCI_RECEPTION_TRANSMISSION) >> 14));
 		}
 		break;
 		case SSPI10:
 		{
 			I2C2_TypeDef *SSPI_Instance = &SCI0->I2C2;
-            Mode = SSPI_TransmitMode_Mask & ((SSPI_Instance->SCR & SCI_RECEPTION_TRANSMISSION) >> 14);
+            Mode = (uint8_t)(SSPI_TransmitMode_Mask & ((SSPI_Instance->SCR & SCI_RECEPTION_TRANSMISSION) >> 14));
 		}
 		break;
 		case SSPI11:
 		{
 			I2C3_TypeDef *SSPI_Instance = &SCI0->I2C3;
-            Mode = SSPI_TransmitMode_Mask & ((SSPI_Instance->SCR & SCI_RECEPTION_TRANSMISSION) >> 14);
+            Mode = (uint8_t)(SSPI_TransmitMode_Mask & ((SSPI_Instance->SCR & SCI_RECEPTION_TRANSMISSION) >> 14));
 		}
 		break;
 		case SSPI20:
 		{
 			I2C4_TypeDef *SSPI_Instance = &SCI1->I2C4;
-            Mode = SSPI_TransmitMode_Mask & ((SSPI_Instance->SCR & SCI_RECEPTION_TRANSMISSION) >> 14);
+            Mode = (uint8_t)(SSPI_TransmitMode_Mask & ((SSPI_Instance->SCR & SCI_RECEPTION_TRANSMISSION) >> 14));
 		}
 		break;
 		case SSPI21:
 		{
 			I2C5_TypeDef *SSPI_Instance = &SCI1->I2C5;
-            Mode = SSPI_TransmitMode_Mask & ((SSPI_Instance->SCR & SCI_RECEPTION_TRANSMISSION) >> 14);
+            Mode = (uint8_t)(SSPI_TransmitMode_Mask & ((SSPI_Instance->SCR & SCI_RECEPTION_TRANSMISSION) >> 14));
 		}
 		break;
 #if defined(BAT32G1XX_80PIN) || defined(BAT32G1XX_100PIN)
@@ -575,37 +575,37 @@ uint8_t SSPI_Get_MasterMode(SCIAFSelect_TypeDef SSPIx)
 		case SSPI00:
 		{
 			I2C0_TypeDef *SSPI_Instance = &SCI0->I2C0;
-            Mode = ((SSPI_Instance->SMR & (SPI_Mode_Slave<<14)) >> 14);
+            Mode = (uint8_t)((SSPI_Instance->SMR & (SPI_Mode_Slave<<14)) >> 14);
 		}
 		break;
 		case SSPI01:
 		{
 			I2C1_TypeDef *SSPI_Instance = &SCI0->I2C1;
-            Mode = ((SSPI_Instance->SMR & (SPI_Mode_Slave<<14)) >> 14);
+            Mode = (uint8_t)((SSPI_Instance->SMR & (SPI_Mode_Slave<<14)) >> 14);
 		}
 		break;
 		case SSPI10:
 		{
 			I2C2_TypeDef *SSPI_Instance = &SCI0->I2C2;
-            Mode = ((SSPI_Instance->SMR & (SPI_Mode_Slave<<14)) >> 14);
+            Mode = (uint8_t)((SSPI_Instance->SMR & (SPI_Mode_Slave<<14)) >> 14);
 		}
 		break;
 		case SSPI11:
 		{
 			I2C3_TypeDef *SSPI_Instance = &SCI0->I2C3;
-            Mode = ((SSPI_Instance->SMR & (SPI_Mode_Slave<<14)) >> 14);
+            Mode = (uint8_t)((SSPI_Instance->SMR & (SPI_Mode_Slave<<14)) >> 14);
 		}
 		break;
 		case SSPI20:
 		{
 			I2C4_TypeDef *SSPI_Instance = &SCI1->I2C4;
-            Mode = ((SSPI_Instance->SMR & (SPI_Mode_Slave<<14)) >> 14);
+            Mode = (uint8_t)((SSPI_Instance->SMR & (SPI_Mode_Slave<<14)) >> 14);
 		}
 		break;
 		case SSPI21:
 		{
 			I2C5_TypeDef *SSPI_Instance = &SCI1->I2C5;
-            Mode = ((SSPI_Instance->SMR & (SPI_Mode_Slave<<14)) >> 14);
+            Mode = (uint8_t)((SSPI_Instance->SMR & (SPI_Mode_Slave<<14)) >> 14);
 		}
 		break;
 #if defined(BAT32G1XX_80PIN) || defined(BAT32G1XX_100PIN)

Firmware/Source/Device/Cmsemicon/BAT32A239/Library/Driver/src/tim.c

@@ -190,7 +190,7 @@ void TIM_Cmd(TIMSelect_TypeDef TIMx,uint8_t Chx,TIM_FunState NewState)
   * @brief  Set the specified TIMER channel's count num.
   * @param  TIMx: where x can be 0, 1, select TIEMR peripheral.
   * @param  Chx: where x can be 0, 1,2,3 select channel of  specified TIMER peripheral.
-  * 	@arg TTM_Channel_0、TTM_Channel_1、TTM_Channel_2、TTM_Channel_3
+  * 	@arg TTM_Channel_0��TTM_Channel_1��TTM_Channel_2��TTM_Channel_3
   * @param  counter: the count num of the TIEMR channel.          
   * @retval None
   */
@@ -278,7 +278,7 @@ int TIM_Init(TIM_InitTypeDef *TIM_InitStruct)
 		for(masterPos = 0; masterPos < 8; masterPos++)
 		{
 			posm = ((char)0x01) << masterPos;
-			masterNum = TIM_InitStruct->TIM_Selection_Master & posm;
+			masterNum = (uint8_t)(TIM_InitStruct->TIM_Selection_Master & posm);
 			if(masterNum == posm)
 			{
 				currentMChan[j]=masterPos;
@@ -294,11 +294,11 @@ int TIM_Init(TIM_InitTypeDef *TIM_InitStruct)
 				*TIM_reg.TDR[currentMChan[j]] = TIM_InitStruct->TIM_Period[currentMChan[j]] -1;				 
 				*TIM_reg.TO &= ~(1 << masterPos);
 				*TIM_reg.TOE &= ~(1 << masterPos);	
-				MISC->NFEN1 |=  (1<<currentMChan[j]);	 //后加			
+				MISC->NFEN1 |=  (1<<currentMChan[j]);	 //���			
 				j++;
 			}			
 		}
-		for(chanPos = 0; chanPos < 8; chanPos++)   //从属通道配置
+		for(chanPos = 0; chanPos < TIMER_CHAN_MAX_NUM; chanPos++)   //����ͨ������
 		{
 			pos = ((uint8_t)0x01) << chanPos;
 			chanNum = TIM_InitStruct->TIM_Channel & pos;

Firmware/Source/Device/Cmsemicon/BAT32A239/Library/Driver/src/timm.c

@@ -217,12 +217,12 @@ void TMM_Init(TMM_InitTypeDef *TMM_InitStruct)
 	if(TMM_InitStruct->TMM_Mode == TMM_Mode_CompPWM)
 	{
 		CGC_PER1PeriphClockCmd(CGC_PER1Periph_PWMCUTOFF,ENABLE);
-		*TMM_reg.TMMR |= _80_TMM_TMGRD1_BUFFER |_40_TMM_TMGRC1_BUFFER|_20_TMM_TMGRD0_BUFFER; //the TMGRD1 used as TMGRB1 buffer registerTMGRC1 used as TMGRA1 buffer register TMGRD0 are used TMGRB0 buffer register	
+		*TMM_reg.TMMR |= _80_TMM_TMGRD1_BUFFER |_40_TMM_TMGRC1_BUFFER|_20_TMM_TMGRD0_BUFFER; //the TMGRD1 used as TMGRB1 buffer register��TMGRC1 used as TMGRA1 buffer register�� TMGRD0 are used TMGRB0 buffer register	
 		*TMM_reg.TMCR[TMM_InitStruct->TMM_Select] = TMM_InitStruct->TMM_CounterClear | TMM_InitStruct->TMM_Clk; //counter cleared condition 
 		*TMM_reg.TMFCR |= (TMM_InitStruct->TMM_BDTR.TMM_NegativeState << 3) | (TMM_InitStruct->TMM_BDTR.TMM_PostiveState << 2)| TMM_InitStruct->TMM_Combine_TransMode;
 		
-		*TMM_reg.TMDF[TMM_InitStruct->TMM_Select] |= (TMM_InitStruct->TMM_BDTR.TMIOA_BreakPolarity << 6) |(TMM_InitStruct->TMM_BDTR.TMIOB_BreakPolarity << 4)  \
-													| (TMM_InitStruct->TMM_BDTR.TMIOC_BreakPolarity << 2) |(TMM_InitStruct->TMM_BDTR.TMIOD_BreakPolarity << 0);
+		*TMM_reg.TMDF[TMM_InitStruct->TMM_Select] |= (uint8_t)((TMM_InitStruct->TMM_BDTR.TMIOA_BreakPolarity << 6) |(TMM_InitStruct->TMM_BDTR.TMIOB_BreakPolarity << 4)  \
+													| (TMM_InitStruct->TMM_BDTR.TMIOC_BreakPolarity << 2) |(TMM_InitStruct->TMM_BDTR.TMIOD_BreakPolarity << 0));
 		
 		 TMM->TMELC |= (TMM_InitStruct->TMM_BDTR.TMM_Break <<1) << (TMM_InitStruct->TMM_Select << 4);
 				

Firmware/Source/Device/Cmsemicon/BAT32A239/Library/Driver/src/uart.c

@@ -49,11 +49,11 @@
   */
 static uint32_t UART_GetSysClock(void)
 {
-	if (USE_HSE_SYSTYEM_CLOCK == SYSTYEM_CLOCK_OPEN)	
-	{
-		return 8000000;
-	}
-	else
+	//if (USE_HSE_SYSTYEM_CLOCK == SYSTYEM_CLOCK_OPEN)	
+	//{
+	//	return 32000000;
+	//}
+	//else
 	{
 		return SystemCoreClock;
 	}

Firmware/Source/Device/Cmsemicon/BAT32A239/RTE/AD/RTE_AD.c

@@ -4,11 +4,11 @@
 #include "gpio.h"
 #include "RTE_AD.h"
 
-void RTC_ADC_Interrupt(void *msg)
-{
-	INTC_ClearPendingIRQ(ADC_IRQn);     //clear INTAD interrupt flag
+// void RTC_ADC_Interrupt(void *msg)
+// {
+// 	INTC_ClearPendingIRQ(ADC_IRQn);     //clear INTAD interrupt flag
 
-}
+// }
 
 
 void RTC_ADC_INIT(uint16_t u16Pin)

Firmware/Source/Device/Cmsemicon/BAT32A239/RTE/AD/RTE_AD.h

@@ -4,10 +4,11 @@
 
 #include <stdint.h>
 #include "adc.h"
+#include "RTE_ADC_INTERIM_VERSION.h"
 
 void RTC_ADC_INIT(uint16_t u16Pin);
 void RTC_ADC_Converse(ADC_Channel_t ch, uint32_t times, uint16_t *buf);
-void RTC_ADC_Interrupt(void *msg);
+// void RTC_ADC_Interrupt(void *msg);
 void RTC_ADC_Start(ADC_Channel_t ch);
 void RTC_ADC_Stop(void);
 

Firmware/Source/Device/Cmsemicon/BAT32A239/RTE/AD/RTE_ADC_INTERIM_VERSION.h

@@ -14,5 +14,6 @@ extern void RTE_ADC_Start_Conversion(void);
 extern void RTE_ADC_Stop_Conversion(void);
 extern uint8_t RTE_ADC_Get_Conversion_Status(void);
 extern void RTE_ADC_Get_Conversion_Result(uint16_t *pu16Data, uint8_t u8ChNum);
+extern void RTC_ADC_Interrupt(void *msg);
 
 #endif

Firmware/Source/Device/Cmsemicon/BAT32A239/RTE/CAN/rte_can.c

@@ -4,32 +4,51 @@
 #include "rte_can.h"
 
 
+CANBuffList_t CanBufList = {0};
 CANMSG_Type* CANMSG;
 CanTxRxMsg CAN_RecvMsg;
 can_rx_callback can_rx_handler = NULL;
 
+uint8_t Read_RingBuff(CanTxRxMsg *data)
+{
+    if (CanBufList.length == 0)
+    {
+        return 0;
+    }
+    *data = CanBufList.data[CanBufList.Head];
+    CanBufList.Head = (CanBufList.Head + 1) % LIST_BUF_MAX_NUM;
+    CanBufList.length--;
+    return 1;
+}
 /**
  * @brief CAN就收完成回调
  * 
  * @param msg 
  */
-static void can_recv_handler(void *msg)
+static void can_recv_handler(void)
 {
     INTC_ClearPendingIRQ(CAN0REC_IRQn);
 
     if (CAN_GetFlagStatus(CAN0, CAN_FLAG_REC) != RESET)
     {
         CAN_ClearFlag(CAN0, CAN_FLAG_REC);
-        CANMSG = CAN_Get_CANxMSGy(CAN0);
-        CAN_Receive_IT(CAN0, CANMSG, &CAN_RecvMsg);
-        
+
+        CAN_Receive_IT(CAN0, &CanBufList);
+        //Read_RingBuff(&CAN_RecvMsg);
+        //CAN_Receive(CAN0,&CAN_RecvMsg,100);
         if (can_rx_handler != NULL)
         {
             can_rx_handler(&CAN_RecvMsg);
+            Can_Rx_Cak(&CAN_RecvMsg);
         }
     }
 }
+static void can_error_handler(void)
+{
+    INTC_ClearPendingIRQ(CAN0ERR_IRQn);
 
+    //CANErr_Recover(CAN0);
+}
 /**
  * @brief CAN初始�?
  * 
@@ -51,7 +70,7 @@ uint8_t rte_can_init(can_config_st_t *config)
     GPIO_InitStruct.GPIO_Mode = GPIO_Mode_OUT;
     GPIO_InitStruct.GPIO_Level = GPIO_Level_HIGH;
     GPIO_InitStruct.GPIO_Ctrl = GPIO_Control_DIG;
-    GPIO_InitStruct.GPIO_OType = GPIO_OType_PP;
+		GPIO_InitStruct.GPIO_OType = GPIO_OType_PP;
     GPIO_Init(GPIO_PORT5, &GPIO_InitStruct);
 
     /* CRXD pin init */
@@ -85,11 +104,13 @@ uint8_t rte_can_init(can_config_st_t *config)
 
     CAN_OperatingModeRequest(CAN0, CAN_OpMode_Normal);
 
-    CAN_ITConfig(CAN0, CAN_IT_REC, ENABLE);
+    CAN_ITConfig(CAN0, CAN_IT_REC | CAN_IT_ERR_STATE | CAN_IT_ERR_PROTO, ENABLE); // |CAN_IT_TRX
 
     ISR_Register(CAN0REC_IRQn, can_recv_handler);
 
-    INTC_EnableIRQ(CAN0REC_IRQn);
+    //	ISR_Register(CAN0TRX_IRQn, can_tx_handler);
+
+    //ISR_Register(CAN0ERR_IRQn, can_error_handler);
 
 //    ISR_DisRegister(CAN0REC_IRQn, can_recv_handler);
 

Firmware/Source/Device/Cmsemicon/BAT32A239/RTE/CAN/rte_can.h

@@ -11,8 +11,8 @@
 #include "can.h"
 
 
-typedef void (* can_rx_callback)(CanTxRxMsg*);
-
+//typedef void (* can_rx_callback)(CanTxRxMsg*);
+typedef uint8_t (* can_rx_callback)(CanTxRxMsg*);
 typedef enum
 {
     CAN_500Kbps = 4,
@@ -44,5 +44,6 @@ extern uint8_t rte_can_init(can_config_st_t *config);
 extern uint8_t rte_can_deinit(CAN_CH ch);
 extern uint8_t get_can_busoff(CAN_CH ch);
 extern uint8_t reset_busoff(CAN_CH ch);
-
+extern uint8_t Read_RingBuff(CanTxRxMsg *data);
+extern void Can_Rx_Cak(CanTxRxMsg *Msg);
 #endif /* RTE_CAN_H_ */

Firmware/Source/Device/Cmsemicon/BAT32A239/RTE/CLOCK_Select/RTE_CLOCK_Select_BAT32A239.c

@@ -3,6 +3,7 @@
 #include "core_cm0plus.h"
 #include "RTE_CLOCK_Select.h"
 #include "cgc.h"
+#include "delay.h"
 
 #define USED_FX_FCLK
 //#define USED_FHOCO_FCLK
@@ -16,7 +17,7 @@ void RTE_CLOCK_Select_Start(void)
 	CGC_PLL_Setting(PLL_SR_fMX,PLL_DIV_2,PLL_MUL_16);
 	CGC_PLL_CFG_AS_FCLK(); 
 	delay_init(64000000);
-//	SystemCoreClock = 64000000UL;
+	SystemCoreClock = 64000000UL;
 #endif
 
 #ifdef USED_FHOCO_FCLK	

Firmware/Source/Device/Cmsemicon/BAT32A239/RTE/DeepSleep/DeepSleep.c

 #include <stdint.h>
 #include "GPIO\RTE_GPIO.h"
 #include "DeepSleep.h"
-
+#include"isr.h"
 
 void DEEPSLEEP_EXTI0_IRQHandler(void *msg);
 void DEEPSLEEP_EXTI1_IRQHandler(void *msg);
@@ -73,9 +73,9 @@ const RTE_DEEPSLEEP_INTP_Table_st_t DEEPSLEEP_INTP_Table[] =
 void RTE_DEEPSLEEP_GPIO_Interrupt_Enable(uint16_t u16Pin, Trigger_TypeDef EXTI_Trigger)
 {
     // int32_t  i32Result;
-		uint8_t  u8Index;
-    uint16_t u16PortIndex;
-    uint16_t u16PinIndex;
+		uint8_t  u8Index = 0;
+    uint16_t u16PortIndex = 0;
+    uint16_t u16PinIndex = 0;
 
     GPIO_InitTypeDef  GPIO_InitStruct = {0};
     INTP_InitTypeDef INTP_InitStructure;

Firmware/Source/Device/Cmsemicon/BAT32A239/RTE/GPIO/RTE_GPIO.h

@@ -142,7 +142,7 @@ typedef enum
 typedef struct
 {
     uint16_t u16PinNum;           /**< GPIO端口编号(RTE_GPIO_PORTxx_PINyy) */
-    uint16_t u16PinMode;          /**< GPIO工作模式 */
+    uint8_t u16PinMode;          /**< GPIO工作模式 */
 }RTE_GPIO_Config_st_t;
 
 /******************************************************************************

Firmware/Source/Device/Cmsemicon/BAT32A239/RTE/GPIO/RTE_GPIO_BAT32A239.c

@@ -527,10 +527,10 @@ int32_t RTE_GPIO_Interrupt_Register(RTE_GPIO_IRQ_Desc_st_t *pstIRQDesc,
  */
 int32_t RTE_GPIO_Interrupt_Enable(RTE_GPIO_IRQ_Desc_st_t *pstIRQDesc)
 {
-    int32_t  i32Result;
-	uint8_t  u8Index;
-    uint16_t u16PortIndex;
-    uint16_t u16PinIndex;
+    int32_t  i32Result = 0;
+	uint8_t  u8Index = 0;
+    uint16_t u16PortIndex = 0;
+    uint16_t u16PinIndex = 0;
     INTP_InitTypeDef stEXTICfg;
 	// GPIO_InitTypeDef GPIO_InitStruct;
     

Firmware/Source/Device/Cmsemicon/BAT32A239/RTE/GPIO/RTE_GPIO_BAT32A239.h

@@ -17,14 +17,14 @@ typedef struct
     void     *pvHandler;
 }RTE_GPIO_IRQ_Desc_st_t;
 
-#define   RTE_GPIO_PORT_GROUP_00             (00U)
-#define   RTE_GPIO_PORT_GROUP_01             (01U)
-#define   RTE_GPIO_PORT_GROUP_02             (02U)
-#define   RTE_GPIO_PORT_GROUP_03             (03U)
-#define   RTE_GPIO_PORT_GROUP_04             (04U)
-#define   RTE_GPIO_PORT_GROUP_05             (05U)
-#define   RTE_GPIO_PORT_GROUP_06             (06U)
-#define   RTE_GPIO_PORT_GROUP_07             (07U)
+#define   RTE_GPIO_PORT_GROUP_00             (0U)
+#define   RTE_GPIO_PORT_GROUP_01             (1U)
+#define   RTE_GPIO_PORT_GROUP_02             (2U)
+#define   RTE_GPIO_PORT_GROUP_03             (3U)
+#define   RTE_GPIO_PORT_GROUP_04             (4U)
+#define   RTE_GPIO_PORT_GROUP_05             (5U)
+#define   RTE_GPIO_PORT_GROUP_06             (6U)
+#define   RTE_GPIO_PORT_GROUP_07             (7U)
 #define   RTE_GPIO_PORT_GROUP_12             (12U)
 #define   RTE_GPIO_PORT_GROUP_13             (13U)
 #define   RTE_GPIO_PORT_GROUP_14             (14U)

Firmware/Source/Device/Cmsemicon/BAT32A239/RTE/RTC/RTE_RTC.c

@@ -5,7 +5,7 @@
 #include "BAT32A239.h"
 #include "gpio.h"
 #include "RTE_RTC.h"
-
+#include"isr.h"
 
  #define USED_FSUB_RTC_FCLK 
 
@@ -25,7 +25,7 @@ uint8_t RTC_Bcd2ToByte(uint8_t Value)
   * @param  Value: Byte to be converted.
   * @retval Converted byte
   */
-uint8_t RTC_ByteToBcd2(uint8_t Value)
+uint8_t RTC_ByteToBcd2_Format(uint8_t Value)
 {
   uint8_t bcdhigh = 0;
   
@@ -161,9 +161,9 @@ void RTE_RTC_Init(RTC_Information_st_t g_stRTCInformation)
     RTC_InitStructure.RTC_1HZ_Output = DISABLE; //RTC1HZ diable output
     RTC_Init(&RTC_InitStructure);
 
-    RTC->SUBCUD = 0x1A;
+    RTC->SUBCUD = 0x18;
 
-    ISR_Register(RTC_IRQn, rtc_interrupt);     //RTC????��????��??��??��
+    //ISR_Register(RTC_IRQn, rtc_interrupt);     //RTC????��????��??��??��
 
     RTE_RTC_Start();
 

Firmware/Source/Device/Cmsemicon/BAT32A239/RTE/RTC/RTE_RTC.h

@@ -62,7 +62,7 @@ extern  RTC_Information_st_t g_stRTCInformation;
 #define RTC_LEAP_YEAR g_RTCLeapYear
 
 uint8_t RTC_Bcd2ToByte(uint8_t Value);
-uint8_t RTC_ByteToBcd2(uint8_t Value);
+uint8_t RTC_ByteToBcd2_Format(uint8_t Value);
 extern void RTE_RTC_Pre_Init(void);
 extern void RTE_RTC_Init(RTC_Information_st_t g_stRTCInformation);
 extern void RTE_RTC_Set_Time(RTC_TimeTypeDef* RTC_TimeStruct, RTC_DateTypeDef* RTC_DateStruct);

Firmware/Source/Device/Cmsemicon/BAT32A239/RTE/RTE.h

@@ -12,7 +12,7 @@
 #include "DeepSleep\DeepSleep.h"
 #include "CLOCK_Select\RTE_CLOCK_Select.h"
 
-
+#include "UART\UART_DEMO.h"
 
 
 

Firmware/Source/Device/Cmsemicon/BAT32A239/RTE/Tick_Timer/RTE_Tick_Timer_BAT32A239.c

@@ -24,7 +24,7 @@ void RTE_Tick_Timer_Start(uint32_t u32Interval, RTE_Tick_Timer_Call_Back_ptr_t p
 		u32Interval = 1UL; 
 	}
 
-	u8Value_us = RTE_TICK_TIMER_CLK_SRC_FREQ/1000000;
+	u8Value_us = (uint8_t)(RTE_TICK_TIMER_CLK_SRC_FREQ/1000000);
   SysTick->LOAD  = u32Interval * u8Value_us;
 	NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL);
 	SysTick->VAL   = 0UL;

Firmware/Source/Device/Cmsemicon/BAT32A239/RTE/TrmerM/TrmerM.c

@@ -95,7 +95,7 @@ uint8_t TimerM_PWM_counter_Output_Init(TIMERM_PWM_Counter_en_t counter, uint16_t
         return 1;
     }
     
-    TIMM_InitStructure[counter].TMM_CHA_Pulse                   = cycle_pulse[counter] & 0x0FFFF;//这里需要计算，调试�? period;  //周期设置为period
+    TIMM_InitStructure[counter].TMM_CHA_Pulse                   = (uint16_t)(cycle_pulse[counter] & 0x0FFFF);//这里需要计算，调试�? period;  //周期设置为period
     
     
     
@@ -201,7 +201,7 @@ uint8_t TimerM_PWM_CH_Output_init(TIMERM_PWM_Counter_en_t counter, TIMERM_PWM_Ch
     switch (ch)
     {
     case TIMERM_CHB:
-        TIMM_InitStructure[counter].TMM_CHB_Pulse = ((cycle_pulse[counter]) ) & 0x0FFFF;  	//TM计数达到TMGRB. 占空�?:duty2/period
+        TIMM_InitStructure[counter].TMM_CHB_Pulse = (uint16_t)(((cycle_pulse[counter]) ) & 0x0FFFF);  	//TM计数达到TMGRB. 占空�?:duty2/period
         TIMM_InitStructure[counter].TMM_PWM.TMM_CHB.TMM_PWMInitLevel = TMM_PWMInitLevel_High;
         TIMM_InitStructure[counter].TMM_PWM.TMM_CHB.TMM_PWMActiveLevel = ActiveLevel;
         if (counter == TIMERM_COUNTER0)
@@ -217,7 +217,7 @@ uint8_t TimerM_PWM_CH_Output_init(TIMERM_PWM_Counter_en_t counter, TIMERM_PWM_Ch
         break;
     
     case TIMERM_CHC:
-        TIMM_InitStructure[counter].TMM_CHC_Pulse =  ((cycle_pulse[counter]) ) & 0x0FFFF;  	//TM计数达到TMGRC. 占空�?:duty2/period
+        TIMM_InitStructure[counter].TMM_CHC_Pulse =  (uint16_t)(((cycle_pulse[counter]) ) & 0x0FFFF);  	//TM计数达到TMGRC. 占空�?:duty2/period
         TIMM_InitStructure[counter].TMM_PWM.TMM_CHC.TMM_PWMInitLevel = TMM_PWMInitLevel_High;
         TIMM_InitStructure[counter].TMM_PWM.TMM_CHC.TMM_PWMActiveLevel = ActiveLevel;
         if (counter == TIMERM_COUNTER0)
@@ -232,7 +232,7 @@ uint8_t TimerM_PWM_CH_Output_init(TIMERM_PWM_Counter_en_t counter, TIMERM_PWM_Ch
         break;
     
     case TIMERM_CHD:
-        TIMM_InitStructure[counter].TMM_CHD_Pulse = ((cycle_pulse[counter]) ) & 0x0FFFF;  	//TM计数达到TMGRD. 占空�?:duty3/period
+        TIMM_InitStructure[counter].TMM_CHD_Pulse = (uint16_t)(((cycle_pulse[counter]) ) & 0x0FFFF);  	//TM计数达到TMGRD. 占空�?:duty3/period
         TIMM_InitStructure[counter].TMM_PWM.TMM_CHD.TMM_PWMInitLevel = TMM_PWMInitLevel_High;//TMM_PWMInitLevel_High;//
         TIMM_InitStructure[counter].TMM_PWM.TMM_CHD.TMM_PWMActiveLevel = ActiveLevel;//TMM_PWMActiveLevel_Low;//TMM_PWMActiveLevel_High;//
         if (counter == TIMERM_COUNTER0)
@@ -304,12 +304,12 @@ uint8_t TimerM_PWM_set_duty(TIMERM_PWM_Counter_en_t counter, TIMERM_PWM_Channel_
     if (counter == TIMERM_COUNTER0) 
     {
         high_level_Pulse[counter][ch] = (((cycle_pulse[counter] * duty) / 1000) & 0x0FFFF);
-        TMM0_Set_Counter(1 << (ch + 1), high_level_Pulse[counter][ch]);
+        TMM0_Set_Counter(1 << (ch + 1), (uint16_t)(high_level_Pulse[counter][ch]));
     }
     else if (counter == TIMERM_COUNTER1)
     {
         high_level_Pulse[counter][ch] = (((cycle_pulse[counter] * duty) / 1000) & 0x0FFFF);
-        TMM1_Set_Counter(1 << (ch + 1), high_level_Pulse[counter][ch]);
+        TMM1_Set_Counter(1 << (ch + 1), (uint16_t)(high_level_Pulse[counter][ch]));
     }
     else
     {
@@ -365,12 +365,12 @@ uint8_t TimerM_PWM_set_freq(TIMERM_PWM_Counter_en_t counter, uint16_t freq )
     high_level_Pulse[counter][TIMERM_CHC] = (((cycle_pulse[counter] * pwm_duty[counter][TIMERM_CHC]) / 1000) & 0x0FFFF);
     high_level_Pulse[counter][TIMERM_CHD] = (((cycle_pulse[counter] * pwm_duty[counter][TIMERM_CHD]) / 1000) & 0x0FFFF);
 
-    TIMM_InitStructure[counter].TMM_CHB_Pulse = high_level_Pulse[counter][TIMERM_CHB];
-    TIMM_InitStructure[counter].TMM_CHC_Pulse = high_level_Pulse[counter][TIMERM_CHC];
-    TIMM_InitStructure[counter].TMM_CHD_Pulse = high_level_Pulse[counter][TIMERM_CHD];
+    TIMM_InitStructure[counter].TMM_CHB_Pulse = (uint16_t)(high_level_Pulse[counter][TIMERM_CHB]);
+    TIMM_InitStructure[counter].TMM_CHC_Pulse = (uint16_t)(high_level_Pulse[counter][TIMERM_CHC]);
+    TIMM_InitStructure[counter].TMM_CHD_Pulse = (uint16_t)(high_level_Pulse[counter][TIMERM_CHD]);
 
     
-    TIMM_InitStructure[counter].TMM_CHA_Pulse = cycle_pulse[counter] & 0x0FFFF;
+    TIMM_InitStructure[counter].TMM_CHA_Pulse = (uint16_t)(cycle_pulse[counter] & 0x0FFFF);
 
     TMM_Init(&TIMM_InitStructure[counter]);
 
@@ -394,10 +394,10 @@ uint8_t TimerM_PWM_set_freq2(TIMERM_PWM_Counter_en_t counter, uint16_t freq )
         high_level_Pulse[counter][TIMERM_CHB] = (((cycle_pulse[counter] * pwm_duty[counter][TIMERM_CHB]) / 1000) & 0x0FFFF);
         high_level_Pulse[counter][TIMERM_CHC] = (((cycle_pulse[counter] * pwm_duty[counter][TIMERM_CHC]) / 1000) & 0x0FFFF);
         high_level_Pulse[counter][TIMERM_CHD] = (((cycle_pulse[counter] * pwm_duty[counter][TIMERM_CHD]) / 1000) & 0x0FFFF);
-        TMM0_Set_Counter(1 << 1, high_level_Pulse[counter][TIMERM_CHB]);
-        TMM0_Set_Counter(1 << 2, high_level_Pulse[counter][TIMERM_CHC]);
-        TMM0_Set_Counter(1 << 3, high_level_Pulse[counter][TIMERM_CHD]);
-        TMM0_Set_Counter(1, cycle_pulse[counter]);
+        TMM0_Set_Counter(1 << 1, (uint16_t)(high_level_Pulse[counter][TIMERM_CHB]));
+        TMM0_Set_Counter(1 << 2, (uint16_t)(high_level_Pulse[counter][TIMERM_CHC]));
+        TMM0_Set_Counter(1 << 3, (uint16_t)(high_level_Pulse[counter][TIMERM_CHD]));
+        TMM0_Set_Counter(1, (uint16_t)(cycle_pulse[counter]));
     }
     else if (counter == TIMERM_COUNTER1)
     {
@@ -405,10 +405,10 @@ uint8_t TimerM_PWM_set_freq2(TIMERM_PWM_Counter_en_t counter, uint16_t freq )
         high_level_Pulse[counter][TIMERM_CHB] = (((cycle_pulse[counter] * pwm_duty[counter][TIMERM_CHB]) / 1000) & 0x0FFFF);
         high_level_Pulse[counter][TIMERM_CHC] = (((cycle_pulse[counter] * pwm_duty[counter][TIMERM_CHC]) / 1000) & 0x0FFFF);
         high_level_Pulse[counter][TIMERM_CHD] = (((cycle_pulse[counter] * pwm_duty[counter][TIMERM_CHD]) / 1000) & 0x0FFFF);
-        TMM1_Set_Counter(1 << 1, high_level_Pulse[counter][TIMERM_CHB]);
-        TMM1_Set_Counter(1 << 2, high_level_Pulse[counter][TIMERM_CHC]);
-        TMM1_Set_Counter(1 << 3, high_level_Pulse[counter][TIMERM_CHD]);
-        TMM1_Set_Counter(1, cycle_pulse[counter]);
+        TMM1_Set_Counter(1 << 1, (uint16_t)(high_level_Pulse[counter][TIMERM_CHB]));
+        TMM1_Set_Counter(1 << 2, (uint16_t)(high_level_Pulse[counter][TIMERM_CHC]));
+        TMM1_Set_Counter(1 << 3, (uint16_t)(high_level_Pulse[counter][TIMERM_CHD]));
+        TMM1_Set_Counter(1, (uint16_t)(cycle_pulse[counter]));
     }
     else
     {

Firmware/Source/Device/Cmsemicon/BAT32A239/RTE/UART/UART.c

-/*
- * UART.c
- *
- *  Created on: 2024��2��23��
- */
-#include <stdint.h>
-#include "UART.h"
-#include "uart.h"
-#include "gpio.h"
-
-int8_t RTE_UART_Init(SCIAFSelect_TypeDef UARTx, uint32_t baudRate, uint16_t bitorder)
-{
-  
-    switch(UARTx)
-	{
-		case UART0:       
-		{
-            int8_t ret;
-            GPIO_InitTypeDef GPIO_InitStruct = {0};
-            UART_InitTypeDef UART_InitStructure = {0};
-
-            GPIO_PinAFConfig(GPIO_PORT5, GPIO_Pin_1, GPIO_P51, GROUP_AF_ODEFAULT);
-            GPIO_PinAFConfig(GPIO_PORT5, GPIO_Pin_0, GPIO_P50, GROUP_AF_ODEFAULT);
-
-            /*TX GPIO CONFIG*/
-            GPIO_InitStruct.GPIO_Pin    = GPIO_Pin_1;
-            GPIO_InitStruct.GPIO_Mode   = GPIO_Mode_OUT;
-            GPIO_InitStruct.GPIO_OType  = GPIO_OType_PP;
-            GPIO_InitStruct.GPIO_Level   = GPIO_Level_HIGH;	
-            GPIO_InitStruct.GPIO_Ctrl  = GPIO_Control_DIG;
-            GPIO_Init(GPIO_PORT5, &GPIO_InitStruct);
-
-            /*RX GPIO CONFIG*/
-            GPIO_InitStruct.GPIO_Pin    = GPIO_Pin_0 ;
-            GPIO_InitStruct.GPIO_Mode   = GPIO_Mode_IN;
-            GPIO_InitStruct.GPIO_Ctrl   = GPIO_Control_DIG;
-            GPIO_Init(GPIO_PORT5, &GPIO_InitStruct);
-
-            /*USART CONFIG*/
-            UART_InitStructure.UART_BaudRate = baudRate;
-            UART_InitStructure.UART_WordLength = UART_WordLength_8b;
-            UART_InitStructure.UART_StopBits = UART_StopBits_1;
-            UART_InitStructure.UART_Parity = UART_Parity_No;
-            UART_InitStructure.phase = UART_Phase_Normal;
-            UART_InitStructure.bitorder = bitorder;
-            UART_InitStructure.UART_Mode = UART_Mode_Rx | UART_Mode_Tx; 
-
-            ret = UART_Init(UART0, &UART_InitStructure);
-
-            if (ret)
-            {
-                SCI_ERROR_LOG(ret);
-                return ret;
-            }
-
-//            ISR_Register(ST0_IRQn, uart0_interrupt_send);     
-//            ISR_Register(SR0_IRQn, uart0_interrupt_receive);  
-
-
-            return SCI_SUCCESS;
-        }
-        // break;
-        case UART1:       
-		{
-            int8_t res ;
-            GPIO_InitTypeDef GPIO_InitStruct = {0};
-            UART_InitTypeDef UART_InitStructure = {0};
-
-        #ifndef  BAT32G1XX_48PIN	
-            GPIO_PinAFConfig(GPIO_PORT0, GPIO_Pin_2, GPIO_P02, GROUP_AF_ODEFAULT);
-            GPIO_PinAFConfig(GPIO_PORT0, GPIO_Pin_3, GPIO_P03, GROUP_AF_ODEFAULT);
-
-            /*TX GPIO CONFIG*/
-            GPIO_InitStruct.GPIO_Pin    = GPIO_Pin_2;
-            GPIO_InitStruct.GPIO_Mode   = GPIO_Mode_OUT;
-            GPIO_InitStruct.GPIO_OType  = GPIO_OType_PP;
-            GPIO_InitStruct.GPIO_Level   = GPIO_Level_HIGH;	
-            GPIO_InitStruct.GPIO_Ctrl   = GPIO_Control_DIG;
-            GPIO_Init(GPIO_PORT0, &GPIO_InitStruct);
-
-            /*RX GPIO CONFIG*/
-            GPIO_InitStruct.GPIO_Pin    = GPIO_Pin_3;
-            GPIO_InitStruct.GPIO_Mode   = GPIO_Mode_IN;
-            GPIO_InitStruct.GPIO_Ctrl   = GPIO_Control_DIG;
-            GPIO_Init(GPIO_PORT0, &GPIO_InitStruct);
-        #else 
-            GPIO_PinAFConfig(GPIO_PORT0, GPIO_Pin_0, GPIO_P00, GROUP_AF_ODEFAULT);
-            GPIO_PinAFConfig(GPIO_PORT0, GPIO_Pin_1, GPIO_P01, GROUP_AF_ODEFAULT);
-
-            /*TX GPIO CONFIG*/
-            GPIO_InitStruct.GPIO_Pin    = GPIO_Pin_2;
-            GPIO_InitStruct.GPIO_Mode   = GPIO_Mode_OUT;
-            GPIO_InitStruct.GPIO_OType  = GPIO_OType_PP;
-            GPIO_InitStruct.GPIO_Level   = GPIO_Level_HIGH;	
-            GPIO_InitStruct.GPIO_Ctrl   = GPIO_Control_DIG;
-            GPIO_Init(GPIO_PORT0, &GPIO_InitStruct);
-
-            /*RX GPIO CONFIG*/
-            GPIO_InitStruct.GPIO_Pin    = GPIO_Pin_3;
-            GPIO_InitStruct.GPIO_Mode   = GPIO_Mode_IN;
-            GPIO_InitStruct.GPIO_Ctrl   = GPIO_Control_DIG;
-            GPIO_Init(GPIO_PORT0, &GPIO_InitStruct);	
-        #endif
-            /*USART CONFIG*/
-            UART_InitStructure.UART_BaudRate = baudRate;
-            UART_InitStructure.UART_WordLength = UART_WordLength_8b;
-            UART_InitStructure.UART_StopBits = UART_StopBits_1;
-            UART_InitStructure.UART_Parity = UART_Parity_No;
-            UART_InitStructure.phase = UART_Phase_Normal;
-            UART_InitStructure.bitorder = bitorder;
-            UART_InitStructure.UART_Mode = UART_Mode_Rx | UART_Mode_Tx; 
-
-            res = UART_Init(UART1, &UART_InitStructure); 
-
-            if (res)
-            {
-                SCI_ERROR_LOG(res);
-                return res;
-            }
-
-//            ISR_Register(ST1_IRQn, uart1_interrupt_send);     
-//            ISR_Register(SR1_IRQn, uart1_interrupt_receive);  
-
-            return SCI_SUCCESS;
-        }
-        // break;
-        case UART2:       
-		{
-            int8_t res ;
-            GPIO_InitTypeDef GPIO_InitStruct = {0};
-            UART_InitTypeDef UART_InitStructure = {0};
-
-            GPIO_PinAFConfig(GPIO_PORT1, GPIO_Pin_3, GPIO_P13, GROUP_AF_ODEFAULT);
-            GPIO_PinAFConfig(GPIO_PORT1, GPIO_Pin_4, GPIO_P14, GROUP_AF_ODEFAULT);
-
-            /*TX GPIO CONFIG*/
-            GPIO_InitStruct.GPIO_Pin    = GPIO_Pin_3;
-            GPIO_InitStruct.GPIO_Mode   = GPIO_Mode_OUT;
-            GPIO_InitStruct.GPIO_OType  = GPIO_OType_PP;
-            GPIO_InitStruct.GPIO_Level   = GPIO_Level_HIGH;		
-            GPIO_InitStruct.GPIO_Ctrl   = GPIO_Control_DIG;
-            GPIO_Init(GPIO_PORT1, &GPIO_InitStruct);
-
-            /*RX GPIO CONFIG*/
-            GPIO_InitStruct.GPIO_Pin    = GPIO_Pin_4;
-            GPIO_InitStruct.GPIO_Mode   = GPIO_Mode_IN;
-            GPIO_InitStruct.GPIO_Ctrl   = GPIO_Control_DIG;
-            GPIO_Init(GPIO_PORT1, &GPIO_InitStruct);
-
-            /*USART CONFIG*/
-            UART_InitStructure.UART_BaudRate = baudRate;
-            UART_InitStructure.UART_WordLength = UART_WordLength_8b;
-            UART_InitStructure.UART_StopBits = UART_StopBits_1;
-            UART_InitStructure.UART_Parity = UART_Parity_No;
-            UART_InitStructure.phase = UART_Phase_Normal;
-            UART_InitStructure.bitorder = bitorder;
-            UART_InitStructure.UART_Mode = UART_Mode_Rx | UART_Mode_Tx; 
-
-            res = UART_Init(UART2, &UART_InitStructure); 
-
-            if (res)
-            {
-                SCI_ERROR_LOG(res);
-                return res;
-            }
-
-//            ISR_Register(ST2_IRQn, uart2_interrupt_send);     
-//            ISR_Register(SR2_IRQn, uart2_interrupt_receive);  
-
-            return SCI_SUCCESS;
-        }
-        // break;
-    }
-
-}
-
-//void RTE_UART_Init(SCIAFSelect_TypeDef UARTx, uint32_t baudRate, uint16_t bitorder)
-//{
-//    UART_Init(UARTx, baudRate, bitorder);
-//}
-
-void RTE_UART_SendData(SCIAFSelect_TypeDef UARTx, uint8_t *pData)
-{
-    switch(UARTx)
-		{
-				case UART0:       
-				{
-            UART_SendByte(UART0, *pData);
-        }
-        break;
-        case UART1:       
-				{
-            UART_SendByte(UART1, *pData);
-        }
-        break;
-        case UART2:       
-				{
-            UART_SendByte(UART2, *pData);
-        }
-        break;
-
-    }
-}
-
-
-char RTE_UART_ReceiveData(SCIAFSelect_TypeDef UARTx, uint8_t *pData)
-{
-    switch(UARTx)
-	{
-		case UART0:       
-		{
-            return UART_ReceiveByte(UART0);
-        }
-        // break;
-        case UART1:       
-		{
-            return UART_ReceiveByte(UART1);
-        }
-        // break;
-        case UART2:       
-		{
-            return UART_ReceiveByte(UART2);
-        }
-        // break;
-    }
-}
-

Firmware/Source/Device/Cmsemicon/BAT32A239/RTE/UART/UART.h

-#ifndef RTE_UART_H_
-#define RTE_UART_H_
-
-#include <stdint.h>
-#include "sci_common.h"
-
-//Need to delete after SCI framework is ready
-#define UART0_TX      SCI0->SCI.TXD0
-#define UART0_RX      SCI0->SCI.RXD0
-#define UART1_TX      SCI0->SCI.TXD1
-#define UART1_RX      SCI0->SCI.RXD1
-#define UART2_TX      SCI1->SCI.TXD2
-#define UART2_RX      SCI1->SCI.RXD2
-#define UART3_TX      SCI2->SCI.TXD3
-#define UART3_RX      SCI2->SCI.RXD3
-
-#define PLL_SR_FIH_ENABLE						0
-#if PLL_SR_FIH_ENABLE
-	#define PLL_SR_FIH   
-#endif
-#define PLL_SR_FIH_ENABLE						0
-
-#if PLL_SR_FMX_ENABLE
-	#define PLL_SR_FMX_SYSCLK   
-#endif
-								
-#define PLL_SR_FMX_FREQ                          640000000
-
-#if defined( BAT32G1XX_100PIN) || defined( BAT32G1XX_80PIN)
-#define IS_UART_ALL_PERIPH(PERIPH)	\
-									(((PERIPH) == UART0) || ((PERIPH) == UART1) || ((PERIPH) == UART2)|| ((PERIPH) == UART3))
-#else
-#define IS_UART_ALL_PERIPH(PERIPH)	\
-									(((PERIPH) == UART0) || ((PERIPH) == UART1) || ((PERIPH) == UART2))
-
-#endif
-/** @defgroup UART_Word_Length 
-  * @{
-  */ 
-#define UART_WordLength_7b			((uint16_t)0x0006)
-#define UART_WordLength_8b			((uint16_t)0x0007)
-#define UART_WordLength_9b			((uint16_t)0x0008)
-#define UART_WordLength_16b			((uint16_t)0x000E)
-#define IS_UART_WORD_LENGTH(LENGTH)	(((LENGTH) == UART_WordLength_7b) || \
-									((LENGTH) == UART_WordLength_8b) || \
-									((LENGTH) == UART_WordLength_9b) || \
-									((LENGTH) == UART_WordLength_16b))
-
-/** @defgroup UART_Stop_Bits 
-  * @{
-  */ 
-  
-#define UART_StopBits_1				((uint16_t)0x0010)
-#define UART_StopBits_2				((uint16_t)0x0020)
-#define IS_UART_STOPBITS(STOPBITS)	(((STOPBITS) == UART_StopBits_1) || \
-									((STOPBITS) == UART_StopBits_2))
-/**
-  * @}
-  */ 
-
-/** @defgroup UART_Parity 
-  * @{
-  */ 
-  
-#define UART_Parity_No				((uint16_t)0x0000)
-#define UART_Parity_Even			((uint16_t)0x0200)
-#define UART_Parity_Odd				((uint16_t)0x0300)
-#define IS_UART_PARITY(PARITY)		(((PARITY) == UART_Parity_No)  || \
-                                	((PARITY) == UART_Parity_Even) || \
-                                	((PARITY) == UART_Parity_Odd))
-
-/** @defgroup UART_Mode 
-  * @{
-  */ 
-  
-#define UART_Mode_Rx				((uint16_t)0x0012)
-#define UART_Mode_Tx				((uint16_t)0x0022)
-#define IS_UART_MODE(MODE)			((((MODE) & (uint16_t)0x00CD) == 0x00) && ((MODE) != (uint16_t)0x00))
-
-
-/** @defgroup UART_bitorder 
-  * @{
-  */ 
-#define UART_Bit_LSB				((uint16_t)0x0080)
-#define UART_Bit_MSB				((uint16_t)0x0000)
-
-
-/** @defgroup UART_phase 
-  * @{
-  */ 
-#define UART_Phase_Normal			((uint16_t)0x0000)
-#define UART_Phase_Reverse			((uint16_t)0x0040)
-
-#define UART_PHASE_MASK				((uint16_t)0x0005)
-#define UART0_PHASE_POS				((uint16_t)((1 << 0) & UART_PHASE_MASK))
-#define UART1_PHASE_POS				((uint16_t)((1 << 2) & UART_PHASE_MASK))
-#define UART2_PHASE_POS				((uint16_t)((1 << 0) & UART_PHASE_MASK))
-
-#define UART_CTRL_POS				((uint16_t)0x01)
-
-/** @defgroup UART_Flags 
-  * @{
-  */
-
-#define UART_FLAG_TSF				((uint16_t)0x0040)
-#define UART_FLAG_BFF               ((uint16_t)0x0020)
-#define UART_FLAG_FEF               ((uint16_t)0x0004)
-#define UART_FLAG_PEF               ((uint16_t)0x0002)
-#define UART_FLAG_OVF				((uint16_t)0x0001)
-#define IS_UART_FLAG(FLAG)			((((FLAG) & (uint16_t)0xFF98) == 0x00) && ((FLAG) != (uint16_t)0x00))
-
-#define IS_UART_CLEAR_FLAG(FLAG)	((((FLAG) & (uint16_t)0xFFF8) == 0x00) && ((FLAG) != (uint16_t)0x00))
-
-typedef struct
-{
-	uint32_t UART_BaudRate;				/*!< This member configures the UART communication baud rate. */
-
-	uint16_t UART_WordLength;			/*!< Specifies the number of data bits transmitted or received in a frame.
-											This parameter can be a value of @ref UART_Word_Length */
-
-	uint16_t UART_StopBits;				/*!< Specifies the number of stop bits transmitted.
-											This parameter can be a value of @ref UART_Stop_Bits */
-
-	uint16_t UART_Parity;			  	/*!< Specifies the parity mode. This parameter can be a value of @ref UART_Parity
-											@note When parity is enabled, the computed parity is inserted at the MSB position of the transmitted data (9th bit when
-											the word length is set to 9 data bits; 8th bit when the word length is set to 8 data bits). */
-
-	uint16_t UART_Mode;				  	/*!< Specifies wether the Receive or Transmit mode is enabled or disabled.
-										This parameter can be a value of @ref UART_Mode */
-
-	uint16_t bitorder; 				    /*!< Specifies the bit stream transit order: LSB or MSB */
-
-	uint16_t phase;						/*!< Specifies UART output clock_Phase Normal or Reverse */
-
-} UART_InitTypeDef;
-
-// 初始化串�?
-int8_t RTE_UART_Init(SCIAFSelect_TypeDef UARTx, uint32_t baudRate, uint16_t bitorder);
-
-// 发送数�?
-void RTE_UART_SendData(SCIAFSelect_TypeDef UARTx, uint8_t *pData);
-
-// 接收数据
-char RTE_UART_ReceiveData(SCIAFSelect_TypeDef UARTx, uint8_t *pData);
-
-
-#endif /* RTE_UART_H_ */

Firmware/Source/Device/Cmsemicon/BAT32A239/RTE/UART/UART_DEMO.c

+/*******************************************************************************
+*                  COPYRIGHT (C) 2021 CMS Technologies Ltd.                    *
+*                                                                              *
+********************************************************************************
+* FileName      : uart_demo.c                                                  *
+* Author        :                                                              *
+* Version       : 1.0                                                          *
+* Date          : 2021.08.13                                                   *
+* Description   :                                                              *
+* Function List :                                                              *
+********************************************************************************/
+#include "UART_DEMO.h"
+
+unsigned char UART0_RX_BUF[UART_MAX_RECV_LEN];
+unsigned short UART0_RX_STA = 0;
+unsigned char UART0_TX_BUF[UART_MAX_RECV_LEN];
+
+
+
+/******************************************************************************
+* Function Name: Uart0_Init
+* @brief  UART0 init demo
+* @param  bound
+* @return init status
+******************************************************************************/
+int8_t Uart0_Init(uint32_t bound)//主要查看寄存器
+{
+	int8_t ret;
+    GPIO_InitTypeDef GPIO_InitStruct = {0};
+    UART_InitTypeDef UART_InitStructure = {0};
+
+    GPIO_PinAFConfig(GPIO_PORT1, GPIO_Pin_1, GPIO_P11, GROUP_AF_RXD0);
+    GPIO_PinAFConfig(GPIO_PORT1, GPIO_Pin_2, GPIO_P12, GROUP_AF_TXD0);
+
+    /*TX GPIO CONFIG*/
+    GPIO_InitStruct.GPIO_Pin    = GPIO_Pin_2;
+    GPIO_InitStruct.GPIO_Mode   = GPIO_Mode_OUT;
+    GPIO_InitStruct.GPIO_OType  = GPIO_OType_PP;
+	GPIO_InitStruct.GPIO_Level   = GPIO_Level_HIGH;	
+    GPIO_InitStruct.GPIO_Ctrl  = GPIO_Control_DIG;
+    GPIO_Init(GPIO_PORT1, &GPIO_InitStruct);
+
+    /*RX GPIO CONFIG*/
+    GPIO_InitStruct.GPIO_Pin    = GPIO_Pin_1 ;
+    GPIO_InitStruct.GPIO_Mode   = GPIO_Mode_IN;
+    GPIO_InitStruct.GPIO_Ctrl   = GPIO_Control_DIG;
+    GPIO_Init(GPIO_PORT1, &GPIO_InitStruct);
+
+    /*USART CONFIG*/
+    UART_InitStructure.UART_BaudRate = bound;
+    UART_InitStructure.UART_WordLength = UART_WordLength_8b;
+    UART_InitStructure.UART_StopBits = UART_StopBits_1;//Ò»¸öֹͣλ
+    UART_InitStructure.UART_Parity = UART_Parity_No;//ÎÞÆæżУÑéλ
+    UART_InitStructure.phase = UART_Phase_Normal;
+    UART_InitStructure.bitorder = UART_Bit_LSB;
+    UART_InitStructure.UART_Mode = UART_Mode_Rx | UART_Mode_Tx; //ÊÕ·¢Ä£Ê½
+
+    ret = UART_Init(UART0, &UART_InitStructure); //³õʼ»¯´®¿Ú
+
+    if (ret)
+    {
+        SCI_ERROR_LOG(ret);
+        return ret;
+    }
+
+    ISR_Register(ST0_IRQn, uart0_interrupt_send);     //´®¿Ú0·¢ËÍÖжϷþÎñ·¾¶×¢²á
+    ISR_Register(SR0_IRQn, uart0_interrupt_receive);  //´®¿Ú0½ÓÊÕÖжϷþÎñ·¾¶×¢²á
+
+
+    return SCI_SUCCESS;
+}
+
+
+
+/******************************************************************************
+* Function Name: Uart0_Send
+* @brief  UART0 Send data
+* @param  None
+* @return None
+*******************************************************************************/
+void Uart0_Send(uint8_t ch)
+{
+    UART_SendByte(UART0, ch);
+}
+/*****************************************************************************
+* Function Name: Uart0_Receive
+* @brief  UART0 receive data
+* @param  None
+* @return rx data
+*****************************************************************************/
+char Uart0_Receive(void)
+{
+    return UART_ReceiveByte(UART0);
+}
+
+/*****************************************************************************
+* Function Name: Uart0_IntSend
+* @brief  UART0 Send data by interrupt
+* @param  None
+* @return None
+*****************************************************************************/
+void Uart0_IntSend(uint8_t *tx_buf, uint32_t tx_num)
+{
+    pData.data = tx_buf;
+    pData.len = tx_num;
+
+    INTC_SetPendingIRQ(ST0_IRQn);
+}
+/****************************************************************************
+* Function Name: uart0_interrupt_send
+* @brief  UART0 Send interrupt service routine
+* @param  None
+* @return None
+*****************************************************************************/
+void uart0_interrupt_send(void *msg)
+{
+    ATE_FRAME_t *pFrame = (ATE_FRAME_t *)msg;
+    INTC_ClearPendingIRQ(ST0_IRQn);
+
+    if ((pFrame->len > 0U) && pFrame->data)
+    {
+        UART0_TX = *pFrame->data;
+        pFrame->data++;
+        pFrame->len --;
+    }
+    else //send finished
+    {
+    }
+}
+
+/*****************************************************************************
+* Function Name: uart_callback_error
+* @brief
+* @param  None
+* @return None
+******************************************************************************/
+void uart_callback_error(uint8_t err_type)
+{
+    //user edit here when appear error
+}
+
+/*****************************************************************************
+* Function Name: uart0_interrupt_receive
+* @brief  UART0 Receive interrupt service routine
+* @param  None
+* @return None
+*****************************************************************************/
+void uart0_interrupt_receive(void)
+{
+    volatile uint8_t rx_data;
+    volatile uint8_t err_type;
+
+    INTC_ClearPendingIRQ(SR0_IRQn);
+    err_type = UART_GetErrStaus(UART0, UART_FLAG_FEF | UART_FLAG_PEF | UART_FLAG_OVF);
+	
+    if (err_type)
+    {
+		UART_ClearFlag(UART0,UART_FLAG_FEF | UART_FLAG_PEF | UART_FLAG_OVF);
+        uart_callback_error(err_type);
+    }
+    rx_data = UART0_RX;
+    // UART_Put((uint16_t)rx_data);
+    
+
+
+   // if ((UART0_RX_STA & 0x8000U) == 0) //½ÓÊÕδÍê³É
+   // {
+   //     if (UART0_RX_STA & 0x4000U) //½ÓÊÕµ½0x0d
+   //     {
+   //         if (rx_data != 0x0a)
+	//		{
+	//			UART0_RX_BUF[UART0_RX_STA & 0x3fff] = rx_data;
+   //             UART0_RX_STA++;					
+	//		}
+   //         else
+   //         {
+   //             UART0_RX_STA |= 0x8000;
+   //             UART0_RX_BUF[UART0_RX_STA & 0x3fff] = rx_data;
+   //             UART0_RX_STA ++;
+   //         }
+   //     }
+   //     else                     //»¹Î´½ÓÊÕµ½0x0d
+   //     {
+   //         if (rx_data == 0x0d)
+   //         {
+   //             UART0_RX_STA |= 0x4000;
+   //             UART0_RX_BUF[UART0_RX_STA & 0x3fff] = rx_data;
+   //             UART0_RX_STA ++;
+   //         }
+   //         else
+   //         {
+   //             UART0_RX_BUF[UART0_RX_STA & 0x3fff] = rx_data;
+   //             UART0_RX_STA ++;
+   //         }
+   //     }
+   // }
+   // else if ((UART0_RX_STA & 0x8000U) == 1) // receive finished
+   // {
+   // }
+
+}
+

Firmware/Source/Device/Cmsemicon/BAT32A239/RTE/UART/UART_DEMO.h

+#ifndef __UART_DEMO_H__
+#define __UART_DEMO_H__
+#include <stdio.h>
+#include <stdint.h>
+#include <string.h>
+#include "uart.h"
+#include "gpio.h"
+#include "isr.h"
+#include "Application.h"
+#define UART_MAX_RECV_LEN      256
+
+extern unsigned char UART0_RX_BUF[UART_MAX_RECV_LEN];
+extern unsigned short UART0_RX_STA ;
+extern unsigned char UART0_TX_BUF[UART_MAX_RECV_LEN];
+
+int8_t Uart0_Init(uint32_t bound);
+
+void Uart0_Send(uint8_t ch);
+char Uart0_Receive(void);
+
+void Uart0_IntSend(uint8_t *tx_buf, uint32_t tx_num);
+void uart0_interrupt_send(void *msg);
+void uart0_interrupt_receive(void);
+#endif