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TianYing_ty100
TianYing_ty100
Commit 4decc8ed authored by 高士达's avatar 高士达
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Merge branch 'lijianshuang' into 'dev' 

Lijianshuang

See merge request !68
parents ab10570e dc41cd29
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Showing with 127 additions and 82 deletions
Firmware/Source/Application/Data_Coolant/Data_Coolant.c
View file @ 4decc8ed
......@@ -322,11 +322,11 @@ void Data_Coolant_Temp_Display ( void )
}
else
{
if (DataCoolantTemp.Value >= 115)
if (GET_DataCoolantSegValue() >= 115)
{
DataCoolantTemp_Dis.u8_Warnflg = 2;
}
else if (DataCoolantTemp.Value <= 112)
else if (GET_DataCoolantSegValue() <= 112)
{
DataCoolantTemp_Dis.u8_Warnflg = 0;
}
......
Firmware/Source/Component/PowerManagement/PowerManag_user.c
View file @ 4decc8ed
......@@ -50,9 +50,10 @@ static void Power_KL30_Init(void)
eeprom_StoreInfo_Init();
Can_Init();
Data_TPMS_KL30_Init ();
CAN_TX_Count_Init();
CAN_TX_SetEnable(&CAN_CH0_CanMsgTxOp, CAN_N_TX_Enable);
Data_TPMS_KL30_Init ();
DFlash_init();
Data_Read_DiagPara();
......@@ -75,7 +76,7 @@ static void Power_KL30_Init(void)
Fuel_KL30_Init();
Data_Voltage_Init();
// TimerM_PWM_counter_Output_Init(TIMERM_COUNTER0, 400, 64000000);
TimerM_PWM_counter_Output_Init(TIMERM_COUNTER1, 400, 64000000);
TimerM_PWM_counter_Output_Init(TIMERM_COUNTER1, 1260, 64000000);
// TimerM_PWM_counter_Output_Init(TIMERM_COUNTER0, 400);
// TimerM_PWM_counter_Output_Init(TIMERM_COUNTER1, 400);
// TimerM_PWM_CH_Output_init(TIMERM_COUNTER0, TIMERM_CHB, ActiveLevel_High);
......@@ -132,7 +133,7 @@ static void Power_Wakeup_Init(void)
Fuel_KL30_Init();
Data_Voltage_Init();
// TimerM_PWM_counter_Output_Init(TIMERM_COUNTER0, 400, 64000000);
TimerM_PWM_counter_Output_Init(TIMERM_COUNTER1, 400, 64000000);
TimerM_PWM_counter_Output_Init(TIMERM_COUNTER1, 1260, 64000000);
// TimerM_PWM_counter_Output_Init(TIMERM_COUNTER0, 400);
// TimerM_PWM_counter_Output_Init(TIMERM_COUNTER1, 400);
// TimerM_PWM_CH_Output_init(TIMERM_COUNTER0, TIMERM_CHB, ActiveLevel_High);
......
Firmware/Source/Device/Cmsemicon/BAT32A239/Library/Driver/src/cgc.c
View file @ 4decc8ed
#include "cgc.h"
uint8_t USE_HSE_SYSTYEM_CLOCK = SYSTYEM_CLOCK_CLOSE;
uint8_t USE_HSI_SYSTYEM_CLOCK = SYSTYEM_CLOCK_CLOSE;
uint8_t USE_LSE_SYSTYEM_CLOCK = SYSTYEM_CLOCK_CLOSE;
uint8_t USE_LSI_SYSTYEM_CLOCK = SYSTYEM_CLOCK_CLOSE;
/**
* @brief Enables or disables the PER0 peripheral clock.
* @note After reset, the peripheral clock (used for registers read/write access)
......@@ -127,32 +122,29 @@ void CGC_Osc_Setting(OSC_Pin_Mode_t main,OSC_Speed_Mode_t amph, OSC_Pin_Mode_t s
uint8_t tmp;
tmp = 0x00;
if(main == OSC_PORT )
if(main == OSC_OSCILLATOR)
{
tmp |= (0 << CGC_CMC_EXCLK_Pos) | (0 << CGC_CMC_OSCSEL_Pos);
tmp |= (0 << CGC_CMC_EXCLK_Pos) | (1 << CGC_CMC_OSCSEL_Pos) | (((uint8_t)amph) << CGC_CMC_AMPH_Pos);
}
if(sub == OSC_PORT )
else if(main == OSC_PORT )
{
tmp |= (0 << CGC_CMC_EXCLKS_Pos) | (0 << CGC_CMC_OSCSELS_Pos);
tmp |= (0 << CGC_CMC_EXCLK_Pos) | (0 << CGC_CMC_OSCSEL_Pos);
}
if(main == OSC_OSCILLATOR)
else if(main == OSC_EXCLK)
{
tmp |= (0 << CGC_CMC_EXCLK_Pos) | (1 << CGC_CMC_OSCSEL_Pos) | (1 << CGC_CMC_AMPH_Pos);
tmp |= (1 << CGC_CMC_EXCLK_Pos) | (1 << CGC_CMC_OSCSEL_Pos);
}
if(sub == OSC_OSCILLATOR)
{
tmp |= (0 << CGC_CMC_EXCLKS_Pos) | (1 << CGC_CMC_OSCSELS_Pos) | (1 << CGC_CMC_AMPHS_Pos);
tmp |= (0 << CGC_CMC_EXCLKS_Pos) | (1 << CGC_CMC_OSCSELS_Pos) | (((uint8_t)amphs) << CGC_CMC_AMPHS_Pos);
}
if(main == OSC_EXCLK)
else if(sub == OSC_PORT )
{
tmp |= (1 << CGC_CMC_EXCLK_Pos) | (1 << CGC_CMC_OSCSEL_Pos);
tmp |= (0 << CGC_CMC_EXCLKS_Pos) | (0 << CGC_CMC_OSCSELS_Pos);
}
if(sub == OSC_EXCLK)
else if(sub == OSC_EXCLK)
{
tmp |= (1 << CGC_CMC_EXCLKS_Pos) | (1 << CGC_CMC_OSCSELS_Pos);
}
......@@ -160,7 +152,7 @@ void CGC_Osc_Setting(OSC_Pin_Mode_t main,OSC_Speed_Mode_t amph, OSC_Pin_Mode_t s
CGC->CMC = tmp;
/* Set fMX */
CGC->CSC &= ~(1<<7) ; //MSTOP = 0
CGC->CSC &= ~(1 << CGC_CSC_MSTOP_Pos) ; //MSTOP = 0
if(main == OSC_OSCILLATOR)
{
......@@ -175,7 +167,7 @@ void CGC_Osc_Setting(OSC_Pin_Mode_t main,OSC_Speed_Mode_t amph, OSC_Pin_Mode_t s
}
/* Set fSUB */
CGC->CSC &= ~(1<<6) ; //XTSTOP = 0
CGC->CSC &= ~(1 << CGC_CSC_XTSTOP_Pos) ; //XTSTOP = 0
if(sub == OSC_OSCILLATOR)
{
......@@ -206,24 +198,24 @@ void CGC_Osc_Setting(OSC_Pin_Mode_t main,OSC_Speed_Mode_t amph, OSC_Pin_Mode_t s
*/
void CGC_LSEConfig(OSC_Pin_Mode_t sub, OSC_Power_Mode_t amphs)
{
/* Check the parameters */
volatile uint32_t w_count;
uint8_t tmp;
assert_param(IS_CGC_LSE_MODE(sub));
/* Check the parameters */
assert_param(IS_CGC_OSC_PIN_MODE(sub));
assert_param(IS_CGC_LSE_PWR_MODE(amphs));
tmp = 0x00;
if(sub == OSC_PORT )
{
tmp |= (0 << CGC_CMC_EXCLKS_Pos) | (0 << CGC_CMC_OSCSELS_Pos);
}
if(sub == OSC_OSCILLATOR)
{
tmp |= (0 << CGC_CMC_EXCLKS_Pos) | (1 << CGC_CMC_OSCSELS_Pos) | (amphs << CGC_CMC_AMPHS_Pos);
tmp |= (0 << CGC_CMC_EXCLKS_Pos) | (1 << CGC_CMC_OSCSELS_Pos) | (((uint8_t)amphs) << CGC_CMC_AMPHS_Pos);
}
if(sub == OSC_EXCLK)
else if(sub == OSC_PORT)
{
tmp |= (0 << CGC_CMC_EXCLKS_Pos) | (0 << CGC_CMC_OSCSELS_Pos);
}
else if(sub == OSC_EXCLK)
{
tmp |= (1 << CGC_CMC_EXCLKS_Pos) | (1 << CGC_CMC_OSCSELS_Pos);
}
......@@ -231,7 +223,7 @@ void CGC_LSEConfig(OSC_Pin_Mode_t sub, OSC_Power_Mode_t amphs)
CGC->CMC = tmp;
/* Set fSUB */
CGC->CSC &= ~(1<<6) ; //XTSTOP = 0
CGC->CSC &= ~(1 << CGC_CSC_XTSTOP_Pos) ; //XTSTOP = 0
if(sub == OSC_OSCILLATOR)
{
......@@ -261,27 +253,25 @@ void CGC_LSEConfig(OSC_Pin_Mode_t sub, OSC_Power_Mode_t amphs)
*/
void CGC_HSEConfig(OSC_Pin_Mode_t main, OSC_Speed_Mode_t amph)
{
/* Check the parameters */
volatile uint32_t w_count;
uint8_t temp_stab_set;
uint8_t temp_stab_wait;
uint8_t tmp;
assert_param(IS_CGC_LSE_MODE(main));
/* Check the parameters */
assert_param(IS_CGC_OSC_PIN_MODE(main));
assert_param(IS_CGC_HSE_OSC_SPEED(amph));
tmp = 0x00;
if(main == OSC_PORT )
{
tmp |= (0 << CGC_CMC_EXCLK_Pos) | (0 << CGC_CMC_OSCSEL_Pos);
}
if(main == OSC_OSCILLATOR)
{
tmp |= (0 << CGC_CMC_EXCLK_Pos) | (1 << CGC_CMC_OSCSEL_Pos) | (amph << CGC_CMC_AMPH_Pos);
tmp |= (0 << CGC_CMC_EXCLK_Pos) | (1 << CGC_CMC_OSCSEL_Pos) | (((uint8_t)amph) << CGC_CMC_AMPH_Pos);
}
if(main == OSC_EXCLK)
else if(main == OSC_PORT )
{
tmp |= (0 << CGC_CMC_EXCLK_Pos) | (0 << CGC_CMC_OSCSEL_Pos);
}
else if(main == OSC_EXCLK)
{
tmp |= (1 << CGC_CMC_EXCLK_Pos) | (1 << CGC_CMC_OSCSEL_Pos);
}
......@@ -289,7 +279,7 @@ void CGC_HSEConfig(OSC_Pin_Mode_t main, OSC_Speed_Mode_t amph)
CGC->CMC = tmp;
/* Set fMX */
CGC->CSC &= ~(1<<7) ; //MSTOP = 0
CGC->CSC &= ~(1 << CGC_CSC_MSTOP_Pos) ; //MSTOP = 0
if(main == OSC_OSCILLATOR)
{
......@@ -304,7 +294,17 @@ void CGC_HSEConfig(OSC_Pin_Mode_t main, OSC_Speed_Mode_t amph)
}
}
/* Clock switching needs to be executed in SRAM */
#if defined (__CC_ARM)
#pragma arm section code = "sram_code" // Arm Compiler 5
#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION > 6010050)
#pragma clang section text = "sram_code" // Arm Compiler 6
#endif
#if defined(__ICCARM__)
__ramfunc
#endif
/**
* @brief Enables External Low Speed oscillator (LSE/Fsub) used as CPU
......@@ -315,9 +315,12 @@ void CGC_HSEConfig(OSC_Pin_Mode_t main, OSC_Speed_Mode_t amph)
void CGC_LSE_CFG_AS_FCLK()
{
CGC->CKC = (1 << CGC_CKC_CSS_Pos) | (0 << CGC_CKC_MCM0_Pos);
__NOP();
__NOP();
__NOP();
__NOP();
while ((CGC->CKC & CGC_CKC_CLS_Msk) == 0);
USE_LSE_SYSTYEM_CLOCK = SYSTYEM_CLOCK_OPEN;
}
/**
......@@ -329,8 +332,11 @@ void CGC_LSE_CFG_AS_FCLK()
void CGC_HSE_CFG_AS_FCLK()
{
CGC->CKC = (0 << CGC_CKC_CSS_Pos) | (1 << CGC_CKC_MCM0_Pos );
__NOP();
__NOP();
__NOP();
__NOP();
while((CGC->CKC & CGC_CKC_MCS_Msk) == 0);
USE_HSE_SYSTYEM_CLOCK = SYSTYEM_CLOCK_OPEN;
}
/**
......@@ -342,12 +348,48 @@ void CGC_HSE_CFG_AS_FCLK()
*/
void CGC_HSI_CFG_AS_FCLK()
{
CGC->CKC = 0 << CGC_CKC_CSS_Pos ;
if (CGC->MCKC & CGC_MCKC_CKSTR_Msk)
{
CGC->MCKC &= ~(1 << CGC_MCKC_CKSELR_Pos);
__NOP();
__NOP();
__NOP();
__NOP();
while(CGC->MCKC & CGC_MCKC_CKSTR_Msk);
}
CGC->CKC = (0 << CGC_CKC_CSS_Pos) | (0 << CGC_CKC_MCM0_Pos );
__NOP();
__NOP();
__NOP();
__NOP();
while((CGC->CKC & (CGC_CKC_CSS_Msk | CGC_CKC_MCS_Msk)));
}
while((CGC->CKC & CGC_CKC_CSS_Msk) == 1);
USE_HSI_SYSTYEM_CLOCK = SYSTYEM_CLOCK_OPEN;
/**
* @brief Enables output frequency by PLL used as CPU
* system clock and Clock source of peripheral hardware circuit.
* @note
* @retval None
*/
__attribute__((section("RW_FUNC_PLL"))) void CGC_PLL_CFG_AS_FCLK(void)
{
CGC->MCKC |= (1 << CGC_MCKC_CKSELR_Pos);
__NOP();
__NOP();
__NOP();
__NOP();
while((CGC->MCKC & CGC_MCKC_CKSTR_Msk) == 0);
CGC->CKC = (0 << CGC_CKC_CSS_Pos) | (0 << CGC_CKC_MCM0_Pos );
__NOP();
__NOP();
__NOP();
__NOP();
while(CGC->CKC & CGC_CKC_CSS_Msk);
}
#if 0
/**
* @brief Enables External High Speed oscillator (HSE) used as MAIN system clock
* which can provided for clock output/buzzer or CPU/peripheral hardware circuit.
......@@ -356,7 +398,11 @@ void CGC_HSI_CFG_AS_FCLK()
*/
void CGC_HSE_CFG_AS_FMAIN()
{
CGC->CKC = 1 << CGC_CKC_MCM0_Pos;
CGC->CKC = (1 << CGC_CKC_MCM0_Pos);
__NOP();
__NOP();
__NOP();
__NOP();
while((CGC->CKC & CGC_CKC_MCS_Msk) == 0);
}
/**
......@@ -367,9 +413,20 @@ void CGC_HSE_CFG_AS_FMAIN()
*/
void CGC_HSI_CFG_AS_FMAIN()
{
CGC->CKC = 0 << CGC_CKC_MCM0_Pos;
while((CGC->CKC & CGC_CKC_MCS_Msk) == 1);
CGC->CKC = (0 << CGC_CKC_MCM0_Pos);
__NOP();
__NOP();
__NOP();
__NOP();
while(CGC->CKC & CGC_CKC_MCS_Msk);
}
#endif
#if defined (__CC_ARM)
#pragma arm section code // Arm Compiler 5
#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION > 6010050)
#pragma clang section text = "" // Arm Compiler 6
#endif
/**
* @brief Setting PLL used as system clock and Clock source of peripheral hardware circuit.
......@@ -424,7 +481,7 @@ void CGC_PLL_Setting(PLL_Src_t src, PLL_Div_t div, PLL_Mul_t mul)
CGC->PLLCR = tmp;
CGC->PLLCR |= 1<<0; /* PLLON = 1 */
CGC->PLLCR |= (1 << CGC_PLLCR_PLLON_Pos); /* PLLON = 1 */
for (i = 0U; i <= 2000; i++)
{
__NOP();
......@@ -432,19 +489,6 @@ void CGC_PLL_Setting(PLL_Src_t src, PLL_Div_t div, PLL_Mul_t mul)
}
/**
* @brief Enables output frequency by PLL used as CPU
* system clock and Clock source of peripheral hardware circuit.
* @note
* @retval None
*/
__attribute__((section("RW_FUNC_PLL"))) void CGC_PLL_CFG_AS_FCLK(void)
{
CGC->MCKC = 0x01;
while((CGC->MCKC & CGC_MCKC_CKSTR_Msk) == 0);
USE_HSE_SYSTYEM_CLOCK = SYSTYEM_CLOCK_OPEN;
}
/**
* @brief This function stops the main system clock oscilator (MOSC).
* @param None
......@@ -452,7 +496,7 @@ __attribute__((section("RW_FUNC_PLL"))) void CGC_PLL_CFG_AS_FCLK(void)
*/
void CGC_MainOsc_Stop(void)
{
CGC->CSC |= 1<<7; /* MSTOP = 1 */
CGC->CSC |= (1 << CGC_CSC_MSTOP_Pos); /* MSTOP = 1 */
}
/**
......@@ -462,7 +506,7 @@ void CGC_MainOsc_Stop(void)
*/
void CGC_MainOsc_Start(void)
{
CGC->CSC &= ~(1<<7); /* MSTOP = 0 */
CGC->CSC &= ~(1 << CGC_CSC_MSTOP_Pos); /* MSTOP = 0 */
}
/**
......@@ -472,7 +516,7 @@ void CGC_MainOsc_Start(void)
*/
void CGC_SubOsc_Stop(void)
{
CGC->CSC |= 1<<6; /* XTSTOP = 1 */
CGC->CSC |= (1 << CGC_CSC_XTSTOP_Pos); /* XTSTOP = 1 */
}
/**
......@@ -482,7 +526,7 @@ void CGC_SubOsc_Stop(void)
*/
void CLK_SubOsc_Start(void)
{
CGC->CSC &= ~(1<<6); /* XTSTOP = 0 */
CGC->CSC &= ~(1 << CGC_CSC_XTSTOP_Pos); /* XTSTOP = 0 */
}
/**
......@@ -492,7 +536,7 @@ void CLK_SubOsc_Start(void)
*/
void CGC_Hoco_Stop(void)
{
CGC->CSC |= 1<<0; /* HIOSTOP = 1 */
CGC->CSC |= (1 << CGC_CSC_HIOSTOP_Pos); /* HIOSTOP = 1 */
}
/**
......@@ -502,5 +546,5 @@ void CGC_Hoco_Stop(void)
*/
void CGC_Hoco_Start(void)
{
CGC->CSC &= ~(1<<0); /* HIOSTOP = 0 */
CGC->CSC &= ~(1 << CGC_CSC_HIOSTOP_Pos); /* HIOSTOP = 0 */
}
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