Commit a1e51147 authored by 陈家乐's avatar 陈家乐

🐞 fix:屏蔽看门狗和欠压复位选项字节,由诊断开启

parent f39283e7
...@@ -65,115 +65,115 @@ typedef enum { ...@@ -65,115 +65,115 @@ typedef enum {
following is an example for different system frequencies */ following is an example for different system frequencies */
//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------ //-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
#if HAS_BOOTLOADER //#if HAS_BOOTLOADER
const uint8_t user_opt_data[4] __attribute__((used)) __attribute__((section(".ARM.__AT_0x000080C0"))) = //const uint8_t user_opt_data[4] __attribute__((used)) __attribute__((section(".ARM.__AT_0x000080C0"))) =
#else //#else
const uint8_t user_opt_data[4] __attribute__((used)) __attribute__((section(".ARM.__AT_0x000000C0"))) = //const uint8_t user_opt_data[4] __attribute__((used)) __attribute__((section(".ARM.__AT_0x000000C0"))) =
#endif //#endif
{ //{
//
/** ///**
* @brief WDT Control BYTE // * @brief WDT Control BYTE
* Please refer to the user manual for details. // * Please refer to the user manual for details.
* 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 // * 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0
* --------|---------|---------|-------|-------|-------|-------|---------- // * --------|---------|---------|-------|-------|-------|-------|----------
* WDTINT | WINDOW1 | WINDOW0 | WDTON | WDCS2 | WDCS1 | WDCS0 | WDSTBYON // * WDTINT | WINDOW1 | WINDOW0 | WDTON | WDCS2 | WDCS1 | WDCS0 | WDSTBYON
* --------|---------|---------|-------|-------|-------|-------|---------- // * --------|---------|---------|-------|-------|-------|-------|----------
*/ // */
// <h> WDT Control Option Byte (C0H) //// <h> WDT Control Option Byte (C0H)
// <e.4> Enable WDT (WDTON) //// <e.4> Enable WDT (WDTON)
// <o.5..6> Watchdog timer window open period setting <2=> 75% <3=> 100% //// <o.5..6> Watchdog timer window open period setting <2=> 75% <3=> 100%
// <o.1..3> Watchdog timer overflow time setting <0=> 2^6/fIL <1=> 2^7/fIL //// <o.1..3> Watchdog timer overflow time setting <0=> 2^6/fIL <1=> 2^7/fIL
// <2=> 2^8/fIL <3=> 2^9/fIL //// <2=> 2^8/fIL <3=> 2^9/fIL
// <4=> 2^11/fIL <5=> 2^13/fIL //// <4=> 2^11/fIL <5=> 2^13/fIL
// <6=> 2^14/fIL <7=> 2^16/fIL //// <6=> 2^14/fIL <7=> 2^16/fIL
// <e.0> Operation in Standby mode setting (WDSTBYON) //// <e.0> Operation in Standby mode setting (WDSTBYON)
// <i> WDT Operaton in SLEEP/DEEPSLEEP mode. //// <i> WDT Operaton in SLEEP/DEEPSLEEP mode.
// </e> //// </e>
// <e.7> interrupt enable //// <e.7> interrupt enable
// <i> interval interrupt is generated when 75% + 1/2 fIL of the overflow time is reached. //// <i> interval interrupt is generated when 75% + 1/2 fIL of the overflow time is reached.
// </e> //// </e>
// </e> //// </e>
// </h> //// </h>
0x7C,//0xEF, // 0x7C,//0xEF,
//
/** ///**
* @brief LVD Control BYTE (C1H) // * @brief LVD Control BYTE (C1H)
* Please refer to the user manual for details. // * Please refer to the user manual for details.
* 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 // * 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0
* -------|-------|-------|-------|-------|-------|---------|---------- // * -------|-------|-------|-------|-------|-------|---------|----------
* VPOC2 | VPOC1 | VPOC0 | 1 | LVIS1 | LVIS0 | LVIMDS1 | LVIMDS0 // * VPOC2 | VPOC1 | VPOC0 | 1 | LVIS1 | LVIS0 | LVIMDS1 | LVIMDS0
* -------|-------|-------|-------|-------|-------|---------|---------- // * -------|-------|-------|-------|-------|-------|---------|----------
*/ // */
// <h> LVD Control Option Byte (C1H) //// <h> LVD Control Option Byte (C1H)
// <o.0..7> Voltage detection setting (VLVD) <0xFF=> ( LVD OFF ) //// <o.0..7> Voltage detection setting (VLVD) <0xFF=> ( LVD OFF )
// <0x3D=> VLVD = 1.88V/1.84V ( interrupt mode ) //// <0x3D=> VLVD = 1.88V/1.84V ( interrupt mode )
// <0x39=> VLVD = 1.98V/1.94V ( interrupt mode ) //// <0x39=> VLVD = 1.98V/1.94V ( interrupt mode )
// <0x35=> VLVD = 2.09V/2.04V ( interrupt mode ) //// <0x35=> VLVD = 2.09V/2.04V ( interrupt mode )
// <0x5D=> VLVD = 2.50V/2.45V ( interrupt mode ) //// <0x5D=> VLVD = 2.50V/2.45V ( interrupt mode )
// <0x59=> VLVD = 2.61V/2.55V ( interrupt mode ) //// <0x59=> VLVD = 2.61V/2.55V ( interrupt mode )
// <0x55=> VLVD = 2.71V/2.65V ( interrupt mode ) //// <0x55=> VLVD = 2.71V/2.65V ( interrupt mode )
// <0x7D=> VLVD = 2.81V/2.75V ( interrupt mode ) //// <0x7D=> VLVD = 2.81V/2.75V ( interrupt mode )
// <0x79=> VLVD = 2.92V/2.86V ( interrupt mode ) //// <0x79=> VLVD = 2.92V/2.86V ( interrupt mode )
// <0x75=> VLVD = 3.02V/2.96V ( interrupt mode ) //// <0x75=> VLVD = 3.02V/2.96V ( interrupt mode )
// <0x3F=> VLVD = 1.88V/1.84V ( reset mode ) //// <0x3F=> VLVD = 1.88V/1.84V ( reset mode )
// <0x3B=> VLVD = 1.98V/1.94V ( reset mode ) //// <0x3B=> VLVD = 1.98V/1.94V ( reset mode )
// <0x37=> VLVD = 2.09V/2.04V ( reset mode ) //// <0x37=> VLVD = 2.09V/2.04V ( reset mode )
// <0x5F=> VLVD = 2.50V/2.45V ( reset mode ) //// <0x5F=> VLVD = 2.50V/2.45V ( reset mode )
// <0x5B=> VLVD = 2.61V/2.55V ( reset mode ) //// <0x5B=> VLVD = 2.61V/2.55V ( reset mode )
// <0x57=> VLVD = 2.71V/2.65V ( reset mode ) //// <0x57=> VLVD = 2.71V/2.65V ( reset mode )
// <0x7F=> VLVD = 2.81V/2.75V ( reset mode ) //// <0x7F=> VLVD = 2.81V/2.75V ( reset mode )
// <0x7B=> VLVD = 2.92V/2.86V ( reset mode ) //// <0x7B=> VLVD = 2.92V/2.86V ( reset mode )
// <0x77=> VLVD = 3.02V/2.96V ( reset mode ) //// <0x77=> VLVD = 3.02V/2.96V ( reset mode )
// <0x3A=> VLVDH = 1.98V/1.94V, VLVDL = 1.84V ( interrupt & reset mode ) //// <0x3A=> VLVDH = 1.98V/1.94V, VLVDL = 1.84V ( interrupt & reset mode )
// <0x36=> VLVDH = 2.09V/2.04V, VLVDL = 1.84V ( interrupt & reset mode ) //// <0x36=> VLVDH = 2.09V/2.04V, VLVDL = 1.84V ( interrupt & reset mode )
// <0x32=> VLVDH = 3.13V/3.06V, VLVDL = 1.84V ( interrupt & reset mode ) //// <0x32=> VLVDH = 3.13V/3.06V, VLVDL = 1.84V ( interrupt & reset mode )
// <0x5A=> VLVDH = 2.61V/2.55V, VLVDL = 2.45V ( interrupt & reset mode ) //// <0x5A=> VLVDH = 2.61V/2.55V, VLVDL = 2.45V ( interrupt & reset mode )
// <0x56=> VLVDH = 2.71V/2.65V, VLVDL = 2.45V ( interrupt & reset mode ) //// <0x56=> VLVDH = 2.71V/2.65V, VLVDL = 2.45V ( interrupt & reset mode )
// <0x52=> VLVDH = 3.75V/3.67V, VLVDL = 2.45V ( interrupt & reset mode ) //// <0x52=> VLVDH = 3.75V/3.67V, VLVDL = 2.45V ( interrupt & reset mode )
// <0x7A=> VLVDH = 2.92V/2.86V, VLVDL = 2.75V ( interrupt & reset mode ) //// <0x7A=> VLVDH = 2.92V/2.86V, VLVDL = 2.75V ( interrupt & reset mode )
// <0x76=> VLVDH = 3.02V/2.96V, VLVDL = 2.75V ( interrupt & reset mode ) //// <0x76=> VLVDH = 3.02V/2.96V, VLVDL = 2.75V ( interrupt & reset mode )
// <0x72=> VLVDH = 4.06V/3.98V, VLVDL = 2.75V ( interrupt & reset mode ) //// <0x72=> VLVDH = 4.06V/3.98V, VLVDL = 2.75V ( interrupt & reset mode )
// <i> Please setting the item for interrupt & reset mode //// <i> Please setting the item for interrupt & reset mode
// </h> //// </h>
0x73, // 0x73,
//
/** ///**
* @brief HOCO Control BYTE (FRQSEL) // * @brief HOCO Control BYTE (FRQSEL)
* Please refer to the user manual for details. // * Please refer to the user manual for details.
* 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 // * 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0
* -------|-------|-------|---------|---------|---------|---------|--------- // * -------|-------|-------|---------|---------|---------|---------|---------
* 1 | 1 | 1 | FRQSEL4 | FRQSEL3 | FRQSEL2 | FRQSEL1 | FRQSEL0 // * 1 | 1 | 1 | FRQSEL4 | FRQSEL3 | FRQSEL2 | FRQSEL1 | FRQSEL0
* -------|-------|-------|---------|---------|---------|---------|--------- // * -------|-------|-------|---------|---------|---------|---------|---------
*/ // */
// <h> HOCO Control Option Byte (C2H) //// <h> HOCO Control Option Byte (C2H)
// <o.0..4> High-speed OCO clock setting <0xF8=> fHOCO = 64MHz, fIH = 64MHz //// <o.0..4> High-speed OCO clock setting <0xF8=> fHOCO = 64MHz, fIH = 64MHz
// <0xF0=> fHOCO = 48MHz, fIH = 48MHz //// <0xF0=> fHOCO = 48MHz, fIH = 48MHz
// <0xE8=> fHOCO = 32MHz, fIH = 32MHz //// <0xE8=> fHOCO = 32MHz, fIH = 32MHz
// <0xE0=> fHOCO = 24MHz, fIH = 24MHz //// <0xE0=> fHOCO = 24MHz, fIH = 24MHz
// <0xE9=> fHOCO = 32MHz, fIH = 16MHz //// <0xE9=> fHOCO = 32MHz, fIH = 16MHz
// <0xE1=> fHOCO = 24MHz, fIH = 12MHz //// <0xE1=> fHOCO = 24MHz, fIH = 12MHz
// <0xEA=> fHOCO = 32MHz, fIH = 8MHz //// <0xEA=> fHOCO = 32MHz, fIH = 8MHz
// <0xE2=> fHOCO = 24MHz, fIH = 6MHz //// <0xE2=> fHOCO = 24MHz, fIH = 6MHz
// <0xEB=> fHOCO = 32MHz, fIH = 4MHz //// <0xEB=> fHOCO = 32MHz, fIH = 4MHz
// <0xE3=> fHOCO = 24MHz, fIH = 3MHz //// <0xE3=> fHOCO = 24MHz, fIH = 3MHz
// <0xEC=> fHOCO = 32MHz, fIH = 2MHz //// <0xEC=> fHOCO = 32MHz, fIH = 2MHz
// <0xED=> fHOCO = 32MHz, fIH = 1MHz //// <0xED=> fHOCO = 32MHz, fIH = 1MHz
// </h> //// </h>
0xE8, // 0xE8,
//
/** ///**
* @brief Flash Protect Control BYTE // * @brief Flash Protect Control BYTE
* Please refer to the user manual for details. // * Please refer to the user manual for details.
*/ // */
// <h> OCD Control Option Byte (C3H) //// <h> OCD Control Option Byte (C3H)
// <o.0..7> On-chip debug setting (OCDEN) <0xFF=> Enable <0xC3=> Disable //// <o.0..7> On-chip debug setting (OCDEN) <0xFF=> Enable <0xC3=> Disable
// <i> OCDM(500004H) == 0x3C && OCDEN == 0xC3: Debugger can not erease/write/read Flash. //// <i> OCDM(500004H) == 0x3C && OCDEN == 0xC3: Debugger can not erease/write/read Flash.
// <i> OCDM(500004H) != 0x3C && OCDEN == 0xC3: Debugger can only chip erease Flash but cannot write/read Flash. //// <i> OCDM(500004H) != 0x3C && OCDEN == 0xC3: Debugger can only chip erease Flash but cannot write/read Flash.
// </h> //// </h>
0xFF // 0xFF
//
}; //};
//-------- <<< end of configuration section >>> ------------------ //-------- <<< end of configuration section >>> ------------------
/** @} */ /* End of group Configuration_of_User_Option_Byte */ /** @} */ /* End of group Configuration_of_User_Option_Byte */
......
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