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TianYing_ty100
Commit ba3e1049 authored by 李俭双's avatar 李俭双
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🐞 fix:替换芯片厂家提供的cgc.c文件

parent ff982b08
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Firmware/Source/Device/Cmsemicon/BAT32A239/Library/Driver/src/cgc.c
View file @ ba3e1049
#include "cgc.h" #include "cgc.h"
uint8_t USE_HSE_SYSTYEM_CLOCK = SYSTYEM_CLOCK_CLOSE;
uint8_t USE_HSI_SYSTYEM_CLOCK = SYSTYEM_CLOCK_CLOSE;
uint8_t USE_LSE_SYSTYEM_CLOCK = SYSTYEM_CLOCK_CLOSE;
uint8_t USE_LSI_SYSTYEM_CLOCK = SYSTYEM_CLOCK_CLOSE;
/** /**
* @brief Enables or disables the PER0 peripheral clock. * @brief Enables or disables the PER0 peripheral clock.
* @note After reset, the peripheral clock (used for registers read/write access) * @note After reset, the peripheral clock (used for registers read/write access)
...@@ -127,32 +122,29 @@ void CGC_Osc_Setting(OSC_Pin_Mode_t main,OSC_Speed_Mode_t amph, OSC_Pin_Mode_t s ...@@ -127,32 +122,29 @@ void CGC_Osc_Setting(OSC_Pin_Mode_t main,OSC_Speed_Mode_t amph, OSC_Pin_Mode_t s
uint8_t tmp; uint8_t tmp;
tmp = 0x00; tmp = 0x00;
if(main == OSC_PORT )
if(main == OSC_OSCILLATOR)
{ {
tmp |= (0 << CGC_CMC_EXCLK_Pos) | (0 << CGC_CMC_OSCSEL_Pos); tmp |= (0 << CGC_CMC_EXCLK_Pos) | (1 << CGC_CMC_OSCSEL_Pos) | (((uint8_t)amph) << CGC_CMC_AMPH_Pos);
} }
else if(main == OSC_PORT )
if(sub == OSC_PORT )
{ {
tmp |= (0 << CGC_CMC_EXCLKS_Pos) | (0 << CGC_CMC_OSCSELS_Pos); tmp |= (0 << CGC_CMC_EXCLK_Pos) | (0 << CGC_CMC_OSCSEL_Pos);
} }
else if(main == OSC_EXCLK)
if(main == OSC_OSCILLATOR)
{ {
tmp |= (0 << CGC_CMC_EXCLK_Pos) | (1 << CGC_CMC_OSCSEL_Pos) | (1 << CGC_CMC_AMPH_Pos); tmp |= (1 << CGC_CMC_EXCLK_Pos) | (1 << CGC_CMC_OSCSEL_Pos);
} }
if(sub == OSC_OSCILLATOR) if(sub == OSC_OSCILLATOR)
{ {
tmp |= (0 << CGC_CMC_EXCLKS_Pos) | (1 << CGC_CMC_OSCSELS_Pos) | (1 << CGC_CMC_AMPHS_Pos); tmp |= (0 << CGC_CMC_EXCLKS_Pos) | (1 << CGC_CMC_OSCSELS_Pos) | (((uint8_t)amphs) << CGC_CMC_AMPHS_Pos);
} }
else if(sub == OSC_PORT )
if(main == OSC_EXCLK)
{ {
tmp |= (1 << CGC_CMC_EXCLK_Pos) | (1 << CGC_CMC_OSCSEL_Pos); tmp |= (0 << CGC_CMC_EXCLKS_Pos) | (0 << CGC_CMC_OSCSELS_Pos);
} }
else if(sub == OSC_EXCLK)
if(sub == OSC_EXCLK)
{ {
tmp |= (1 << CGC_CMC_EXCLKS_Pos) | (1 << CGC_CMC_OSCSELS_Pos); tmp |= (1 << CGC_CMC_EXCLKS_Pos) | (1 << CGC_CMC_OSCSELS_Pos);
} }
...@@ -160,7 +152,7 @@ void CGC_Osc_Setting(OSC_Pin_Mode_t main,OSC_Speed_Mode_t amph, OSC_Pin_Mode_t s ...@@ -160,7 +152,7 @@ void CGC_Osc_Setting(OSC_Pin_Mode_t main,OSC_Speed_Mode_t amph, OSC_Pin_Mode_t s
CGC->CMC = tmp; CGC->CMC = tmp;
/* Set fMX */ /* Set fMX */
CGC->CSC &= ~(1<<7) ; //MSTOP = 0 CGC->CSC &= ~(1 << CGC_CSC_MSTOP_Pos) ; //MSTOP = 0
if(main == OSC_OSCILLATOR) if(main == OSC_OSCILLATOR)
{ {
...@@ -175,7 +167,7 @@ void CGC_Osc_Setting(OSC_Pin_Mode_t main,OSC_Speed_Mode_t amph, OSC_Pin_Mode_t s ...@@ -175,7 +167,7 @@ void CGC_Osc_Setting(OSC_Pin_Mode_t main,OSC_Speed_Mode_t amph, OSC_Pin_Mode_t s
} }
/* Set fSUB */ /* Set fSUB */
CGC->CSC &= ~(1<<6) ; //XTSTOP = 0 CGC->CSC &= ~(1 << CGC_CSC_XTSTOP_Pos) ; //XTSTOP = 0
if(sub == OSC_OSCILLATOR) if(sub == OSC_OSCILLATOR)
{ {
...@@ -206,24 +198,24 @@ void CGC_Osc_Setting(OSC_Pin_Mode_t main,OSC_Speed_Mode_t amph, OSC_Pin_Mode_t s ...@@ -206,24 +198,24 @@ void CGC_Osc_Setting(OSC_Pin_Mode_t main,OSC_Speed_Mode_t amph, OSC_Pin_Mode_t s
*/ */
void CGC_LSEConfig(OSC_Pin_Mode_t sub, OSC_Power_Mode_t amphs) void CGC_LSEConfig(OSC_Pin_Mode_t sub, OSC_Power_Mode_t amphs)
{ {
/* Check the parameters */
volatile uint32_t w_count; volatile uint32_t w_count;
uint8_t tmp; uint8_t tmp;
assert_param(IS_CGC_LSE_MODE(sub));
/* Check the parameters */
assert_param(IS_CGC_OSC_PIN_MODE(sub));
assert_param(IS_CGC_LSE_PWR_MODE(amphs)); assert_param(IS_CGC_LSE_PWR_MODE(amphs));
tmp = 0x00; tmp = 0x00;
if(sub == OSC_PORT )
{
tmp |= (0 << CGC_CMC_EXCLKS_Pos) | (0 << CGC_CMC_OSCSELS_Pos);
}
if(sub == OSC_OSCILLATOR) if(sub == OSC_OSCILLATOR)
{ {
tmp |= (0 << CGC_CMC_EXCLKS_Pos) | (1 << CGC_CMC_OSCSELS_Pos) | (amphs << CGC_CMC_AMPHS_Pos); tmp |= (0 << CGC_CMC_EXCLKS_Pos) | (1 << CGC_CMC_OSCSELS_Pos) | (((uint8_t)amphs) << CGC_CMC_AMPHS_Pos);
} }
else if(sub == OSC_PORT)
if(sub == OSC_EXCLK) {
tmp |= (0 << CGC_CMC_EXCLKS_Pos) | (0 << CGC_CMC_OSCSELS_Pos);
}
else if(sub == OSC_EXCLK)
{ {
tmp |= (1 << CGC_CMC_EXCLKS_Pos) | (1 << CGC_CMC_OSCSELS_Pos); tmp |= (1 << CGC_CMC_EXCLKS_Pos) | (1 << CGC_CMC_OSCSELS_Pos);
} }
...@@ -231,7 +223,7 @@ void CGC_LSEConfig(OSC_Pin_Mode_t sub, OSC_Power_Mode_t amphs) ...@@ -231,7 +223,7 @@ void CGC_LSEConfig(OSC_Pin_Mode_t sub, OSC_Power_Mode_t amphs)
CGC->CMC = tmp; CGC->CMC = tmp;
/* Set fSUB */ /* Set fSUB */
CGC->CSC &= ~(1<<6) ; //XTSTOP = 0 CGC->CSC &= ~(1 << CGC_CSC_XTSTOP_Pos) ; //XTSTOP = 0
if(sub == OSC_OSCILLATOR) if(sub == OSC_OSCILLATOR)
{ {
...@@ -261,27 +253,25 @@ void CGC_LSEConfig(OSC_Pin_Mode_t sub, OSC_Power_Mode_t amphs) ...@@ -261,27 +253,25 @@ void CGC_LSEConfig(OSC_Pin_Mode_t sub, OSC_Power_Mode_t amphs)
*/ */
void CGC_HSEConfig(OSC_Pin_Mode_t main, OSC_Speed_Mode_t amph) void CGC_HSEConfig(OSC_Pin_Mode_t main, OSC_Speed_Mode_t amph)
{ {
/* Check the parameters */ uint8_t temp_stab_set;
volatile uint32_t w_count; uint8_t temp_stab_wait;
uint8_t temp_stab_set; uint8_t tmp;
uint8_t temp_stab_wait;
uint8_t tmp;
assert_param(IS_CGC_LSE_MODE(main)); /* Check the parameters */
assert_param(IS_CGC_OSC_PIN_MODE(main));
assert_param(IS_CGC_HSE_OSC_SPEED(amph)); assert_param(IS_CGC_HSE_OSC_SPEED(amph));
tmp = 0x00; tmp = 0x00;
if(main == OSC_PORT )
{
tmp |= (0 << CGC_CMC_EXCLK_Pos) | (0 << CGC_CMC_OSCSEL_Pos);
}
if(main == OSC_OSCILLATOR) if(main == OSC_OSCILLATOR)
{ {
tmp |= (0 << CGC_CMC_EXCLK_Pos) | (1 << CGC_CMC_OSCSEL_Pos) | (amph << CGC_CMC_AMPH_Pos); tmp |= (0 << CGC_CMC_EXCLK_Pos) | (1 << CGC_CMC_OSCSEL_Pos) | (((uint8_t)amph) << CGC_CMC_AMPH_Pos);
} }
else if(main == OSC_PORT )
if(main == OSC_EXCLK) {
tmp |= (0 << CGC_CMC_EXCLK_Pos) | (0 << CGC_CMC_OSCSEL_Pos);
}
else if(main == OSC_EXCLK)
{ {
tmp |= (1 << CGC_CMC_EXCLK_Pos) | (1 << CGC_CMC_OSCSEL_Pos); tmp |= (1 << CGC_CMC_EXCLK_Pos) | (1 << CGC_CMC_OSCSEL_Pos);
} }
...@@ -289,7 +279,7 @@ void CGC_HSEConfig(OSC_Pin_Mode_t main, OSC_Speed_Mode_t amph) ...@@ -289,7 +279,7 @@ void CGC_HSEConfig(OSC_Pin_Mode_t main, OSC_Speed_Mode_t amph)
CGC->CMC = tmp; CGC->CMC = tmp;
/* Set fMX */ /* Set fMX */
CGC->CSC &= ~(1<<7) ; //MSTOP = 0 CGC->CSC &= ~(1 << CGC_CSC_MSTOP_Pos) ; //MSTOP = 0
if(main == OSC_OSCILLATOR) if(main == OSC_OSCILLATOR)
{ {
...@@ -304,7 +294,17 @@ void CGC_HSEConfig(OSC_Pin_Mode_t main, OSC_Speed_Mode_t amph) ...@@ -304,7 +294,17 @@ void CGC_HSEConfig(OSC_Pin_Mode_t main, OSC_Speed_Mode_t amph)
} }
} }
/* Clock switching needs to be executed in SRAM */
#if defined (__CC_ARM)
#pragma arm section code = "sram_code" // Arm Compiler 5
#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION > 6010050)
#pragma clang section text = "sram_code" // Arm Compiler 6
#endif
#if defined(__ICCARM__)
__ramfunc
#endif
/** /**
* @brief Enables External Low Speed oscillator (LSE/Fsub) used as CPU * @brief Enables External Low Speed oscillator (LSE/Fsub) used as CPU
...@@ -314,10 +314,13 @@ void CGC_HSEConfig(OSC_Pin_Mode_t main, OSC_Speed_Mode_t amph) ...@@ -314,10 +314,13 @@ void CGC_HSEConfig(OSC_Pin_Mode_t main, OSC_Speed_Mode_t amph)
*/ */
void CGC_LSE_CFG_AS_FCLK() void CGC_LSE_CFG_AS_FCLK()
{ {
CGC->CKC = (1 << CGC_CKC_CSS_Pos) | (0 << CGC_CKC_MCM0_Pos); CGC->CKC = (1 << CGC_CKC_CSS_Pos) | (0 << CGC_CKC_MCM0_Pos);
__NOP();
__NOP();
__NOP();
__NOP();
while ((CGC->CKC & CGC_CKC_CLS_Msk) == 0); while ((CGC->CKC & CGC_CKC_CLS_Msk) == 0);
USE_LSE_SYSTYEM_CLOCK = SYSTYEM_CLOCK_OPEN;
} }
/** /**
...@@ -328,9 +331,12 @@ void CGC_LSE_CFG_AS_FCLK() ...@@ -328,9 +331,12 @@ void CGC_LSE_CFG_AS_FCLK()
*/ */
void CGC_HSE_CFG_AS_FCLK() void CGC_HSE_CFG_AS_FCLK()
{ {
CGC->CKC = (0 << CGC_CKC_CSS_Pos) | (1 << CGC_CKC_MCM0_Pos ); CGC->CKC = (0 << CGC_CKC_CSS_Pos) | (1 << CGC_CKC_MCM0_Pos );
while((CGC->CKC & CGC_CKC_MCS_Msk) == 0); __NOP();
USE_HSE_SYSTYEM_CLOCK = SYSTYEM_CLOCK_OPEN; __NOP();
__NOP();
__NOP();
while((CGC->CKC & CGC_CKC_MCS_Msk) == 0);
} }
/** /**
...@@ -342,12 +348,48 @@ void CGC_HSE_CFG_AS_FCLK() ...@@ -342,12 +348,48 @@ void CGC_HSE_CFG_AS_FCLK()
*/ */
void CGC_HSI_CFG_AS_FCLK() void CGC_HSI_CFG_AS_FCLK()
{ {
CGC->CKC = 0 << CGC_CKC_CSS_Pos ; if (CGC->MCKC & CGC_MCKC_CKSTR_Msk)
{
CGC->MCKC &= ~(1 << CGC_MCKC_CKSELR_Pos);
__NOP();
__NOP();
__NOP();
__NOP();
while(CGC->MCKC & CGC_MCKC_CKSTR_Msk);
}
CGC->CKC = (0 << CGC_CKC_CSS_Pos) | (0 << CGC_CKC_MCM0_Pos );
__NOP();
__NOP();
__NOP();
__NOP();
while((CGC->CKC & (CGC_CKC_CSS_Msk | CGC_CKC_MCS_Msk)));
}
while((CGC->CKC & CGC_CKC_CSS_Msk) == 1); /**
USE_HSI_SYSTYEM_CLOCK = SYSTYEM_CLOCK_OPEN; * @brief Enables output frequency by PLL used as CPU
* system clock and Clock source of peripheral hardware circuit.
* @note
* @retval None
*/
__attribute__((section("RW_FUNC_PLL"))) void CGC_PLL_CFG_AS_FCLK(void)
{
CGC->MCKC |= (1 << CGC_MCKC_CKSELR_Pos);
__NOP();
__NOP();
__NOP();
__NOP();
while((CGC->MCKC & CGC_MCKC_CKSTR_Msk) == 0);
CGC->CKC = (0 << CGC_CKC_CSS_Pos) | (0 << CGC_CKC_MCM0_Pos );
__NOP();
__NOP();
__NOP();
__NOP();
while(CGC->CKC & CGC_CKC_CSS_Msk);
} }
#if 0
/** /**
* @brief Enables External High Speed oscillator (HSE) used as MAIN system clock * @brief Enables External High Speed oscillator (HSE) used as MAIN system clock
* which can provided for clock output/buzzer or CPU/peripheral hardware circuit. * which can provided for clock output/buzzer or CPU/peripheral hardware circuit.
...@@ -356,7 +398,11 @@ void CGC_HSI_CFG_AS_FCLK() ...@@ -356,7 +398,11 @@ void CGC_HSI_CFG_AS_FCLK()
*/ */
void CGC_HSE_CFG_AS_FMAIN() void CGC_HSE_CFG_AS_FMAIN()
{ {
CGC->CKC = 1 << CGC_CKC_MCM0_Pos; CGC->CKC = (1 << CGC_CKC_MCM0_Pos);
__NOP();
__NOP();
__NOP();
__NOP();
while((CGC->CKC & CGC_CKC_MCS_Msk) == 0); while((CGC->CKC & CGC_CKC_MCS_Msk) == 0);
} }
/** /**
...@@ -367,9 +413,20 @@ void CGC_HSE_CFG_AS_FMAIN() ...@@ -367,9 +413,20 @@ void CGC_HSE_CFG_AS_FMAIN()
*/ */
void CGC_HSI_CFG_AS_FMAIN() void CGC_HSI_CFG_AS_FMAIN()
{ {
CGC->CKC = 0 << CGC_CKC_MCM0_Pos; CGC->CKC = (0 << CGC_CKC_MCM0_Pos);
while((CGC->CKC & CGC_CKC_MCS_Msk) == 1); __NOP();
__NOP();
__NOP();
__NOP();
while(CGC->CKC & CGC_CKC_MCS_Msk);
} }
#endif
#if defined (__CC_ARM)
#pragma arm section code // Arm Compiler 5
#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION > 6010050)
#pragma clang section text = "" // Arm Compiler 6
#endif
/** /**
* @brief Setting PLL used as system clock and Clock source of peripheral hardware circuit. * @brief Setting PLL used as system clock and Clock source of peripheral hardware circuit.
...@@ -424,7 +481,7 @@ void CGC_PLL_Setting(PLL_Src_t src, PLL_Div_t div, PLL_Mul_t mul) ...@@ -424,7 +481,7 @@ void CGC_PLL_Setting(PLL_Src_t src, PLL_Div_t div, PLL_Mul_t mul)
CGC->PLLCR = tmp; CGC->PLLCR = tmp;
CGC->PLLCR |= 1<<0; /* PLLON = 1 */ CGC->PLLCR |= (1 << CGC_PLLCR_PLLON_Pos); /* PLLON = 1 */
for (i = 0U; i <= 2000; i++) for (i = 0U; i <= 2000; i++)
{ {
__NOP(); __NOP();
...@@ -432,19 +489,6 @@ void CGC_PLL_Setting(PLL_Src_t src, PLL_Div_t div, PLL_Mul_t mul) ...@@ -432,19 +489,6 @@ void CGC_PLL_Setting(PLL_Src_t src, PLL_Div_t div, PLL_Mul_t mul)
} }
/**
* @brief Enables output frequency by PLL used as CPU
* system clock and Clock source of peripheral hardware circuit.
* @note
* @retval None
*/
__attribute__((section("RW_FUNC_PLL"))) void CGC_PLL_CFG_AS_FCLK(void)
{
CGC->MCKC = 0x01;
while((CGC->MCKC & CGC_MCKC_CKSTR_Msk) == 0);
USE_HSE_SYSTYEM_CLOCK = SYSTYEM_CLOCK_OPEN;
}
/** /**
* @brief This function stops the main system clock oscilator (MOSC). * @brief This function stops the main system clock oscilator (MOSC).
* @param None * @param None
...@@ -452,7 +496,7 @@ __attribute__((section("RW_FUNC_PLL"))) void CGC_PLL_CFG_AS_FCLK(void) ...@@ -452,7 +496,7 @@ __attribute__((section("RW_FUNC_PLL"))) void CGC_PLL_CFG_AS_FCLK(void)
*/ */
void CGC_MainOsc_Stop(void) void CGC_MainOsc_Stop(void)
{ {
CGC->CSC |= 1<<7; /* MSTOP = 1 */ CGC->CSC |= (1 << CGC_CSC_MSTOP_Pos); /* MSTOP = 1 */
} }
/** /**
...@@ -462,7 +506,7 @@ void CGC_MainOsc_Stop(void) ...@@ -462,7 +506,7 @@ void CGC_MainOsc_Stop(void)
*/ */
void CGC_MainOsc_Start(void) void CGC_MainOsc_Start(void)
{ {
CGC->CSC &= ~(1<<7); /* MSTOP = 0 */ CGC->CSC &= ~(1 << CGC_CSC_MSTOP_Pos); /* MSTOP = 0 */
} }
/** /**
...@@ -472,7 +516,7 @@ void CGC_MainOsc_Start(void) ...@@ -472,7 +516,7 @@ void CGC_MainOsc_Start(void)
*/ */
void CGC_SubOsc_Stop(void) void CGC_SubOsc_Stop(void)
{ {
CGC->CSC |= 1<<6; /* XTSTOP = 1 */ CGC->CSC |= (1 << CGC_CSC_XTSTOP_Pos); /* XTSTOP = 1 */
} }
/** /**
...@@ -482,7 +526,7 @@ void CGC_SubOsc_Stop(void) ...@@ -482,7 +526,7 @@ void CGC_SubOsc_Stop(void)
*/ */
void CLK_SubOsc_Start(void) void CLK_SubOsc_Start(void)
{ {
CGC->CSC &= ~(1<<6); /* XTSTOP = 0 */ CGC->CSC &= ~(1 << CGC_CSC_XTSTOP_Pos); /* XTSTOP = 0 */
} }
/** /**
...@@ -492,7 +536,7 @@ void CLK_SubOsc_Start(void) ...@@ -492,7 +536,7 @@ void CLK_SubOsc_Start(void)
*/ */
void CGC_Hoco_Stop(void) void CGC_Hoco_Stop(void)
{ {
CGC->CSC |= 1<<0; /* HIOSTOP = 1 */ CGC->CSC |= (1 << CGC_CSC_HIOSTOP_Pos); /* HIOSTOP = 1 */
} }
/** /**
...@@ -502,5 +546,5 @@ void CGC_Hoco_Stop(void) ...@@ -502,5 +546,5 @@ void CGC_Hoco_Stop(void)
*/ */
void CGC_Hoco_Start(void) void CGC_Hoco_Start(void)
{ {
CGC->CSC &= ~(1<<0); /* HIOSTOP = 0 */ CGC->CSC &= ~(1 << CGC_CSC_HIOSTOP_Pos); /* HIOSTOP = 0 */
} }
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