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TianYing_ty100
Commit bb405dff authored by 陈家乐's avatar 陈家乐
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🐞 fix:QAC问题：62445、58596、45370

parent 60831117
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Showing with 77 additions and 74 deletions
Firmware/Source/Application/BLUETOOTH/Protocol_Lib.c
View file @ bb405dff
......@@ -70,7 +70,7 @@ void Protocol_Service(void)
readNum = UARTRead_Cbk(mDataBufPtr + mDataBufLen, 256 - mDataBufLen);
if ( readNum > 0 )
{
mDataBufLen += readNum;
mDataBufLen += (Protocol_uint16_t)readNum;
// 解析协议
len = Protocol_Parse(mDataBufPtr, mDataBufLen);
if ( (len > 0) && (len < mDataBufLen) )
......@@ -187,7 +187,7 @@ Protocol_uint32_t Protocol_Parse(const Protocol_uint8_t *pData, Protocol_uint32_
d_printf("\n");
#endif
}
ProcData.DataLen = dataLen - 4;
ProcData.DataLen = (Protocol_uint8_t)(dataLen - 4);
memcpy(ProcData.Data, pData + 5, ProcData.DataLen);
ProtocolSetData_Cbk(&ProcData);
}
......
Firmware/Source/Application/BLUETOOTH/Protocol_User.c
View file @ bb405dff
......@@ -275,7 +275,7 @@ void UART_Put(Protocol_uint16_t Data)
}
else
{
UARTRxBuf.Rx_Buffer [ UARTRxBuf.write_pos ] = Data;
UARTRxBuf.Rx_Buffer [ UARTRxBuf.write_pos ] = (Protocol_uint8_t)Data;
UARTRxBuf.write_pos = (UARTRxBuf.write_pos + 1) % UART_RX_MAX_DEPTH;
}
......
Firmware/Source/Application/SEG_DISPLAY/SEG_DISPLAY.c
View file @ bb405dff
......@@ -4479,7 +4479,7 @@ void SEG_Scan_SET_Fuel_Coolant_Dial(uint8_t coolant)
uint8_t Espeed_check_SEG_step = 0;
void SEG_Scan_SET_EspeedDial(void)
{
uint16_t a = 0;
uint8_t a = 0;
a = (Espeed_check_SEG_step / 10) ;
SEG_SET_EspeedDial(1, a);
......
Firmware/Source/Device/Cmsemicon/BAT32A239/Library/Driver/include/uart.h
View file @ bb405dff
......@@ -122,7 +122,7 @@
#define UART1_PHASE_POS ((uint16_t)((1 << 2) & UART_PHASE_MASK))
#define UART2_PHASE_POS ((uint16_t)((1 << 0) & UART_PHASE_MASK))
#define UART_CTRL_POS ((uint16_t)0x01)
#define UART_CTRL_POS ((uint8_t)0x01)
/** @defgroup UART_Flags
* @{
......
Firmware/Source/Device/Cmsemicon/BAT32A239/Library/Driver/src/can.c
View file @ bb405dff
......@@ -522,7 +522,7 @@ uint8_t CAN_ABTModeTransmitConfig(CAN_Type* CANx, uint16_t DBT)
}
/* Set ABT time delay for each block transmit */
CANx->CGMABTD = DBT;
CANx->CGMABTD = (uint8_t)DBT;
/* Set ABTTRG to start trigger ABT mode */
CANx->CGMABT = CAN_GMABT_START_ABTTRG;
......@@ -913,7 +913,10 @@ void CAN_Receive_IT(CAN_Type* CANx, CANBuffList_t *listbuf)
CANMSG_Type *CANxMSGy;
CanTxRxMsg canMsgRec;
canMsgRec.CacheType = 0;
canMsgRec.Interrupt = 0;
canMsgRec.OverWriteConfig = 0;
canMsgRec.RTR = 0;
/* Check the parameters */
assert_param(IS_CAN_ALL_PERIPH(CANx));
......
Firmware/Source/Device/Cmsemicon/BAT32A239/Library/Driver/src/cgc.c
View file @ bb405dff
......@@ -60,11 +60,11 @@ void CGC_PER1PeriphClockCmd(uint32_t CGC_PER1Periph, FunctionalState NewState)
if (NewState != DISABLE)
{
CGC->PER1 |= CGC_PER1Periph;
CGC->PER1 |= (uint8_t)CGC_PER1Periph;
}
else
{
CGC->PER1 &= ~CGC_PER1Periph;
CGC->PER1 &= (uint8_t)(~CGC_PER1Periph);
}
}
......@@ -95,11 +95,11 @@ void CGC_PER2PeriphClockCmd(uint32_t CGC_PER2Periph, FunctionalState NewState)
if (NewState != DISABLE)
{
CGC->PER2 |= CGC_PER2Periph;
CGC->PER2 |= (uint8_t)CGC_PER2Periph;
}
else
{
CGC->PER2 &= ~CGC_PER2Periph;
CGC->PER2 &= (uint8_t)(~CGC_PER2Periph);
}
}
/**
......
Firmware/Source/Device/Cmsemicon/BAT32A239/Library/Driver/src/dac.c
View file @ bb405dff
......@@ -34,11 +34,11 @@ void DAC_Start(DAC_Channel_t ch)
{
if(ch & 0x01)
{
DAC->DAM |= DAC_DAM_DACE0_Msk; /* enables D/A conversion operation */
DAC->DAM |= (uint8_t)DAC_DAM_DACE0_Msk; /* enables D/A conversion operation */
}
if(ch & 0x02)
{
DAC->DAM |= DAC_DAM_DACE1_Msk; /* enables D/A conversion operation */
DAC->DAM |= (uint8_t)DAC_DAM_DACE1_Msk; /* enables D/A conversion operation */
}
}
/***********************************************************************************************************************
......@@ -51,11 +51,11 @@ void DAC_Stop(DAC_Channel_t ch)
{
if(ch & 0x01)
{
DAC->DAM &= ~DAC_DAM_DACE0_Msk; /* stops D/A conversion operation */
DAC->DAM &= (uint8_t)(~DAC_DAM_DACE0_Msk); /* stops D/A conversion operation */
}
if(ch & 0x02)
{
DAC->DAM &= ~DAC_DAM_DACE1_Msk; /* stops D/A conversion operation */
DAC->DAM &= (uint8_t)(~DAC_DAM_DACE1_Msk); /* stops D/A conversion operation */
}
}
......@@ -85,5 +85,5 @@ void DAC_Set_Value(DAC_Channel_t ch, uint8_t regvalue)
***********************************************************************************************************************/
void DAC_Set_PowerOff(void)
{
CGC->PER1 &= ~CGC_PER1_DACEN_Msk; /* stops input clock supply */
CGC->PER1 &= (uint8_t)(~CGC_PER1_DACEN_Msk); /* stops input clock supply */
}
Firmware/Source/Device/Cmsemicon/BAT32A239/Library/Driver/src/delay.c
View file @ bb405dff
......@@ -53,5 +53,5 @@ void m0_delay_us(uint32_t volatile number_of_us)
***********************************************************************************************************************/
void delay_init(uint32_t sysclk)
{
Value_us = sysclk/1000000;
Value_us = (uint8_t)(sysclk/1000000);
}
Firmware/Source/Device/Cmsemicon/BAT32A239/Library/Driver/src/dma.c
View file @ bb405dff
......@@ -19,13 +19,13 @@ void DMA_Init(DMA_InitTypeDef * DMA_InitStruct)
}
if(DMA_InitStruct->DMA_ChainTrans == 0)
{
DMAVEC->VEC[DMA_InitStruct->DMA_Vector] = DMA_InitStruct->DMA_CtrlId;
DMAVEC->VEC[DMA_InitStruct->DMA_Vector] = (uint8_t)(DMA_InitStruct->DMA_CtrlId);
}
else
{
if(DMA_InitStruct->DMA_ChainTrans == DMA_ChainTrans_Head)
{
DMAVEC->VEC[DMA_InitStruct->DMA_Vector] = DMA_InitStruct->DMA_CtrlId;
DMAVEC->VEC[DMA_InitStruct->DMA_Vector] = (uint8_t)(DMA_InitStruct->DMA_CtrlId);
}
}
DMAVEC->CTRL[DMA_InitStruct->DMA_CtrlId].DMACR = DMA_InitStruct->DMA_DataSize | (DMA_InitStruct->DMA_RepeatInt << 5) \
......
Firmware/Source/Device/Cmsemicon/BAT32A239/Library/Driver/src/elc.c
View file @ bb405dff
......@@ -20,7 +20,7 @@ void ELC_Start(uint32_t event_src, uint32_t event_dst)
sfr_addr = &ELC->ELSELR00;
// ELSELRn(n=00~14) = Link Destination Number
*(sfr_addr + event_src) = event_dst;
*(sfr_addr + event_src) = (uint8_t)(event_dst);
}
/***********************************************************************************************************************
......
Firmware/Source/Device/Cmsemicon/BAT32A239/Library/Driver/src/flash.c
View file @ bb405dff
......@@ -207,7 +207,7 @@ FLASH_STATUS flash_write(uint32_t adr, uint32_t sz, uint8_t *buf)
cross = 0;
}
ptr_base = (uint8_t *)(adr & ~(SECTOR_SIZE-1)); /* get sector base address: Each sector is 512 bytes (i.e. 128 words) */
offset = adr & (SECTOR_SIZE-1); /* get offset */
offset = (uint16_t)(adr & (SECTOR_SIZE-1)); /* get offset */
/* Save the Flash data temporarily */
if(cross)
......
Firmware/Source/Device/Cmsemicon/BAT32A239/Library/Driver/src/i2c.c
View file @ bb405dff
......@@ -664,37 +664,37 @@ uint8_t I2C_Get_TransmitMode(SCIAFSelect_TypeDef I2Cx)
case I2C00:
{
I2C0_TypeDef *I2C_Instance = &SCI0->I2C0;
Mode = I2C_TransmitMode_Mask & ((I2C_Instance->SCR & SCI_RECEPTION_TRANSMISSION) >> 14);
Mode = (uint8_t)(I2C_TransmitMode_Mask & ((I2C_Instance->SCR & SCI_RECEPTION_TRANSMISSION) >> 14));
}
break;
case I2C01:
{
I2C1_TypeDef *I2C_Instance = &SCI0->I2C1;
Mode = I2C_TransmitMode_Mask & ((I2C_Instance->SCR & SCI_RECEPTION_TRANSMISSION) >> 14);
Mode = (uint8_t)(I2C_TransmitMode_Mask & ((I2C_Instance->SCR & SCI_RECEPTION_TRANSMISSION) >> 14));
}
break;
case I2C10:
{
I2C2_TypeDef *I2C_Instance = &SCI0->I2C2;
Mode = I2C_TransmitMode_Mask & ((I2C_Instance->SCR & SCI_RECEPTION_TRANSMISSION) >> 14);
Mode = (uint8_t)(I2C_TransmitMode_Mask & ((I2C_Instance->SCR & SCI_RECEPTION_TRANSMISSION) >> 14));
}
break;
case I2C11:
{
I2C3_TypeDef *I2C_Instance = &SCI0->I2C3;
Mode = I2C_TransmitMode_Mask & ((I2C_Instance->SCR & SCI_RECEPTION_TRANSMISSION) >> 14);
Mode = (uint8_t)(I2C_TransmitMode_Mask & ((I2C_Instance->SCR & SCI_RECEPTION_TRANSMISSION) >> 14));
}
break;
case I2C20:
{
I2C4_TypeDef *I2C_Instance = &SCI1->I2C4;
Mode = I2C_TransmitMode_Mask & ((I2C_Instance->SCR & SCI_RECEPTION_TRANSMISSION) >> 14);
Mode = (uint8_t)(I2C_TransmitMode_Mask & ((I2C_Instance->SCR & SCI_RECEPTION_TRANSMISSION) >> 14));
}
break;
case I2C21:
{
I2C5_TypeDef *I2C_Instance = &SCI1->I2C5;
Mode = I2C_TransmitMode_Mask & ((I2C_Instance->SCR & SCI_RECEPTION_TRANSMISSION) >> 14);
Mode = (uint8_t)(I2C_TransmitMode_Mask & ((I2C_Instance->SCR & SCI_RECEPTION_TRANSMISSION) >> 14));
}
break;
#if defined(BAT32G1XX_80PIN) || defined(BAT32G1XX_100PIN)
......
Firmware/Source/Device/Cmsemicon/BAT32A239/Library/Driver/src/i2ca.c
View file @ bb405dff
......@@ -77,8 +77,8 @@ void I2CA_DeInit(I2CASelect_TypeDef I2CAx)
static void IICA_Init(IICA_TypeDef *IICA_Instance, I2CA_InitTypeDef* I2CA_InitStruct)
{
uint8_t tmpreg = 0;
uint8_t tmp_wl, tmp_wh;
uint32_t fmck;
uint8_t tmp_wl = 0, tmp_wh = 0;
uint32_t fmck = 0;
tmpreg = IICA_Instance->IICCTL1;
/* I2CA register setting for control register n1 */
......@@ -752,13 +752,13 @@ I2CA_Status I2CA_Slave_TransmitData(I2CASelect_TypeDef I2CAx,uint8_t *Reg, uint8
else
{
/* When the address match is success */
if ((Address_Match < 2) && I2CA_GetFlagStaus(I2CAx,I2CA_STATUS_COI)) //接收地址和自身从机地址一致
if ((Address_Match < 2) && I2CA_GetFlagStaus(I2CAx,I2CA_STATUS_COI)) //���յ�ַ�������ӻ���ַһ��
{
Address_Match ++;
if (Address_Match == 1)
{
I2CA_Instance->SVA|= 0x01; //第一次先读
I2CA_Instance->SVA|= 0x01; //��һ���ȶ�
}
else if (Address_Match == 2)
{
......@@ -775,7 +775,7 @@ I2CA_Status I2CA_Slave_TransmitData(I2CASelect_TypeDef I2CAx,uint8_t *Reg, uint8
/* Sending or receiving */
if (I2CA_GetFlagStaus(I2CAx,I2CA_STATUS_TRC)) //send status
{
I2CA_SET_REG(I2CAx,IICCTL00,I2CA_WTIM_BIT);//在输入9个时钟，将时钟置为低电平
I2CA_SET_REG(I2CAx,IICCTL00,I2CA_WTIM_BIT);//������9��ʱ�ӣ���ʱ����Ϊ�͵�ƽ
I2CA_WriteByte(I2CAx,*Data);
Data++;
Send_Length++;
......
Firmware/Source/Device/Cmsemicon/BAT32A239/Library/Driver/src/intp.c
View file @ bb405dff
......@@ -24,19 +24,19 @@ void INTP_Init(INTP_InitTypeDef* Intp_InitStruct)
}
if(Intp_InitStruct->INTP_Select < INTP8)
{
INTM->EGN0 &= ~Intp_InitStruct->INTP_Select;
INTM->EGP0 &= ~Intp_InitStruct->INTP_Select;
INTM->EGN0 &= (uint8_t)(~Intp_InitStruct->INTP_Select);
INTM->EGP0 &= (uint8_t)(~Intp_InitStruct->INTP_Select);
INTM->EGN0 |= ((Intp_InitStruct->EXTI_Trigger & 0x01U) >> 0) << currentpin;
INTM->EGP0 |= ((Intp_InitStruct->EXTI_Trigger & 0x02U) >> 1) << currentpin;
INTM->EGN0 |= (uint8_t)(((Intp_InitStruct->EXTI_Trigger & 0x01U) >> 0) << currentpin);
INTM->EGP0 |= (uint8_t)(((Intp_InitStruct->EXTI_Trigger & 0x02U) >> 1) << currentpin);
}
else
{
INTM->EGN1 &= ~Intp_InitStruct->INTP_Select;
INTM->EGP1 &= ~Intp_InitStruct->INTP_Select;
INTM->EGN1 &= (uint8_t)(~Intp_InitStruct->INTP_Select);
INTM->EGP1 &= (uint8_t)(~Intp_InitStruct->INTP_Select);
INTM->EGN1 |= ((Intp_InitStruct->EXTI_Trigger & 0x01U) >> 0) << (currentpin-8);
INTM->EGP1 |= ((Intp_InitStruct->EXTI_Trigger & 0x02U) >> 1) << (currentpin-8);
INTM->EGN1 |= (uint8_t)(((Intp_InitStruct->EXTI_Trigger & 0x01U) >> 0) << (currentpin-8));
INTM->EGP1 |= (uint8_t)(((Intp_InitStruct->EXTI_Trigger & 0x02U) >> 1) << (currentpin-8));
}
for (w_count = 0U; w_count <= KEY_WAITTIME; w_count++)
......
Firmware/Source/Device/Cmsemicon/BAT32A239/Library/Driver/src/sspi.c
View file @ bb405dff
......@@ -505,37 +505,37 @@ uint8_t SSPI_Get_TransmitMode(SCIAFSelect_TypeDef SSPIx)
case SSPI00:
{
I2C0_TypeDef *SSPI_Instance = &SCI0->I2C0;
Mode = SSPI_TransmitMode_Mask & ((SSPI_Instance->SCR & SCI_RECEPTION_TRANSMISSION) >> 14);
Mode = (uint8_t)(SSPI_TransmitMode_Mask & ((SSPI_Instance->SCR & SCI_RECEPTION_TRANSMISSION) >> 14));
}
break;
case SSPI01:
{
I2C1_TypeDef *SSPI_Instance = &SCI0->I2C1;
Mode = SSPI_TransmitMode_Mask & ((SSPI_Instance->SCR & SCI_RECEPTION_TRANSMISSION) >> 14);
Mode = (uint8_t)(SSPI_TransmitMode_Mask & ((SSPI_Instance->SCR & SCI_RECEPTION_TRANSMISSION) >> 14));
}
break;
case SSPI10:
{
I2C2_TypeDef *SSPI_Instance = &SCI0->I2C2;
Mode = SSPI_TransmitMode_Mask & ((SSPI_Instance->SCR & SCI_RECEPTION_TRANSMISSION) >> 14);
Mode = (uint8_t)(SSPI_TransmitMode_Mask & ((SSPI_Instance->SCR & SCI_RECEPTION_TRANSMISSION) >> 14));
}
break;
case SSPI11:
{
I2C3_TypeDef *SSPI_Instance = &SCI0->I2C3;
Mode = SSPI_TransmitMode_Mask & ((SSPI_Instance->SCR & SCI_RECEPTION_TRANSMISSION) >> 14);
Mode = (uint8_t)(SSPI_TransmitMode_Mask & ((SSPI_Instance->SCR & SCI_RECEPTION_TRANSMISSION) >> 14));
}
break;
case SSPI20:
{
I2C4_TypeDef *SSPI_Instance = &SCI1->I2C4;
Mode = SSPI_TransmitMode_Mask & ((SSPI_Instance->SCR & SCI_RECEPTION_TRANSMISSION) >> 14);
Mode = (uint8_t)(SSPI_TransmitMode_Mask & ((SSPI_Instance->SCR & SCI_RECEPTION_TRANSMISSION) >> 14));
}
break;
case SSPI21:
{
I2C5_TypeDef *SSPI_Instance = &SCI1->I2C5;
Mode = SSPI_TransmitMode_Mask & ((SSPI_Instance->SCR & SCI_RECEPTION_TRANSMISSION) >> 14);
Mode = (uint8_t)(SSPI_TransmitMode_Mask & ((SSPI_Instance->SCR & SCI_RECEPTION_TRANSMISSION) >> 14));
}
break;
#if defined(BAT32G1XX_80PIN) || defined(BAT32G1XX_100PIN)
......@@ -575,37 +575,37 @@ uint8_t SSPI_Get_MasterMode(SCIAFSelect_TypeDef SSPIx)
case SSPI00:
{
I2C0_TypeDef *SSPI_Instance = &SCI0->I2C0;
Mode = ((SSPI_Instance->SMR & (SPI_Mode_Slave<<14)) >> 14);
Mode = (uint8_t)((SSPI_Instance->SMR & (SPI_Mode_Slave<<14)) >> 14);
}
break;
case SSPI01:
{
I2C1_TypeDef *SSPI_Instance = &SCI0->I2C1;
Mode = ((SSPI_Instance->SMR & (SPI_Mode_Slave<<14)) >> 14);
Mode = (uint8_t)((SSPI_Instance->SMR & (SPI_Mode_Slave<<14)) >> 14);
}
break;
case SSPI10:
{
I2C2_TypeDef *SSPI_Instance = &SCI0->I2C2;
Mode = ((SSPI_Instance->SMR & (SPI_Mode_Slave<<14)) >> 14);
Mode = (uint8_t)((SSPI_Instance->SMR & (SPI_Mode_Slave<<14)) >> 14);
}
break;
case SSPI11:
{
I2C3_TypeDef *SSPI_Instance = &SCI0->I2C3;
Mode = ((SSPI_Instance->SMR & (SPI_Mode_Slave<<14)) >> 14);
Mode = (uint8_t)((SSPI_Instance->SMR & (SPI_Mode_Slave<<14)) >> 14);
}
break;
case SSPI20:
{
I2C4_TypeDef *SSPI_Instance = &SCI1->I2C4;
Mode = ((SSPI_Instance->SMR & (SPI_Mode_Slave<<14)) >> 14);
Mode = (uint8_t)((SSPI_Instance->SMR & (SPI_Mode_Slave<<14)) >> 14);
}
break;
case SSPI21:
{
I2C5_TypeDef *SSPI_Instance = &SCI1->I2C5;
Mode = ((SSPI_Instance->SMR & (SPI_Mode_Slave<<14)) >> 14);
Mode = (uint8_t)((SSPI_Instance->SMR & (SPI_Mode_Slave<<14)) >> 14);
}
break;
#if defined(BAT32G1XX_80PIN) || defined(BAT32G1XX_100PIN)
......
Firmware/Source/Device/Cmsemicon/BAT32A239/Library/Driver/src/tim.c
View file @ bb405dff
......@@ -278,7 +278,7 @@ int TIM_Init(TIM_InitTypeDef *TIM_InitStruct)
for(masterPos = 0; masterPos < 8; masterPos++)
{
posm = ((char)0x01) << masterPos;
masterNum = TIM_InitStruct->TIM_Selection_Master & posm;
masterNum = (uint8_t)(TIM_InitStruct->TIM_Selection_Master & posm);
if(masterNum == posm)
{
currentMChan[j]=masterPos;
......
Firmware/Source/Device/Cmsemicon/BAT32A239/Library/Driver/src/timm.c
View file @ bb405dff
......@@ -217,12 +217,12 @@ void TMM_Init(TMM_InitTypeDef *TMM_InitStruct)
if(TMM_InitStruct->TMM_Mode == TMM_Mode_CompPWM)
{
CGC_PER1PeriphClockCmd(CGC_PER1Periph_PWMCUTOFF,ENABLE);
*TMM_reg.TMMR |= _80_TMM_TMGRD1_BUFFER |_40_TMM_TMGRC1_BUFFER|_20_TMM_TMGRD0_BUFFER; //the TMGRD1 used as TMGRB1 buffer registerTMGRC1 used as TMGRA1 buffer register TMGRD0 are used TMGRB0 buffer register
*TMM_reg.TMMR |= _80_TMM_TMGRD1_BUFFER |_40_TMM_TMGRC1_BUFFER|_20_TMM_TMGRD0_BUFFER; //the TMGRD1 used as TMGRB1 buffer register��TMGRC1 used as TMGRA1 buffer register�� TMGRD0 are used TMGRB0 buffer register
*TMM_reg.TMCR[TMM_InitStruct->TMM_Select] = TMM_InitStruct->TMM_CounterClear | TMM_InitStruct->TMM_Clk; //counter cleared condition
*TMM_reg.TMFCR |= (TMM_InitStruct->TMM_BDTR.TMM_NegativeState << 3) | (TMM_InitStruct->TMM_BDTR.TMM_PostiveState << 2)| TMM_InitStruct->TMM_Combine_TransMode;
*TMM_reg.TMDF[TMM_InitStruct->TMM_Select] |= (TMM_InitStruct->TMM_BDTR.TMIOA_BreakPolarity << 6) |(TMM_InitStruct->TMM_BDTR.TMIOB_BreakPolarity << 4) \
| (TMM_InitStruct->TMM_BDTR.TMIOC_BreakPolarity << 2) |(TMM_InitStruct->TMM_BDTR.TMIOD_BreakPolarity << 0);
*TMM_reg.TMDF[TMM_InitStruct->TMM_Select] |= (uint8_t)((TMM_InitStruct->TMM_BDTR.TMIOA_BreakPolarity << 6) |(TMM_InitStruct->TMM_BDTR.TMIOB_BreakPolarity << 4) \
| (TMM_InitStruct->TMM_BDTR.TMIOC_BreakPolarity << 2) |(TMM_InitStruct->TMM_BDTR.TMIOD_BreakPolarity << 0));
TMM->TMELC |= (TMM_InitStruct->TMM_BDTR.TMM_Break <<1) << (TMM_InitStruct->TMM_Select << 4);
......
Firmware/Source/Device/Cmsemicon/BAT32A239/RTE/TrmerM/TrmerM.c
View file @ bb405dff
......@@ -95,7 +95,7 @@ uint8_t TimerM_PWM_counter_Output_Init(TIMERM_PWM_Counter_en_t counter, uint16_t
return 1;
}
TIMM_InitStructure[counter].TMM_CHA_Pulse = cycle_pulse[counter] & 0x0FFFF;//这里需要计算，调试�? period; //周期设置为period
TIMM_InitStructure[counter].TMM_CHA_Pulse = (uint16_t)(cycle_pulse[counter] & 0x0FFFF);//这里需要计算，调试�? period; //周期设置为period
......@@ -201,7 +201,7 @@ uint8_t TimerM_PWM_CH_Output_init(TIMERM_PWM_Counter_en_t counter, TIMERM_PWM_Ch
switch (ch)
{
case TIMERM_CHB:
TIMM_InitStructure[counter].TMM_CHB_Pulse = ((cycle_pulse[counter]) ) & 0x0FFFF; //TM计数达到TMGRB. 占空�?:duty2/period
TIMM_InitStructure[counter].TMM_CHB_Pulse = (uint16_t)(((cycle_pulse[counter]) ) & 0x0FFFF); //TM计数达到TMGRB. 占空�?:duty2/period
TIMM_InitStructure[counter].TMM_PWM.TMM_CHB.TMM_PWMInitLevel = TMM_PWMInitLevel_High;
TIMM_InitStructure[counter].TMM_PWM.TMM_CHB.TMM_PWMActiveLevel = ActiveLevel;
if (counter == TIMERM_COUNTER0)
......@@ -217,7 +217,7 @@ uint8_t TimerM_PWM_CH_Output_init(TIMERM_PWM_Counter_en_t counter, TIMERM_PWM_Ch
break;
case TIMERM_CHC:
TIMM_InitStructure[counter].TMM_CHC_Pulse = ((cycle_pulse[counter]) ) & 0x0FFFF; //TM计数达到TMGRC. 占空�?:duty2/period
TIMM_InitStructure[counter].TMM_CHC_Pulse = (uint16_t)(((cycle_pulse[counter]) ) & 0x0FFFF); //TM计数达到TMGRC. 占空�?:duty2/period
TIMM_InitStructure[counter].TMM_PWM.TMM_CHC.TMM_PWMInitLevel = TMM_PWMInitLevel_High;
TIMM_InitStructure[counter].TMM_PWM.TMM_CHC.TMM_PWMActiveLevel = ActiveLevel;
if (counter == TIMERM_COUNTER0)
......@@ -232,7 +232,7 @@ uint8_t TimerM_PWM_CH_Output_init(TIMERM_PWM_Counter_en_t counter, TIMERM_PWM_Ch
break;
case TIMERM_CHD:
TIMM_InitStructure[counter].TMM_CHD_Pulse = ((cycle_pulse[counter]) ) & 0x0FFFF; //TM计数达到TMGRD. 占空�?:duty3/period
TIMM_InitStructure[counter].TMM_CHD_Pulse = (uint16_t)(((cycle_pulse[counter]) ) & 0x0FFFF); //TM计数达到TMGRD. 占空�?:duty3/period
TIMM_InitStructure[counter].TMM_PWM.TMM_CHD.TMM_PWMInitLevel = TMM_PWMInitLevel_High;//TMM_PWMInitLevel_High;//
TIMM_InitStructure[counter].TMM_PWM.TMM_CHD.TMM_PWMActiveLevel = ActiveLevel;//TMM_PWMActiveLevel_Low;//TMM_PWMActiveLevel_High;//
if (counter == TIMERM_COUNTER0)
......@@ -304,12 +304,12 @@ uint8_t TimerM_PWM_set_duty(TIMERM_PWM_Counter_en_t counter, TIMERM_PWM_Channel_
if (counter == TIMERM_COUNTER0)
{
high_level_Pulse[counter][ch] = (((cycle_pulse[counter] * duty) / 1000) & 0x0FFFF);
TMM0_Set_Counter(1 << (ch + 1), high_level_Pulse[counter][ch]);
TMM0_Set_Counter(1 << (ch + 1), (uint16_t)(high_level_Pulse[counter][ch]));
}
else if (counter == TIMERM_COUNTER1)
{
high_level_Pulse[counter][ch] = (((cycle_pulse[counter] * duty) / 1000) & 0x0FFFF);
TMM1_Set_Counter(1 << (ch + 1), high_level_Pulse[counter][ch]);
TMM1_Set_Counter(1 << (ch + 1), (uint16_t)(high_level_Pulse[counter][ch]));
}
else
{
......@@ -365,12 +365,12 @@ uint8_t TimerM_PWM_set_freq(TIMERM_PWM_Counter_en_t counter, uint16_t freq )
high_level_Pulse[counter][TIMERM_CHC] = (((cycle_pulse[counter] * pwm_duty[counter][TIMERM_CHC]) / 1000) & 0x0FFFF);
high_level_Pulse[counter][TIMERM_CHD] = (((cycle_pulse[counter] * pwm_duty[counter][TIMERM_CHD]) / 1000) & 0x0FFFF);
TIMM_InitStructure[counter].TMM_CHB_Pulse = high_level_Pulse[counter][TIMERM_CHB];
TIMM_InitStructure[counter].TMM_CHC_Pulse = high_level_Pulse[counter][TIMERM_CHC];
TIMM_InitStructure[counter].TMM_CHD_Pulse = high_level_Pulse[counter][TIMERM_CHD];
TIMM_InitStructure[counter].TMM_CHB_Pulse = (uint16_t)(high_level_Pulse[counter][TIMERM_CHB]);
TIMM_InitStructure[counter].TMM_CHC_Pulse = (uint16_t)(high_level_Pulse[counter][TIMERM_CHC]);
TIMM_InitStructure[counter].TMM_CHD_Pulse = (uint16_t)(high_level_Pulse[counter][TIMERM_CHD]);
TIMM_InitStructure[counter].TMM_CHA_Pulse = cycle_pulse[counter] & 0x0FFFF;
TIMM_InitStructure[counter].TMM_CHA_Pulse = (uint16_t)(cycle_pulse[counter] & 0x0FFFF);
TMM_Init(&TIMM_InitStructure[counter]);
......@@ -394,10 +394,10 @@ uint8_t TimerM_PWM_set_freq2(TIMERM_PWM_Counter_en_t counter, uint16_t freq )
high_level_Pulse[counter][TIMERM_CHB] = (((cycle_pulse[counter] * pwm_duty[counter][TIMERM_CHB]) / 1000) & 0x0FFFF);
high_level_Pulse[counter][TIMERM_CHC] = (((cycle_pulse[counter] * pwm_duty[counter][TIMERM_CHC]) / 1000) & 0x0FFFF);
high_level_Pulse[counter][TIMERM_CHD] = (((cycle_pulse[counter] * pwm_duty[counter][TIMERM_CHD]) / 1000) & 0x0FFFF);
TMM0_Set_Counter(1 << 1, high_level_Pulse[counter][TIMERM_CHB]);
TMM0_Set_Counter(1 << 2, high_level_Pulse[counter][TIMERM_CHC]);
TMM0_Set_Counter(1 << 3, high_level_Pulse[counter][TIMERM_CHD]);
TMM0_Set_Counter(1, cycle_pulse[counter]);
TMM0_Set_Counter(1 << 1, (uint16_t)(high_level_Pulse[counter][TIMERM_CHB]));
TMM0_Set_Counter(1 << 2, (uint16_t)(high_level_Pulse[counter][TIMERM_CHC]));
TMM0_Set_Counter(1 << 3, (uint16_t)(high_level_Pulse[counter][TIMERM_CHD]));
TMM0_Set_Counter(1, (uint16_t)(cycle_pulse[counter]));
}
else if (counter == TIMERM_COUNTER1)
{
......@@ -405,10 +405,10 @@ uint8_t TimerM_PWM_set_freq2(TIMERM_PWM_Counter_en_t counter, uint16_t freq )
high_level_Pulse[counter][TIMERM_CHB] = (((cycle_pulse[counter] * pwm_duty[counter][TIMERM_CHB]) / 1000) & 0x0FFFF);
high_level_Pulse[counter][TIMERM_CHC] = (((cycle_pulse[counter] * pwm_duty[counter][TIMERM_CHC]) / 1000) & 0x0FFFF);
high_level_Pulse[counter][TIMERM_CHD] = (((cycle_pulse[counter] * pwm_duty[counter][TIMERM_CHD]) / 1000) & 0x0FFFF);
TMM1_Set_Counter(1 << 1, high_level_Pulse[counter][TIMERM_CHB]);
TMM1_Set_Counter(1 << 2, high_level_Pulse[counter][TIMERM_CHC]);
TMM1_Set_Counter(1 << 3, high_level_Pulse[counter][TIMERM_CHD]);
TMM1_Set_Counter(1, cycle_pulse[counter]);
TMM1_Set_Counter(1 << 1, (uint16_t)(high_level_Pulse[counter][TIMERM_CHB]));
TMM1_Set_Counter(1 << 2, (uint16_t)(high_level_Pulse[counter][TIMERM_CHC]));
TMM1_Set_Counter(1 << 3, (uint16_t)(high_level_Pulse[counter][TIMERM_CHD]));
TMM1_Set_Counter(1, (uint16_t)(cycle_pulse[counter]));
}
else
{
......
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