<?xml version="1.0" encoding="utf-8"?>
<!-- File naming: <vendor>_<part/series name>.svd -->
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Copyright (C) 2012-2014 ARM Limited. All rights reserved.
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<device schemaVersion="1.1" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="CMSIS-SVD.xsd" >
<vendor>CMS</vendor> <!-- device vendor name -->
<vendorID>Generic</vendorID> <!-- device vendor short name -->
<name>BAT32A239</name> <!-- name of part-->
<series>BAT32A239</series> <!-- device series the device belongs to -->
<version>1.0</version> <!-- version of this description, adding CMSIS-SVD 1.1 tags -->
<description>ARM 32-bit Cortex-M0+ Microcontroller based device, CPU clock up to 64MHz, etc. </description>
<licenseText> <!-- this license text will appear in header file. \n force line breaks -->
ARM Limited (ARM) is supplying this software for use with Cortex-M\n
processor based microcontroller, but can be equally used for other\n
suitable processor architectures. This file can be freely distributed.\n
Modifications to this file shall be clearly marked.\n
\n
THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED\n
OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF\n
MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.\n
ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR\n
CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
</licenseText>
<cpu> <!-- details about the cpu embedded in the device -->
<name>CM0+</name>
<revision>r0p1</revision>
<endian>little</endian>
<mpuPresent>true</mpuPresent>
<fpuPresent>false</fpuPresent>
<nvicPrioBits>2</nvicPrioBits>
<vendorSystickConfig>false</vendorSystickConfig>
<vtorPresent>true</vtorPresent>
</cpu>
<addressUnitBits>8</addressUnitBits> <!-- byte addressable memory -->
<width>32</width> <!-- bus width is 32 bits -->
<!-- default settings implicitly inherited by subsequent sections -->
<size>32</size> <!-- this is the default size (number of bits) of all peripherals
and register that do not define "size" themselves -->
<access>read-write</access> <!-- default access permission for all subsequent registers -->
<resetValue>0x00000000</resetValue> <!-- by default all bits of the registers are initialized to 0 on reset -->
<resetMask>0xFFFFFFFF</resetMask> <!-- by default all 32Bits of the registers are used -->
<peripherals>
<!-- MTB -->
<!-- <peripheral>
<name>MTB</name>
<version>1.0</version>
<description>Micro Trace Buffer</description>
<groupName>MTB</groupName>
<baseAddress>0x40019000</baseAddress>
<size>32</size>
<access>read-write</access>
<addressBlock>
<offset>0</offset>
<size>0x1000</size>
<usage>registers</usage>
</addressBlock>
<registers>
<register>
<name>POSITION</name>
<description>MTB Position Register</description>
<addressOffset>0x000</addressOffset>
<resetMask>0xFFFFFFFC</resetMask>
<fields>
<field>
<name>POINTER</name>
<description></description>
<bitRange>[31:3]</bitRange>
</field>
<field>
<name>WRAP</name>
<description></description>
<bitRange>[2:2]</bitRange>
</field>
</fields>
</register>
<register>
<name>MASTER</name>
<description>MTB Master Register</description>
<addressOffset>0x004</addressOffset>
<resetMask>0x800003FF</resetMask>
<fields>
<field>
<name>EN</name>
<description></description>
<bitRange>[31:31]</bitRange>
</field>
<field>
<name>HALTREQ</name>
<description></description>
<bitRange>[9:9]</bitRange>
</field>
<field>
<name>RAMPRIV</name>
<description></description>
<bitRange>[8:8]</bitRange>
</field>
<field>
<name>SFRWPRIV</name>
<description></description>
<bitRange>[7:7]</bitRange>
</field>
<field>
<name>TSTOPEN</name>
<description></description>
<bitRange>[6:6]</bitRange>
</field>
<field>
<name>TSTARTEN</name>
<description></description>
<bitRange>[5:5]</bitRange>
</field>
<field>
<name>MASK</name>
<description></description>
<bitRange>[4:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>FLOW</name>
<description>MTB Flow Register</description>
<addressOffset>0x0008</addressOffset>
<resetMask>0xFFFFFFFB</resetMask>
<fields>
<field>
<name>WATERMARK</name>
<description></description>
<bitRange>[31:3]</bitRange>
</field>
<field>
<name>AUTOHALT</name>
<description></description>
<bitRange>[1:1]</bitRange>
</field>
<field>
<name>AUTOSTOP</name>
<description></description>
<bitRange>[0:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>BASE</name>
<description>MTB Base Register</description>
<addressOffset>0x000C</addressOffset>
<access>read-only</access>
<resetValue>0x20000000</resetValue>
<resetMask>0xFFFFFFFF</resetMask>
</register>
<register>
<name>LOCKACCESS</name>
<description>MTB Lock Access Register</description>
<addressOffset>0xFB0</addressOffset>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<resetMask>0xFFFFFFFF</resetMask>
</register>
<register>
<name>LOCKSTATUS</name>
<description>MTB Lock Status Register</description>
<addressOffset>0xFB4</addressOffset>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<resetMask>0xFFFFFFFF</resetMask>
</register>
<register>
<name>AUTHSTATUS</name>
<description>MTB Authentication Status Register</description>
<addressOffset>0xFB8</addressOffset>
<access>read-only</access>
<resetValue>0x0000000F</resetValue>
<resetMask>0xFFFFFFFF</resetMask>
</register>
<register>
<name>DEVARCH</name>
<description>MTB Device Architecture Register</description>
<addressOffset>0xFBC</addressOffset>
<access>read-only</access>
<resetValue>0x47700A31</resetValue>
<resetMask>0xFFFFFFFF</resetMask>
</register>
<register>
<name>DEVID</name>
<description>MTB Device Configuration Register</description>
<addressOffset>0xFC8</addressOffset>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<resetMask>0xFFFFFFFF</resetMask>
</register>
<register>
<name>DEVTYPE</name>
<description>MTB Device Type Register</description>
<addressOffset>0xFCC</addressOffset>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<resetMask>0xFFFFFFFF</resetMask>
</register>
<register>
<dim>4</dim>
<dimIncrement>4</dimIncrement>
<dimIndex>4-7</dimIndex>
<name>PID%s</name>
<description>CoreSight Register</description>
<addressOffset>0xFD0</addressOffset>
<access>read-only</access>
<resetMask>0xFFFFFFFF</resetMask>
</register>
<register>
<dim>4</dim>
<dimIncrement>4</dimIncrement>
<dimIndex>0-3</dimIndex>
<name>PID%s</name>
<description>CoreSight Register</description>
<addressOffset>0xFE0</addressOffset>
<access>read-only</access>
<resetMask>0xFFFFFFFF</resetMask>
</register>
<register>
<dim>4</dim>
<dimIncrement>4</dimIncrement>
<dimIndex>0-3</dimIndex>
<name>CID%s</name>
<description>CoreSight Register</description>
<addressOffset>0xFF0</addressOffset>
<access>read-only</access>
<resetMask>0xFFFFFFFF</resetMask>
</register>
</registers>
</peripheral> -->
<!-- CGC -->
<peripheral>
<name>CGC</name>
<version>1.0</version>
<description>Clock Generate Control</description>
<groupName>CLK</groupName>
<baseAddress>0x40020400</baseAddress>
<size>8</size>
<access>read-write</access>
<addressBlock>
<offset>0</offset>
<size>0x3000</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>LVI</name>
<description>Low Voltage detection interrupt</description>
<value>0</value>
</interrupt>
<registers>
<!-- CMC: Clock operation Mode Control Register -->
<register>
<name>CMC</name>
<description>Clock operaton Mode Control Register</description>
<addressOffset>0x00</addressOffset>
<size>8</size>
<access>read-write</access>
<resetValue>0x00</resetValue>
<resetMask>0xF7</resetMask>
<fields>
<!-- AMPH: Control of X1 clock oscillation frequency -->
<field>
<name>AMPH</name>
<description>Control of X1 clock oscillation frequency</description>
<bitRange>[0:0]</bitRange>
<access>read-write</access>
</field>
<!-- AMPHS: Control of XT1 clock oscillation frequency -->
<field>
<name>AMPHS</name>
<description>Control of XT1 clock oscillation frequency</description>
<bitRange>[2:1]</bitRange>
<access>read-write</access>
</field>
<!-- OSCSELS: Sub OSC Select -->
<field>
<name>OSCSELS</name>
<description>Sub OSC Select</description>
<bitRange>[4:4]</bitRange>
<access>read-write</access>
</field>
<!-- EXCLKS: External Clock input mode -->
<field>
<name>EXCLKS</name>
<description>External Clock input mode</description>
<bitRange>[5:5]</bitRange>
<access>read-write</access>
</field>
<!-- OSCSEL: Main OSC Select -->
<field>
<name>OSCSEL</name>
<description>Main OSC Select</description>
<bitRange>[6:6]</bitRange>
<access>read-write</access>
</field>
<!-- EXCLK: External Clock input mode -->
<field>
<name>EXCLK</name>
<description>External Clock input mode</description>
<bitRange>[7:7]</bitRange>
<access>read-write</access>
</field>
</fields>
</register>
<!-- CSC: Clock operation Status Register -->
<register>
<name>CSC</name>
<description>Clock operation Status Register</description>
<addressOffset>0x01</addressOffset>
<size>8</size>
<access>read-write</access>
<resetValue>0xC0</resetValue>
<resetMask>0xC1</resetMask>
<fields>
<!-- HIOSTOP: High-speed on-chip oscillator clock operation control -->
<field>
<name>HIOSTOP</name>
<description>High-speed on-chip oscillator clock operation control</description>
<bitRange>[0:0]</bitRange>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>START</name>
<description>High-speed on-chip oscillator operating</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>STOP</name>
<description>High-speed on-chip oscillator stopped</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<!-- XTSTOP: Subsystem clock operation control -->
<field>
<name>XTSTOP</name>
<description>Subsystem clock operation control</description>
<bitRange>[6:6]</bitRange>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>START</name>
<description>XT1 oscillator operating or External clock from EXCLKS pin is valid</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>STOP</name>
<description>XT1 oscillator stop or External clock from EXCLKS pin is invalid</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<!-- MSTOP: High-speed system clock operation control -->
<field>
<name>MSTOP</name>
<description>High-speed system clock operation control</description>
<bitRange>[7:7]</bitRange>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>START</name>
<description>X1 oscillator operating or External clock from EXCLK pin is valid</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>STOP</name>
<description>X1 oscillator stop or External clock from EXCLK pin is invalid</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<!-- OSTC: Oscillation stabilization time counter status register -->
<register>
<name>OSTC</name>
<description>Oscillation stabilization time counter status</description>
<addressOffset>0x02</addressOffset>
<size>8</size>
<access>read-only</access>
<resetValue>0x00</resetValue>
<resetMask>0xFF</resetMask>
</register>
<!-- OSTS: Oscillation stabilization time select register -->
<register>
<name>OSTS</name>
<description>Oscillation stabilization time select register</description>
<addressOffset>0x03</addressOffset>
<size>8</size>
<access>read-write</access>
<resetValue>0x07</resetValue>
<resetMask>0x07</resetMask>
</register>
<!-- CKC: System clock control register -->
<register>
<name>CKC</name>
<description>System clock control register</description>
<addressOffset>0x04</addressOffset>
<size>8</size>
<access>read-write</access>
<resetValue>0x00</resetValue>
<resetMask>0xF0</resetMask>
<fields>
<!-- MCM0: Main system clock (fMAIN) operation control -->
<field>
<name>MCM0</name>
<description>Main system clock (fMAIN) operation control</description>
<bitRange>[4:4]</bitRange>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>fIH</name>
<description>Select the high-speed on-chip oscillator clock (fIH) as the main system clock (fMAIN)</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>fMX</name>
<description>Select the high-speed system clock (fMX) as the main system clock (fMAIN)</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<!-- MCS: Status of Main system clock (fMAIN) -->
<field>
<name>MCS</name>
<description>Status of Main system clock (fMAIN)</description>
<bitRange>[5:5]</bitRange>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>fIH</name>
<description>High-speed on-chip oscillator clock (fIH)</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>fMX</name>
<description>High-speed system clock (fMX)</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<!-- CSS: Selection of CPU/peripheral hardware clock (fCLK) -->
<field>
<name>CSS</name>
<description>Selection of CPU/peripheral hardware clock (fCLK)</description>
<bitRange>[6:6]</bitRange>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>fMAIN</name>
<description>Main system clock (fMAIN)</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>fSUB</name>
<description>Subsystem clock (fSUB)</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<!-- CLS: Status of CPU/peripheral hardware clock (fCLK) -->
<field>
<name>CLS</name>
<description>Status of CPU/peripheral hardware clock (fCLK)</description>
<bitRange>[7:7]</bitRange>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>fMAIN</name>
<description>Main system clock (fMAIN)</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>fSUB</name>
<description>Subsystem clock (fSUB)</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<!-- LOCKCTL: Lockup Watchdog timer enable register -->
<register>
<name>LOCKCTL</name>
<description>Lockup Watchdog timer enable register</description>
<size>8</size>
<addressOffset>0x05</addressOffset>
<resetMask>0x01</resetMask>
</register>
<!-- PRCR: Lockup Watchdog timer enable protect register -->
<register>
<name>PRCR</name>
<description>Lockup Watchdog timer enable protect register</description>
<size>8</size>
<addressOffset>0x06</addressOffset>
<resetMask>0xFF</resetMask>
</register>
<!-- SUBCKSEL: Subsystem Clock select register -->
<register>
<name>SUBCKSEL</name>
<description> Subsystem Clock select register</description>
<addressOffset>0x007</addressOffset>
<size>8</size>
<access>read-write</access>
<resetValue>0x00</resetValue>
<resetMask>0x03</resetMask>
<fields>
<!-- SELLOSC: Select LOSC or SUBOSC -->
<field>
<name>SELLOSC</name>
<description>Select LOSC or SUBOSC</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>SUBOSC</name>
<description>Select SUBOSC as the SubSystem clock</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>LOSC</name>
<description>Select LOSC as the SubSystem clock</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<!-- LOCOSEL: SUBOSC speed select -->
<field>
<name>LOCOSEL</name>
<description>SUBOSC speed select</description>
<bitRange>[1:1]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>SUB_15K</name>
<description>Select 15k for SUBOSC clock</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>SUB_30K</name>
<description>Select 30k for SUBOSC clock</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<!-- WDTCFG0: WDT configeration 0 register -->
<register>
<name>WDTCFG0</name>
<description>WDT Configeration 0 register</description>
<size>8</size>
<addressOffset>0x08</addressOffset>
<resetMask>0xFF</resetMask>
</register>
<!-- WDTCFG1: WDT configeration 1 register -->
<register>
<name>WDTCFG1</name>
<description>WDT Configeration 1 register</description>
<size>8</size>
<addressOffset>0x09</addressOffset>
<resetMask>0xFF</resetMask>
</register>
<!-- WDTCFG2: WDT configeration 2 register -->
<register>
<name>WDTCFG2</name>
<description>WDT Configeration 2 register</description>
<size>8</size>
<addressOffset>0x0A</addressOffset>
<resetMask>0xFF</resetMask>
</register>
<!-- WDTCFG3: WDT configeration 3 register -->
<register>
<name>WDTCFG3</name>
<description>WDT Configeration 3 register</description>
<size>8</size>
<addressOffset>0x0B</addressOffset>
<resetMask>0xFF</resetMask>
</register>
<!-- PER0: Peripheral enable register 0 -->
<register>
<name>PER0</name>
<description> Peripheral enable register 0</description>
<addressOffset>0x20</addressOffset>
<size>8</size>
<access>read-write</access>
<resetValue>0x00</resetValue>
<resetMask>0xFF</resetMask>
<fields>
<!-- TM40EN: Control of the TM4 input clock -->
<field>
<name>TM40EN</name>
<description>Control of the TM4 input clock</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Disabled</name>
<description>Disables input clock supply</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enable</name>
<description>Enables input clock supply</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<!-- CAN0EN: Control of the CAN0 input clock -->
<field>
<name>CAN0EN</name>
<description>Control of the CAN0 input clock</description>
<bitRange>[1:1]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Disabled</name>
<description>Disables input clock supply</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enable</name>
<description>Enables input clock supply</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<!-- SCI0EN: Control of the SCI0 input clock -->
<field>
<name>SCI0EN</name>
<description>Control of the SCI0 input clock</description>
<bitRange>[2:2]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Disabled</name>
<description>Disables input clock supply</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enable</name>
<description>Enables input clock supply</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<!-- SCI1EN: Control of the SCI1 input clock -->
<field>
<name>SCI1EN</name>
<description>Control of the SCI1 input clock</description>
<bitRange>[3:3]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Disabled</name>
<description>Disables input clock supply</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enable</name>
<description>Enables input clock supply</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<!-- IICA0EN: Control of the IICA0 input clock -->
<field>
<name>IICA0EN</name>
<description>Control of the IICA0 input clock</description>
<bitRange>[4:4]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Disabled</name>
<description>Disables input clock supply</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enable</name>
<description>Enables input clock supply</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<!-- ADCEN: Control of the ADC input clock -->
<field>
<name>ADCEN</name>
<description>Control of the ADC input clock</description>
<bitRange>[5:5]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Disabled</name>
<description>Disables input clock supply</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enable</name>
<description>Enables input clock supply</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<!-- IRDAEN: Control of the IRDA input clock -->
<field>
<name>IRDAEN</name>
<description>Control of the IRDA input clock</description>
<bitRange>[6:6]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Disabled</name>
<description>Disables input clock supply</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enable</name>
<description>Enables input clock supply</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<!-- RTCEN: Control of the RTC input clock -->
<field>
<name>RTCEN</name>
<description>Control of the RTC input clock</description>
<bitRange>[7:7]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Disabled</name>
<description>Disables input clock supply</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enable</name>
<description>Enables input clock supply</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<!-- PER1: Peripheral enable register 1 -->
<register>
<name>PER1</name>
<description> Peripheral enable register 1</description>
<addressOffset>0x41A</addressOffset>
<size>8</size>
<access>read-write</access>
<resetValue>0x00</resetValue>
<resetMask>0xFF</resetMask>
<fields>
<!-- TMAEN: Control of the TMA input clock -->
<field>
<name>TMAEN</name>
<description>Control of the TMA input clock</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Disabled</name>
<description>Disables input clock supply</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enable</name>
<description>Enables input clock supply</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<!-- TMCEN: Control of the TMC input clock -->
<field>
<name>TMCEN</name>
<description>Control of the TMC input clock</description>
<bitRange>[1:1]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Disabled</name>
<description>Disables input clock supply</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enable</name>
<description>Enables input clock supply</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<!-- PWMOPEN: Control of the PWMOP input clock -->
<field>
<name>PWMOPEN</name>
<description>Control of the PWMOP input clock</description>
<bitRange>[2:2]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Disabled</name>
<description>Disables input clock supply</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enable</name>
<description>Enables input clock supply</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<!-- DMAEN: Control of the DMA input clock -->
<field>
<name>DMAEN</name>
<description>Control of the DMA input clock</description>
<bitRange>[3:3]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Disabled</name>
<description>Disables input clock supply</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enable</name>
<description>Enables input clock supply</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<!-- TMMEN: Control of the TMM input clock -->
<field>
<name>TMMEN</name>
<description>Control of the TMM input clock</description>
<bitRange>[4:4]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Disabled</name>
<description>Disables input clock supply</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enable</name>
<description>Enables input clock supply</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<!-- PGACMPEN: Control of the CMP input clock -->
<field>
<name>PGACMPEN</name>
<description>Control of the PGACMP input clock</description>
<bitRange>[5:5]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Disabled</name>
<description>Disables input clock supply</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enable</name>
<description>Enables input clock supply</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<!-- TMBEN: Control of the TMB input clock -->
<field>
<name>TMBEN</name>
<description>Control of the TMB input clock</description>
<bitRange>[6:6]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Disabled</name>
<description>Disables input clock supply</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enable</name>
<description>Enables input clock supply</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<!-- DACEN: Control of the DAC input clock -->
<field>
<name>DACEN</name>
<description>Control of the DAC input clock</description>
<bitRange>[7:7]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Disabled</name>
<description>Disables input clock supply</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enable</name>
<description>Enables input clock supply</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<!-- PER2: Peripheral enable register 2 -->
<register>
<name>PER2</name>
<description> Peripheral enable register 2</description>
<addressOffset>0x41B</addressOffset>
<size>8</size>
<access>read-write</access>
<resetValue>0x00</resetValue>
<resetMask>0xFF</resetMask>
<fields>
<!-- TM81EN: Control of the TM8 input clock -->
<field>
<name>TM81EN</name>
<description>Control of the TM8 input clock</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Disabled</name>
<description>Disables input clock supply</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enable</name>
<description>Enables input clock supply</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<!-- CAN1EN: Control of the CAN1 input clock -->
<field>
<name>CAN1EN</name>
<description>Control of the CAN1 input clock</description>
<bitRange>[1:1]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Disabled</name>
<description>Disables input clock supply</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enable</name>
<description>Enables input clock supply</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<!-- IICA1EN: Control of the IICA1 input clock -->
<field>
<name>IICA1EN</name>
<description>Control of the IICA1 input clock</description>
<bitRange>[2:2]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Disabled</name>
<description>Disables input clock supply</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enable</name>
<description>Enables input clock supply</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<!-- SCI1EN: Control of the SCI2 input clock -->
<field>
<name>SCI2EN</name>
<description>Control of the SCI2 input clock</description>
<bitRange>[3:3]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Disabled</name>
<description>Disables input clock supply</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enable</name>
<description>Enables input clock supply</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<!-- OSDCEN: Control of the oscillator stop detection input clock -->
<field>
<name>OSDCEN</name>
<description>Control of the oscillator stop detection input clock</description>
<bitRange>[4:4]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Disabled</name>
<description>Disables input clock supply</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enable</name>
<description>Enables input clock supply</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<!-- OSMC: Subsystem clock supply mode control register -->
<register>
<name>OSMC</name>
<description>Subsystem clock supply mode control register</description>
<addressOffset>0x23</addressOffset>
<size>8</size>
<access>read-write</access>
<resetValue>0x00</resetValue>
<resetMask>0x88</resetMask>
<fields>
<!-- WUTMMCK0: Selection of operation clock for real-time clock, 15-bit interval timer, and timer A -->
<field>
<name>WUTMMCK0</name>
<description>Selection of operation clock for real-time clock, 15-bit interval timer, and timer A</description>
<bitRange>[4:4]</bitRange>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>fSUB</name>
<description>
The subsystem clock is selected as the operation clock for the real-time clock and the 15-bit interval timer.
The low-speed on-chip oscillator cannot be selected as the count source for timer A.
</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>fIL</name>
<description>
The low-speed on-chip oscillator clock is selected as the operation clock for the real-time clock and the 15-bit interval timer.
Either the low-speed on-chip oscillator or the subsystem clock can be selected as the count source for timer A.
</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<!-- RTCLPC: Setting in DEEPSLEEP mode or SLEEP mode while subsystem clock is selected as CPU clock -->
<field>
<name>RTCLPC</name>
<description>Setting in DEEPSLEEP mode or SLEEP mode while subsystem clock is selected as CPU clock</description>
<bitRange>[7:7]</bitRange>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>Enable</name>
<description>Enables supply of subsystem clock to peripheral function</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Disable</name>
<description>Stops supply of subsystem clock to peripheral functions other than real-time clock and 15-bit interval timer.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<!-- MCKC: Main system clock control register -->
<register>
<name>MCKC</name>
<description>Main system clock control register</description>
<addressOffset>0x800</addressOffset>
<size>8</size>
<access>read-write</access>
<resetValue>0x00</resetValue>
<resetMask>0x17</resetMask>
<fields>
<!-- CKSELR: Main system clock select register -->
<field>
<name>CKSELR</name>
<description>Select f(IH) or f(PLL)</description>
<bitRange>[0:0]</bitRange>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>fIH</name>
<description>Select the high-speed on-chip oscillator clock (fIH) as the main system clock (fMAIN)</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL</name>
<description>Select the PLL clock (fPLL) as the main system clock (fMAIN)</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<!-- PDIV: PLL frequency select register -->
<field>
<name>PDIV</name>
<description>PLL frequency select register</description>
<bitRange>[2:1]</bitRange>
<access>read-write</access>
</field>
<!-- CKSTR: Status of CPU/peripheral hardware clock (fCLK) -->
<field>
<name>CKSTR</name>
<description>Status of Main system clock (fMAIN)</description>
<bitRange>[7:7]</bitRange>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>fIH</name>
<description>High-speed on-chip oscillator clock (fIH)</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>fPLL</name>
<description>PLL clock (fPLL)</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<!-- PLLCR: System PLL clock control register -->
<register>
<name>PLLCR</name>
<description>System PLL clock control register</description>
<addressOffset>0x802</addressOffset>
<size>8</size>
<access>read-write</access>
<resetValue>0x00</resetValue>
<resetMask>0x8F</resetMask>
<fields>
<!-- PLLON: PLL operation control -->
<field>
<name>PLLON</name>
<description>PLL operation control</description>
<bitRange>[0:0]</bitRange>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>PLL STOP</name>
<description>PLL is stopped</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL ON</name>
<description>PLL is operating</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<!-- PLLM: PLL frequency multiplication factor select -->
<field>
<name>PLLM</name>
<description>PLL frequency multiplication factor select</description>
<bitRange>[1:1]</bitRange>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>X12</name>
<description>PLL multiplication factor is 12</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>X16</name>
<description>PLL multiplication factor is 16</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<!-- PLLD: PLL frequency division ratio select -->
<field>
<name>PLLD</name>
<description>PLL frequency division ratio select</description>
<bitRange>[3:2]</bitRange>
<access>read-write</access>
</field>
<!-- PLLSRSEL: PLL input clock source select -->
<field>
<name>PLLSRSEL</name>
<description>PLL input clock source select</description>
<bitRange>[7:7]</bitRange>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>fIH</name>
<description>Select the high-speed on-chip oscillator clock (fIH) as PLL input source</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>fMX</name>
<description>Select external main system clock f(MX) as PLL input source</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<!-- HIOTRM: High-speed on-chip oscillator trimming register -->
<register>
<name>HIOTRM</name>
<description>High-speed on-chip oscillator trimming register</description>
<addressOffset>0x1800</addressOffset>
<size>8</size>
<access>read-write</access>
<resetValue>0x00</resetValue>
<resetMask>0x3F</resetMask>
</register>
<!-- HOCODIV: High-speed on-chip oscillator frequency select register -->
<register>
<name>HOCODIV</name>
<description>High-speed on-chip oscillator frequency select register</description>
<addressOffset>0x1820</addressOffset>
<size>8</size>
<access>read-write</access>
<resetValue>0x00</resetValue>
<resetMask>0x07</resetMask>
</register>
<!-- SCMCTL: Oscillator stop detection control register -->
<register>
<name>SCMCTL</name>
<description>Oscillator stop detection control register</description>
<addressOffset>0x1E00</addressOffset>
<size>16</size>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<resetMask>0x8FFF</resetMask>
<fields>
<!-- OSDCCMP: Oscillator stop detected time register -->
<field>
<name>OSDCCMP</name>
<description>Oscillator stop detected time register</description>
<bitRange>[11:0]</bitRange>
<access>read-write</access>
</field>
<!-- OSCDEN: Oscillator stop detection control register -->
<field>
<name>OSCDEN</name>
<description>Oscillator stop detection control register</description>
<bitRange>[15:15]</bitRange>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>START</name>
<description>Oscillator stop detection start</description>
<value>1</value>
</enumeratedValue>
<enumeratedValue>
<name>STOP</name>
<description>Oscillator stop detection stop</description>
<value>0</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<!-- SCMMD: Oscillator stop detection mode register -->
<register>
<name>SCMMD</name>
<description>Oscillator stop detection mode register</description>
<addressOffset>0x1E02</addressOffset>
<size>16</size>
<access>read-write</access>
<resetValue>0x00</resetValue>
<resetMask>0x03</resetMask>
<fields>
<!-- CKSEL: Oscillator stop detected object selection register -->
<field>
<name>CKSEL</name>
<description>Oscillator stop detected object selection register</description>
<bitRange>[0:0]</bitRange>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>fMX</name>
<description>fMX Oscillator stop detection</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>fSX</name>
<description>fSX Oscillator stop detection</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<!-- MDSEL: Oscillator stop detected operation selection register -->
<field>
<name>MDSEL</name>
<description>Oscillator stop detected operation selection register</description>
<bitRange>[1:1]</bitRange>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>INT</name>
<description>Interrupt when oscillator stop detection</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>RESET</name>
<description>Reset when oscillator stop detection</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<!-- SCMST: Oscillator stop detected status register -->
<register>
<name>SCMST</name>
<description>Oscillator stop detected status register</description>
<addressOffset>0x1E04</addressOffset>
<size>8</size>
<access>read-write</access>
<resetValue>0x00</resetValue>
<resetMask>0x01</resetMask>
<fields>
<!-- OSTDF: Oscillator stop detected object selection register -->
<field>
<name>OSTDF</name>
<description>Oscillator stop detected flag register</description>
<bitRange>[0:0]</bitRange>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>NoDetection</name>
<description>Oscillator stop NOT detection</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Detection</name>
<description>Oscillator stop detection</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<!-- HOCOFC: High-speed on-chip oscillator frequency correction register -->
<register>
<name>HOCOFC</name>
<description>High-speed on-chip oscillator frequency correction register</description>
<addressOffset>0x2000</addressOffset>
<size>8</size>
<access>read-write</access>
<resetValue>0x00</resetValue>
<resetMask>0xC1</resetMask>
<fields>
<!-- FCST: High-speed on-chip oscillator frequency correction operation status register -->
<field>
<name>FCST</name>
<description>Oscillator stop detected object selection register</description>
<bitRange>[0:0]</bitRange>
<access>read-write</access>
</field>
<!-- FCIE: High-speed on-chip oscillator frequency correction completed interrupt enable register -->
<field>
<name>FCIE</name>
<description>Oscillator stop detected operation selection register</description>
<bitRange>[6:6]</bitRange>
<access>read-write</access>
</field>
<!-- FCMD: High-speed on-chip oscillator frequency correction operation mode register -->
<field>
<name>FCMD</name>
<description>High-speed on-chip oscillator frequency correction operation mode register</description>
<bitRange>[7:7]</bitRange>
<access>read-write</access>
</field>
</fields>
</register>
</registers>
</peripheral>
<!-- RST -->
<peripheral>
<name>RST</name>
<version>1.0</version>
<description>Reset Function</description>
<groupName>RST</groupName>
<baseAddress>0x40020420</baseAddress>
<size>8</size>
<access>read-only</access>
<addressBlock>
<offset>0</offset>
<size>0x040</size>
<usage>registers</usage>
</addressBlock>
<registers>
<!-- RESF: Reset flag register -->
<register>
<name>RESF</name>
<description>Reset flag register</description>
<addressOffset>0x20</addressOffset>
<size>8</size>
<access>read-only</access>
<resetMask>0x97</resetMask>
<fields>
<field>
<name>LVIRF</name>
<description>Internal reset request by voltage detector</description>
<bitRange>[0:0]</bitRange>
<readAction>clear</readAction>
<enumeratedValues>
<enumeratedValue>
<name>NONE</name>
<description>Internal reset request is not generated, or the RESF register is cleared.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>DONE</name>
<description>Internal reset request is generated.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>IAWRF</name>
<description>Internal reset request by illegal-memory access</description>
<bitRange>[1:1]</bitRange>
<readAction>clear</readAction>
<enumeratedValues>
<enumeratedValue>
<name>NONE</name>
<description>Internal reset request is not generated, or the RESF register is cleared.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>DONE</name>
<description>Internal reset request is generated.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>RPERF</name>
<description>Internal reset request by RAM parity</description>
<bitRange>[2:2]</bitRange>
<readAction>clear</readAction>
<enumeratedValues>
<enumeratedValue>
<name>NONE</name>
<description>Internal reset request is not generated, or the RESF register is cleared.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>DONE</name>
<description>Internal reset request is generated.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>WDTRF</name>
<description>Internal reset request by watchdog timer(WDT)</description>
<bitRange>[4:4]</bitRange>
<readAction>clear</readAction>
<enumeratedValues>
<enumeratedValue>
<name>NONE</name>
<description>Internal reset request is not generated, or the RESF register is cleared.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>DONE</name>
<description>Internal reset request is generated.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SYSRF</name>
<description>Internal reset request by system reset request(AIRCR.SYSRESETREQ)</description>
<bitRange>[7:7]</bitRange>
<readAction>clear</readAction>
<enumeratedValues>
<enumeratedValue>
<name>NONE</name>
<description>Internal reset request is not generated, or the RESF register is cleared.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>DONE</name>
<description>Internal reset request is generated.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
</registers>
</peripheral>
<!-- LVD -->
<peripheral>
<name>LVD</name>
<version>1.0</version>
<description>Voltage detector </description>
<groupName>LVD</groupName>
<baseAddress>0x40020440</baseAddress>
<size>8</size>
<access>read-write</access>
<addressBlock>
<offset>0</offset>
<size>0x100</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>LVI</name>
<description>Low Voltage detection interrupt</description>
<value>0</value>
</interrupt>
<registers>
<!-- LVIM: Voltage detection register -->
<register>
<name>LVIM</name>
<description>Voltage detection register</description>
<addressOffset>0x01</addressOffset>
<size>8</size>
<access>read-write</access>
<resetValue>0x00</resetValue>
<resetMask>0x83</resetMask>
<fields>
<!-- LVIF: Voltage detection flag -->
<field>
<name>LVIF</name>
<description>Voltage detection flag</description>
<bitRange>[0:0]</bitRange>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>GE</name>
<description>Supply voltage (VDD) greater or equal to detection voltage (VLVD), or when LVD is off</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>LT</name>
<description>Supply voltage (VDD) less than detection voltage (VLVD)</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<!-- LVIOMSK: Mask status flag of LVD output -->
<field>
<name>LVIOMSK</name>
<description>Mask status flag of LVD output</description>
<bitRange>[1:1]</bitRange>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>Invalid</name>
<description>Mask of LVD output is invalid</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Valid</name>
<description>Mask of LVD output is valid</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<!-- LVISEN: Enable rewritting LVIS register -->
<field>
<name>LVISEN</name>
<description>Enable rewritting LVIS register</description>
<bitRange>[7:7]</bitRange>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>Disable</name>
<description>Disabling of rewriting the LVIS register</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enable</name>
<description>Enabling of rewriting the LVIS register</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<!-- LVIS: Voltage detection level register -->
<register>
<name>LVIS</name>
<description>Voltage detection level register</description>
<addressOffset>0x02</addressOffset>
<size>8</size>
<access>read-write</access>
<resetValue>0x00</resetValue>
<resetMask>0x81</resetMask>
<fields>
<!-- LVILV: LVD detection level -->
<field>
<name>LVILV</name>
<description>LVD detection level</description>
<bitRange>[0:0]</bitRange>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>High</name>
<description>High-voltage detection level (VLVDH)</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Low</name>
<description>Low-voltage detection level (VLVDL or VLVD)</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<!-- LVIMD: Operation mode of voltage detection -->
<field>
<name>LVIMD</name>
<description>Operation mode of voltage detection</description>
<bitRange>[7:7]</bitRange>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>IRQ</name>
<description>interrupt mode</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Reset</name>
<description>reset mode</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
</registers>
</peripheral>
<!-- PORT -->
<peripheral>
<name>PORT</name>
<version>1.0</version>
<description>Port functions</description>
<groupName>PORT</groupName>
<baseAddress>0x40040000</baseAddress>
<size>8</size>
<access>read-write</access>
<addressBlock>
<offset>0</offset>
<size>0x1000</size>
<usage>registers</usage>
</addressBlock>
<registers>
<register>
<name>PM0</name>
<description>Port mode register 0</description>
<addressOffset>0x320</addressOffset>
<size>8</size>
<resetValue>0xFF</resetValue>
<resetMask>0x7F</resetMask>
</register>
<register>
<name>PM1</name>
<description>Port mode register 1</description>
<addressOffset>0x321</addressOffset>
<size>8</size>
<resetValue>0xFF</resetValue>
<resetMask>0xFF</resetMask>
</register>
<register>
<name>PM2</name>
<description>Port mode register 2</description>
<addressOffset>0x322</addressOffset>
<size>8</size>
<resetValue>0xFF</resetValue>
<resetMask>0xFF</resetMask>
</register>
<register>
<name>PM3</name>
<description>Port mode register 3</description>
<addressOffset>0x323</addressOffset>
<size>8</size>
<resetValue>0xFF</resetValue>
<resetMask>0x03</resetMask>
</register>
<register>
<name>PM4</name>
<description>Port mode register 4</description>
<addressOffset>0x324</addressOffset>
<size>8</size>
<resetValue>0xFF</resetValue>
<resetMask>0x3F</resetMask>
</register>
<register>
<name>PM5</name>
<description>Port mode register 5</description>
<addressOffset>0x325</addressOffset>
<size>8</size>
<resetValue>0xFF</resetValue>
<resetMask>0x3F</resetMask>
</register>
<register>
<name>PM6</name>
<description>Port mode register 6</description>
<addressOffset>0x326</addressOffset>
<size>8</size>
<resetValue>0xFF</resetValue>
<resetMask>0xFF</resetMask>
</register>
<register>
<name>PM7</name>
<description>Port mode register 7</description>
<addressOffset>0x327</addressOffset>
<size>8</size>
<resetValue>0xFF</resetValue>
<resetMask>0xFF</resetMask>
</register>
<register>
<name>PM10</name>
<description>Port mode register 10</description>
<addressOffset>0x32A</addressOffset>
<size>8</size>
<resetValue>0xFF</resetValue>
<resetMask>0x01</resetMask>
</register>
<register>
<name>PM11</name>
<description>Port mode register 11</description>
<addressOffset>0x32B</addressOffset>
<size>8</size>
<resetValue>0xFF</resetValue>
<resetMask>0x03</resetMask>
</register>
<register>
<name>PM12</name>
<description>Port mode register 12</description>
<addressOffset>0x32C</addressOffset>
<size>8</size>
<resetValue>0xFF</resetValue>
<resetMask>0x01</resetMask>
</register>
<register>
<name>PM13</name>
<description>Port mode register 13</description>
<addressOffset>0x32D</addressOffset>
<size>8</size>
<resetValue>0xFE</resetValue>
<resetMask>0xC0</resetMask>
</register>
<register>
<name>PM14</name>
<description>Port mode register 14</description>
<addressOffset>0x32E</addressOffset>
<size>8</size>
<resetValue>0xFF</resetValue>
<resetMask>0xDF</resetMask>
</register>
<register>
<name>PM15</name>
<description>Port mode register 15</description>
<addressOffset>0x32F</addressOffset>
<size>8</size>
<resetValue>0xFF</resetValue>
<resetMask>0x0F</resetMask>
</register>
<register>
<name>P0</name>
<description>Port register 0</description>
<addressOffset>0x300</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0x7F</resetMask>
</register>
<register>
<name>P1</name>
<description>Port register 1</description>
<addressOffset>0x301</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0xFF</resetMask>
</register>
<register>
<name>P2</name>
<description>Port register 2</description>
<addressOffset>0x302</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0xFF</resetMask>
</register>
<register>
<name>P3</name>
<description>Port register 3</description>
<addressOffset>0x303</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0x03</resetMask>
</register>
<register>
<name>P4</name>
<description>Port register 4</description>
<addressOffset>0x304</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0x3F</resetMask>
</register>
<register>
<name>P5</name>
<description>Port register 5</description>
<addressOffset>0x305</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0x3F</resetMask>
</register>
<register>
<name>P6</name>
<description>Port register 6</description>
<addressOffset>0x306</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0xFF</resetMask>
</register>
<register>
<name>P7</name>
<description>Port register 7</description>
<addressOffset>0x307</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0xFF</resetMask>
</register>
<register>
<name>P10</name>
<description>Port register 10</description>
<addressOffset>0x30A</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0x01</resetMask>
</register>
<register>
<name>P11</name>
<description>Port register 11</description>
<addressOffset>0x30B</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0x03</resetMask>
</register>
<register>
<name>P12</name>
<description>Port register 12</description>
<addressOffset>0x30C</addressOffset>
<size>8</size>
<resetMask>0x1F</resetMask>
</register>
<register>
<name>P13</name>
<description>Port register 13</description>
<addressOffset>0x30D</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0xC1</resetMask>
</register>
<register>
<name>P14</name>
<description>Port register 14</description>
<addressOffset>0x30E</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0xDF</resetMask>
</register>
<register>
<name>P15</name>
<description>Port register 15</description>
<addressOffset>0x30F</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0x0F</resetMask>
</register>
<register>
<name>PU0</name>
<description>Pull-up resistor option register 0</description>
<addressOffset>0x030</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0x7F</resetMask>
</register>
<register>
<name>PU1</name>
<description>Pull-up resistor option register 1</description>
<addressOffset>0x031</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0xFF</resetMask>
</register>
<register>
<name>PU3</name>
<description>Pull-up resistor option register 3</description>
<addressOffset>0x033</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0x03</resetMask>
</register>
<register>
<name>PU4</name>
<description>Pull-up resistor option register 4</description>
<addressOffset>0x034</addressOffset>
<size>8</size>
<resetValue>0x01</resetValue>
<resetMask>0x3F</resetMask>
</register>
<register>
<name>PU5</name>
<description>Pull-up resistor option register 5</description>
<addressOffset>0x035</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0xFF</resetMask>
</register>
<register>
<name>PU6</name>
<description>Pull-up resistor option register 6</description>
<addressOffset>0x036</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0xF0</resetMask>
</register>
<register>
<name>PU7</name>
<description>Pull-up resistor option register 7</description>
<addressOffset>0x037</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0xFF</resetMask>
</register>
<register>
<name>PU10</name>
<description>Pull-up resistor option register 10</description>
<addressOffset>0x03A</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0x01</resetMask>
</register>
<register>
<name>PU11</name>
<description>Pull-up resistor option register 11</description>
<addressOffset>0x03B</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0x03</resetMask>
</register>
<register>
<name>PU12</name>
<description>Pull-up resistor option register 12</description>
<addressOffset>0x03C</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0x01</resetMask>
</register>
<register>
<name>PU13</name>
<description>Pull-up resistor option register 13</description>
<addressOffset>0x03D</addressOffset>
<size>8</size>
<resetValue>0x80</resetValue>
<resetMask>0xC0</resetMask>
</register>
<register>
<name>PU14</name>
<description>Pull-up resistor option register 14</description>
<addressOffset>0x03E</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0xDF</resetMask>
</register>
<register>
<name>PIM0</name>
<description>Port input mode register 0</description>
<addressOffset>0x040</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0x1A</resetMask>
</register>
<register>
<name>PIM1</name>
<description>Port input mode register 1</description>
<addressOffset>0x041</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0xF1</resetMask>
</register>
<register>
<name>PIM3</name>
<description>Port input mode register 3</description>
<addressOffset>0x043</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0x01</resetMask>
</register>
<register>
<name>PIM4</name>
<description>Port input mode register 4</description>
<addressOffset>0x044</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0x14</resetMask>
</register>
<register>
<name>PIM5</name>
<description>Port input mode register 5</description>
<addressOffset>0x045</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0x21</resetMask>
</register>
<register>
<name>PIM7</name>
<description>Port input mode register 7</description>
<addressOffset>0x047</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0x16</resetMask>
</register>
<register>
<name>PIM14</name>
<description>Port input mode register 14</description>
<addressOffset>0x04E</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0x0C</resetMask>
</register>
<register>
<name>POM0</name>
<description>Port output mode register 0</description>
<addressOffset>0x050</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0x1D</resetMask>
</register>
<register>
<name>POM1</name>
<description>Port output mode register 1</description>
<addressOffset>0x051</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0xBB</resetMask>
</register>
<register>
<name>POM3</name>
<description>Port output mode register 3</description>
<addressOffset>0x053</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0x01</resetMask>
</register>
<register>
<name>POM4</name>
<description>Port output mode register 4</description>
<addressOffset>0x054</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0x14</resetMask>
</register>
<register>
<name>POM5</name>
<description>Port output mode register 5</description>
<addressOffset>0x055</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0x23</resetMask>
</register>
<register>
<name>POM7</name>
<description>Port output mode register 7</description>
<addressOffset>0x057</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0x12</resetMask>
</register>
<register>
<name>POM14</name>
<description>Port output mode register 14</description>
<addressOffset>0x05E</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0x1C</resetMask>
</register>
<register>
<name>PMC0</name>
<description>Port mode control register 0</description>
<addressOffset>0x060</addressOffset>
<size>8</size>
<resetValue>0xFF</resetValue>
<resetMask>0x1C</resetMask>
</register>
<register>
<name>PMC1</name>
<description>Port mode control register 1</description>
<addressOffset>0x061</addressOffset>
<size>8</size>
<resetValue>0xFF</resetValue>
<resetMask>0x03</resetMask>
</register>
<register>
<name>PMC2</name>
<description>Port mode control register 2</description>
<addressOffset>0x062</addressOffset>
<size>8</size>
<resetValue>0xFF</resetValue>
<resetMask>0xFF</resetMask>
</register>
<register>
<name>PMC10</name>
<description>Port mode control register 10</description>
<addressOffset>0x06A</addressOffset>
<size>8</size>
<resetValue>0xFF</resetValue>
<resetMask>0x01</resetMask>
</register>
<register>
<name>PMC12</name>
<description>Port mode control register 12</description>
<addressOffset>0x06C</addressOffset>
<size>8</size>
<resetValue>0xFF</resetValue>
<resetMask>0x01</resetMask>
</register>
<register>
<name>PMC13</name>
<description>Port mode control register 13</description>
<addressOffset>0x06D</addressOffset>
<size>8</size>
<resetValue>0xFF</resetValue>
<resetMask>0x40</resetMask>
</register>
<register>
<name>PMC14</name>
<description>Port mode control register 14</description>
<addressOffset>0x06E</addressOffset>
<size>8</size>
<resetValue>0xFF</resetValue>
<resetMask>0xC0</resetMask>
</register>
<register>
<name>PMC15</name>
<description>Port mode control register 15</description>
<addressOffset>0x06F</addressOffset>
<size>8</size>
<resetValue>0xFF</resetValue>
<resetMask>0x0F</resetMask>
</register>
<register>
<name>PSET0</name>
<description>Port set register 0</description>
<addressOffset>0x80</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0x7F</resetMask>
</register>
<register>
<name>PSET1</name>
<description>Port set register 1</description>
<addressOffset>0x81</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0xFF</resetMask>
</register>
<register>
<name>PSET2</name>
<description>Port set register 2</description>
<addressOffset>0x82</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0xFF</resetMask>
</register>
<register>
<name>PSET3</name>
<description>Port set register 3</description>
<addressOffset>0x83</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0x03</resetMask>
</register>
<register>
<name>PSET4</name>
<description>Port set register 4</description>
<addressOffset>0x84</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0x3F</resetMask>
</register>
<register>
<name>PSET5</name>
<description>Port set register 5</description>
<addressOffset>0x85</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0x3F</resetMask>
</register>
<register>
<name>PSET6</name>
<description>Port set register 6</description>
<addressOffset>0x86</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0xFF</resetMask>
</register>
<register>
<name>PSET7</name>
<description>Port set register 7</description>
<addressOffset>0x87</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0xFF</resetMask>
</register>
<register>
<name>PSET10</name>
<description>Port set register 10</description>
<addressOffset>0x8A</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0x01</resetMask>
</register>
<register>
<name>PSET11</name>
<description>Port set register 11</description>
<addressOffset>0x8B</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0x03</resetMask>
</register>
<register>
<name>PSET12</name>
<description>Port set register 12</description>
<addressOffset>0x8C</addressOffset>
<size>8</size>
<resetMask>0x1F</resetMask>
</register>
<register>
<name>PSET13</name>
<description>Port set register 13</description>
<addressOffset>0x8D</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0xC1</resetMask>
</register>
<register>
<name>PSET14</name>
<description>Port set register 14</description>
<addressOffset>0x8E</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0xDF</resetMask>
</register>
<register>
<name>PSET15</name>
<description>Port set register 15</description>
<addressOffset>0x8F</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0x0F</resetMask>
</register>
<register>
<name>PCLR0</name>
<description>Port clear register 0</description>
<addressOffset>0x90</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0x7F</resetMask>
</register>
<register>
<name>PCLR1</name>
<description>Port clear register 1</description>
<addressOffset>0x91</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0xFF</resetMask>
</register>
<register>
<name>PCLR2</name>
<description>Port clear register 2</description>
<addressOffset>0x92</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0xFF</resetMask>
</register>
<register>
<name>PCLR3</name>
<description>Port clear register 3</description>
<addressOffset>0x93</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0x03</resetMask>
</register>
<register>
<name>PCLR4</name>
<description>Port clear register 4</description>
<addressOffset>0x94</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0x3F</resetMask>
</register>
<register>
<name>PCLR5</name>
<description>Port clear register 5</description>
<addressOffset>0x95</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0x3F</resetMask>
</register>
<register>
<name>PCLR6</name>
<description>Port clear register 6</description>
<addressOffset>0x96</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0xFF</resetMask>
</register>
<register>
<name>PCLR7</name>
<description>Port clear register 7</description>
<addressOffset>0x97</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0xFF</resetMask>
</register>
<register>
<name>PCLR10</name>
<description>Port clear register 10</description>
<addressOffset>0x9A</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0x01</resetMask>
</register>
<register>
<name>PCLR11</name>
<description>Port clear register 11</description>
<addressOffset>0x9B</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0x03</resetMask>
</register>
<register>
<name>PCLR12</name>
<description>Port clear register 12</description>
<addressOffset>0x9C</addressOffset>
<size>8</size>
<resetMask>0x01</resetMask>
</register>
<register>
<name>PCLR13</name>
<description>Port clear register 13</description>
<addressOffset>0x9D</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0xC1</resetMask>
</register>
<register>
<name>PCLR14</name>
<description>Port clear register 14</description>
<addressOffset>0x9E</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0xDF</resetMask>
</register>
<register>
<name>PCLR15</name>
<description>Port clear register 15</description>
<addressOffset>0x9F</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0x0F</resetMask>
</register>
<register>
<name>PREAD0</name>
<description>Port read register 0</description>
<addressOffset>0xA0</addressOffset>
<size>8</size>
<resetValue>0xA0</resetValue>
<resetMask>0x7F</resetMask>
</register>
<register>
<name>PREAD1</name>
<description>Port read register 1</description>
<addressOffset>0xA1</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0xFF</resetMask>
</register>
<register>
<name>PREAD2</name>
<description>Port read register 2</description>
<addressOffset>0xA2</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0xFF</resetMask>
</register>
<register>
<name>PREAD3</name>
<description>Port read register 3</description>
<addressOffset>0xA3</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0x03</resetMask>
</register>
<register>
<name>PREAD4</name>
<description>Port read register 4</description>
<addressOffset>0xA4</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0x3F</resetMask>
</register>
<register>
<name>PREAD5</name>
<description>Port read register 5</description>
<addressOffset>0xA5</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0x3F</resetMask>
</register>
<register>
<name>PREAD6</name>
<description>Port read register 6</description>
<addressOffset>0xA6</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0xFF</resetMask>
</register>
<register>
<name>PREAD7</name>
<description>Port read register 7</description>
<addressOffset>0xA7</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0xFF</resetMask>
</register>
<register>
<name>PREAD10</name>
<description>Port read register 10</description>
<addressOffset>0xAA</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0x01</resetMask>
</register>
<register>
<name>PREAD11</name>
<description>Port read register 11</description>
<addressOffset>0xAB</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0x03</resetMask>
</register>
<register>
<name>PREAD12</name>
<description>Port read register 12</description>
<addressOffset>0xAC</addressOffset>
<size>8</size>
<resetMask>0x1F</resetMask>
</register>
<register>
<name>PREAD13</name>
<description>Port read register 13</description>
<addressOffset>0xAD</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0xC1</resetMask>
</register>
<register>
<name>PREAD14</name>
<description>Port read register 14</description>
<addressOffset>0xAE</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0xDF</resetMask>
</register>
<register>
<name>PREAD15</name>
<description>Port read register 15</description>
<addressOffset>0xAF</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0x0F</resetMask>
</register>
<register>
<name>PIOR0</name>
<description>Peripheral I/O redirection register 0</description>
<addressOffset>0x877</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0xFF</resetMask>
</register>
<register>
<name>PIOR1</name>
<description>Peripheral I/O redirection register 1</description>
<addressOffset>0x879</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0x0F</resetMask>
</register>
<register>
<name>PIOR2</name>
<description>Peripheral I/O redirection register 2</description>
<addressOffset>0x875</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0xFF</resetMask>
</register>
<register>
<name>PIOR3</name>
<description>Peripheral I/O redirection register 3</description>
<addressOffset>0x87C</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0x3F</resetMask>
</register>
<register>
<name>PMS</name>
<description>Port mode select register</description>
<addressOffset>0x87B</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0x01</resetMask>
</register>
<register>
<name>GDIDIS</name>
<description>Global digital input disable register</description>
<addressOffset>0x87D</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0x01</resetMask>
</register>
</registers>
</peripheral>
<!-- DIV -->
<peripheral>
<name>DIV</name>
<version>1.0</version>
<description>Hardware divider </description>
<groupName>DIV</groupName>
<baseAddress>0x4001A000</baseAddress>
<size>32</size>
<access>read-write</access>
<addressBlock>
<offset>0</offset>
<size>0x100</size>
<usage>registers</usage>
</addressBlock>
<!--interrupt>
<name>DIV</name>
<description>Hardware divider interrupt</description>
<value>48</value>
</interrupt-->
<registers>
<register>
<name>DIVIDEND</name>
<description>Dividend register</description>
<addressOffset>0x000</addressOffset>
<resetValue>0x00000000</resetValue>
<resetMask>0xFFFFFFFF</resetMask>
</register>
<register>
<name>DIVISOR</name>
<description>Divisor register</description>
<addressOffset>0x004</addressOffset>
<resetValue>0x00000000</resetValue>
<resetMask>0xFFFFFFFF</resetMask>
</register>
<register>
<name>QUOTIENT</name>
<description>Quotient register</description>
<addressOffset>0x008</addressOffset>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<resetMask>0xFFFFFFFF</resetMask>
</register>
<register>
<name>REMAINDER</name>
<description>Remainder register</description>
<addressOffset>0x00C</addressOffset>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<resetMask>0xFFFFFFFF</resetMask>
</register>
<register>
<name>STATUS</name>
<description>Status register</description>
<addressOffset>0x010</addressOffset>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<resetMask>0xFFFFFFFF</resetMask>
<fields>
<field>
<name>BUSY</name>
<description>divider busy flag</description>
<bitRange>[8:8]</bitRange>
<access>read-only</access>
</field>
<field>
<name>DIVBYZERO</name>
<description>divider zero flag</description>
<bitRange>[9:9]</bitRange>
<access>read-only</access>
</field>
</fields>
</register>
</registers>
</peripheral>
<!-- TM40 -->
<peripheral>
<name>TM40</name>
<version>1.0</version>
<description>General Purpose Timer 4</description>
<groupName>TM40</groupName>
<baseAddress>0x40041D80</baseAddress>
<size>16</size>
<access>read-write</access>
<addressBlock>
<offset>0</offset>
<size>0x200</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>TM00</name>
<description>TM4 channel 0 interrupt request</description>
<value>17</value>
</interrupt>
<interrupt>
<name>TM01</name>
<description>TM4 channel 1 interrupt request</description>
<value>18</value>
</interrupt>
<interrupt>
<name>TM02</name>
<description>TM4 channel 2 interrupt request</description>
<value>19</value>
</interrupt>
<interrupt>
<name>TM03</name>
<description>TM4 channel 3 interrupt request</description>
<value>20</value>
</interrupt>
<registers>
<register>
<dim>4</dim>
<dimIncrement>2</dimIncrement>
<dimIndex>0-3</dimIndex>
<name>TCR0%s</name>
<description>Timer count register 0%s</description>
<addressOffset>0x000</addressOffset>
<access>read-only</access>
<resetValue>0xFFFF</resetValue>
<resetMask>0xFFFF</resetMask>
</register>
<register>
<name>TMR00</name>
<description>Timer mode register mn</description>
<addressOffset>0x010</addressOffset>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<resetMask>0xFFFF</resetMask>
<fields>
<field>
<name>MD</name>
<description>Operation mode of channel n </description>
<bitRange>[3:0]</bitRange>
<access>read-write</access>
</field>
<field>
<name>CIS</name>
<description>Selection of TImn pin input valid edge</description>
<bitRange>[7:6]</bitRange>
<access>read-write</access>
</field>
<field>
<name>STS</name>
<description>Setting of start trigger or capture trigger of channel n</description>
<bitRange>[10:8]</bitRange>
<access>read-write</access>
</field>
<field>
<name>CCS</name>
<description>Selection of count clock (fTCLK) of channel n</description>
<bitRange>[12:12]</bitRange>
<access>read-write</access>
</field>
<field>
<name>CKS</name>
<description>Selection of operation clock (fMCK) of channel n</description>
<bitRange>[15:14]</bitRange>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>TMR01</name>
<description>Timer mode register mn</description>
<addressOffset>0x012</addressOffset>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<resetMask>0xFFFF</resetMask>
<fields>
<field>
<name>MD</name>
<description>Operation mode of channel n </description>
<bitRange>[3:0]</bitRange>
<access>read-write</access>
</field>
<field>
<name>CIS</name>
<description>Selection of TImn pin input valid edge</description>
<bitRange>[7:6]</bitRange>
<access>read-write</access>
</field>
<field>
<name>STS</name>
<description>Setting of start trigger or capture trigger of channel n</description>
<bitRange>[10:8]</bitRange>
<access>read-write</access>
</field>
<field>
<name>SPLIT</name>
<description>Selection of 8 or 16-bit timer operation for channels 1 and 3</description>
<bitRange>[11:11]</bitRange>
<access>read-write</access>
</field>
<field>
<name>CCS</name>
<description>Selection of count clock (fTCLK) of channel n</description>
<bitRange>[12:12]</bitRange>
<access>read-write</access>
</field>
<field>
<name>CKS</name>
<description>Selection of operation clock (fMCK) of channel n</description>
<bitRange>[15:14]</bitRange>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>TMR02</name>
<description>Timer mode register mn</description>
<addressOffset>0x014</addressOffset>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<resetMask>0xFFFF</resetMask>
<fields>
<field>
<name>MD</name>
<description>Operation mode of channel n </description>
<bitRange>[3:0]</bitRange>
<access>read-write</access>
</field>
<field>
<name>CIS</name>
<description>Selection of TImn pin input valid edge</description>
<bitRange>[7:6]</bitRange>
<access>read-write</access>
</field>
<field>
<name>STS</name>
<description>Setting of start trigger or capture trigger of channel n</description>
<bitRange>[10:8]</bitRange>
<access>read-write</access>
</field>
<field>
<name>MASTER</name>
<description>Selection between using channel n independently or simultaneously with another channel (as a slave or master)</description>
<bitRange>[11:11]</bitRange>
<access>read-write</access>
</field>
<field>
<name>CCS</name>
<description>Selection of count clock (fTCLK) of channel n</description>
<bitRange>[12:12]</bitRange>
<access>read-write</access>
</field>
<field>
<name>CKS</name>
<description>Selection of operation clock (fMCK) of channel n</description>
<bitRange>[15:14]</bitRange>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>TMR03</name>
<description>Timer mode register mn</description>
<addressOffset>0x016</addressOffset>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<resetMask>0xFFFF</resetMask>
<fields>
<field>
<name>MD</name>
<description>Operation mode of channel n </description>
<bitRange>[3:0]</bitRange>
<access>read-write</access>
</field>
<field>
<name>CIS</name>
<description>Selection of TImn pin input valid edge</description>
<bitRange>[7:6]</bitRange>
<access>read-write</access>
</field>
<field>
<name>STS</name>
<description>Setting of start trigger or capture trigger of channel n</description>
<bitRange>[10:8]</bitRange>
<access>read-write</access>
</field>
<field>
<name>SPLIT</name>
<description>Selection of 8 or 16-bit timer operation for channels 1 and 3</description>
<bitRange>[11:11]</bitRange>
<access>read-write</access>
</field>
<field>
<name>CCS</name>
<description>Selection of count clock (fTCLK) of channel n</description>
<bitRange>[12:12]</bitRange>
<access>read-write</access>
</field>
<field>
<name>CKS</name>
<description>Selection of operation clock (fMCK) of channel n</description>
<bitRange>[15:14]</bitRange>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>TSR00</name>
<description>Timer status register mn</description>
<addressOffset>0x020</addressOffset>
<access>read-only</access>
<resetValue>0x0000</resetValue>
<resetMask>0xFFFF</resetMask>
<fields>
<field>
<name>OVF</name>
<description>Counter overflow status of channel n</description>
<bitRange>[0:0]</bitRange>
</field>
</fields>
</register>
<register derivedFrom="TSR00">
<name>TSR01</name>
<description>Timer status register mn</description>
<addressOffset>0x022</addressOffset>
</register>
<register derivedFrom="TSR00">
<name>TSR02</name>
<description>Timer status register mn</description>
<addressOffset>0x024</addressOffset>
</register>
<register derivedFrom="TSR00">
<name>TSR03</name>
<description>Timer status register mn</description>
<addressOffset>0x026</addressOffset>
</register>
<register>
<name>TE0</name>
<description>Timer channel enable status register m</description>
<addressOffset>0x030</addressOffset>
<access>read-only</access>
<resetValue>0x0000</resetValue>
<resetMask>0xFFFF</resetMask>
<fields>
<field>
<name>TE00</name>
<description>Indication of operation enable/stop status of channel 0</description>
<bitRange>[0:0]</bitRange>
</field>
<field>
<name>TE01</name>
<description>Indication of operation enable/stop status of channel 1</description>
<bitRange>[1:1]</bitRange>
</field>
<field>
<name>TE02</name>
<description>Indication of operation enable/stop status of channel 2</description>
<bitRange>[2:2]</bitRange>
</field>
<field>
<name>TE03</name>
<description>Indication of operation enable/stop status of channel 3</description>
<bitRange>[3:3]</bitRange>
</field>
<field>
<name>TEH01</name>
<description>Indication of whether operation of the higher 8-bit timer is enabled or stopped when channel 1 is in the 8-bit timer mode</description>
<bitRange>[9:9]</bitRange>
</field>
<field>
<name>TEH03</name>
<description>Indication of whether operation of the higher 8-bit timer is enabled or stopped when channel 3 is in the 8-bit timer mode</description>
<bitRange>[11:11]</bitRange>
</field>
</fields>
</register>
<register>
<name>TS0</name>
<description>Timer channel start register 0</description>
<addressOffset>0x032</addressOffset>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<resetMask>0xFFFF</resetMask>
<fields>
<field>
<name>TS00</name>
<description>Operation enable (start) trigger of channel 0</description>
<bitRange>[0:0]</bitRange>
</field>
<field>
<name>TS01</name>
<description>Operation enable (start) trigger of channel 1</description>
<bitRange>[1:1]</bitRange>
</field>
<field>
<name>TS02</name>
<description>Operation enable (start) trigger of channel 2</description>
<bitRange>[2:2]</bitRange>
</field>
<field>
<name>TS03</name>
<description>Operation enable (start) trigger of channel 3</description>
<bitRange>[3:3]</bitRange>
</field>
<field>
<name>TSH01</name>
<description>Trigger to enable operation (start operation) of the higher 8-bit timer when channel 1 is in the 8-bit timer mode</description>
<bitRange>[9:9]</bitRange>
</field>
<field>
<name>TSH03</name>
<description>Trigger to enable operation (start operation) of the higher 8-bit timer when channel 3 is in the 8-bit timer mode</description>
<bitRange>[11:11]</bitRange>
</field>
</fields>
</register>
<register>
<name>TT0</name>
<description>Timer channel stop register 0</description>
<addressOffset>0x034</addressOffset>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<resetMask>0xFFFF</resetMask>
<fields>
<field>
<name>TT00</name>
<description>Operation stop trigger of channel 0</description>
<bitRange>[0:0]</bitRange>
</field>
<field>
<name>TT01</name>
<description>Operation stop trigger of channel 1</description>
<bitRange>[1:1]</bitRange>
</field>
<field>
<name>TT02</name>
<description>Operation stop trigger of channel 2</description>
<bitRange>[2:2]</bitRange>
</field>
<field>
<name>TT03</name>
<description>Operation stop trigger of channel 3</description>
<bitRange>[3:3]</bitRange>
</field>
<field>
<name>TTH01</name>
<description>Trigger to stop operation of the higher 8-bit timer when channel 1 is in the 8-bit timer mode</description>
<bitRange>[9:9]</bitRange>
</field>
<field>
<name>TTH03</name>
<description>Trigger to stop operation of the higher 8-bit timer when channel 3 is in the 8-bit timer mode</description>
<bitRange>[11:11]</bitRange>
</field>
</fields>
</register>
<register>
<name>TPS0</name>
<description>Timer clock select register 0</description>
<addressOffset>0x036</addressOffset>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<resetMask>0xFFFF</resetMask>
<fields>
<field>
<name>PRS00</name>
<description>Prescaler 0</description>
<bitRange>[3:0]</bitRange>
</field>
<field>
<name>PRS01</name>
<description>Prescaler 1</description>
<bitRange>[7:4]</bitRange>
</field>
<field>
<name>PRS02</name>
<description>Prescaler 2</description>
<bitRange>[9:8]</bitRange>
</field>
<field>
<name>PRS03</name>
<description>Prescaler 3</description>
<bitRange>[13:12]</bitRange>
</field>
</fields>
</register>
<register>
<name>TO0</name>
<description>Timer output register 0</description>
<addressOffset>0x038</addressOffset>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<resetMask>0xFFFF</resetMask>
<fields>
<field>
<name>TO00</name>
<description>Timer output of channel 0</description>
<bitRange>[0:0]</bitRange>
</field>
<field>
<name>TO01</name>
<description>Timer output of channel 1</description>
<bitRange>[1:1]</bitRange>
</field>
<field>
<name>TO02</name>
<description>Timer output of channel 2</description>
<bitRange>[2:2]</bitRange>
</field>
<field>
<name>TO03</name>
<description>Timer output of channel 3</description>
<bitRange>[3:3]</bitRange>
</field>
</fields>
</register>
<register>
<name>TOE0</name>
<description>Timer output enable register 0</description>
<addressOffset>0x03A</addressOffset>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<resetMask>0xFFFF</resetMask>
<fields>
<field>
<name>TOE00</name>
<description>Timer output enable of channel 0</description>
<bitRange>[0:0]</bitRange>
</field>
<field>
<name>TOE01</name>
<description>Timer output enable of channel 1</description>
<bitRange>[1:1]</bitRange>
</field>
<field>
<name>TOE02</name>
<description>Timer output enable of channel 2</description>
<bitRange>[2:2]</bitRange>
</field>
<field>
<name>TOE03</name>
<description>Timer output enable of channel 3</description>
<bitRange>[3:3]</bitRange>
</field>
</fields>
</register>
<register>
<name>TOL0</name>
<description>Timer output level register 0</description>
<addressOffset>0x03C</addressOffset>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<resetMask>0xFFFF</resetMask>
<fields>
<field>
<name>TOL01</name>
<description>Control of timer output level of channel 1</description>
<bitRange>[1:1]</bitRange>
</field>
<field>
<name>TOL02</name>
<description>Control of timer output level of channel 2</description>
<bitRange>[2:2]</bitRange>
</field>
<field>
<name>TOL03</name>
<description>Control of timer output level of channel 3</description>
<bitRange>[3:3]</bitRange>
</field>
</fields>
</register>
<register>
<name>TOM0</name>
<description>Timer output mode register 0</description>
<addressOffset>0x03E</addressOffset>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<resetMask>0xFFFF</resetMask>
<fields>
<field>
<name>TOM01</name>
<description>Control of timer output mode of channel 1</description>
<bitRange>[1:1]</bitRange>
</field>
<field>
<name>TOM02</name>
<description>Control of timer output mode of channel 2</description>
<bitRange>[2:2]</bitRange>
</field>
<field>
<name>TOM03</name>
<description>Control of timer output mode of channel 3</description>
<bitRange>[3:3]</bitRange>
</field>
</fields>
</register>
<register>
<dim>4</dim>
<dimIncrement>2</dimIncrement>
<dimIndex>0-3</dimIndex>
<name>TDR0%s</name>
<description>Timer data register 0%s</description>
<addressOffset>0x190</addressOffset>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<resetMask>0xFFFF</resetMask>
</register>
<register>
<name>TDR01L</name>
<description>Timer data lower register 01</description>
<alternateRegister>TDR01</alternateRegister>
<addressOffset>0x192</addressOffset>
<size>8</size>
</register>
<register>
<name>TDR01H</name>
<description>Timer data higher register 01</description>
<alternateRegister>TDR01</alternateRegister>
<addressOffset>0x193</addressOffset>
<size>8</size>
</register>
<register>
<name>TDR03L</name>
<description>Timer data lower register 03</description>
<alternateRegister>TDR03</alternateRegister>
<addressOffset>0x196</addressOffset>
<size>8</size>
</register>
<register>
<name>TDR03H</name>
<description>Timer data higher register 03</description>
<alternateRegister>TDR03</alternateRegister>
<addressOffset>0x197</addressOffset>
<size>8</size>
</register>
</registers>
</peripheral>
<!-- TM81 -->
<peripheral>
<name>TM81</name>
<version>1.0</version>
<description>General Purpose Timer 4</description>
<groupName>TM8</groupName>
<baseAddress>0x40045D80</baseAddress>
<size>16</size>
<access>read-write</access>
<addressBlock>
<offset>0</offset>
<size>0x200</size>
<usage>registers</usage>
</addressBlock>
<!--
<interrupt>
<name>TM10</name>
<description>TM81 channel 0 interrupt request</description>
<value>45</value>
</interrupt>
<interrupt>
<name>TM11</name>
<description>TM81 channel 1 interrupt request</description>
<value>50</value>
</interrupt>
<interrupt>
<name>TM12</name>
<description>TM81 channel 2 interrupt request</description>
<value>51</value>
</interrupt>
<interrupt>
<name>TM13</name>
<description>TM81 channel 3 interrupt request</description>
<value>52</value>
</interrupt>
<interrupt>
<name>TM14</name>
<description>TM81 channel 4 interrupt request</description>
<value>81</value>
</interrupt>
<interrupt>
<name>TM15</name>
<description>TM81 channel 5 interrupt request</description>
<value>82</value>
</interrupt>
<interrupt>
<name>TM16</name>
<description>TM81 channel 6 interrupt request</description>
<value>83</value>
</interrupt>
<interrupt>
<name>TM17</name>
<description>TM81 channel 7 interrupt request</description>
<value>84</value>
</interrupt>
-->
<registers>
<register>
<dim>8</dim>
<dimIncrement>2</dimIncrement>
<dimIndex>0-7</dimIndex>
<name>TCR1%s</name>
<description>Timer count register 0%s</description>
<addressOffset>0x000</addressOffset>
<access>read-only</access>
<resetValue>0xFFFF</resetValue>
<resetMask>0xFFFF</resetMask>
</register>
<register>
<name>TMR10</name>
<description>Timer mode register mn</description>
<addressOffset>0x010</addressOffset>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<resetMask>0xFFFF</resetMask>
<fields>
<field>
<name>MD</name>
<description>Operation mode of channel n </description>
<bitRange>[3:0]</bitRange>
<access>read-write</access>
</field>
<field>
<name>CIS</name>
<description>Selection of TImn pin input valid edge</description>
<bitRange>[7:6]</bitRange>
<access>read-write</access>
</field>
<field>
<name>STS</name>
<description>Setting of start trigger or capture trigger of channel n</description>
<bitRange>[10:8]</bitRange>
<access>read-write</access>
</field>
<field>
<name>CCS</name>
<description>Selection of count clock (fTCLK) of channel n</description>
<bitRange>[12:12]</bitRange>
<access>read-write</access>
</field>
<field>
<name>CKS</name>
<description>Selection of operation clock (fMCK) of channel n</description>
<bitRange>[15:14]</bitRange>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>TMR11</name>
<description>Timer mode register mn</description>
<addressOffset>0x012</addressOffset>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<resetMask>0xFFFF</resetMask>
<fields>
<field>
<name>MD</name>
<description>Operation mode of channel n </description>
<bitRange>[3:0]</bitRange>
<access>read-write</access>
</field>
<field>
<name>CIS</name>
<description>Selection of TImn pin input valid edge</description>
<bitRange>[7:6]</bitRange>
<access>read-write</access>
</field>
<field>
<name>STS</name>
<description>Setting of start trigger or capture trigger of channel n</description>
<bitRange>[10:8]</bitRange>
<access>read-write</access>
</field>
<field>
<name>SPLIT</name>
<description>Selection of 8 or 16-bit timer operation for channels 1 and 3</description>
<bitRange>[11:11]</bitRange>
<access>read-write</access>
</field>
<field>
<name>CCS</name>
<description>Selection of count clock (fTCLK) of channel n</description>
<bitRange>[12:12]</bitRange>
<access>read-write</access>
</field>
<field>
<name>CKS</name>
<description>Selection of operation clock (fMCK) of channel n</description>
<bitRange>[15:14]</bitRange>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>TMR12</name>
<description>Timer mode register mn</description>
<addressOffset>0x014</addressOffset>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<resetMask>0xFFFF</resetMask>
<fields>
<field>
<name>MD</name>
<description>Operation mode of channel n </description>
<bitRange>[3:0]</bitRange>
<access>read-write</access>
</field>
<field>
<name>CIS</name>
<description>Selection of TImn pin input valid edge</description>
<bitRange>[7:6]</bitRange>
<access>read-write</access>
</field>
<field>
<name>STS</name>
<description>Setting of start trigger or capture trigger of channel n</description>
<bitRange>[10:8]</bitRange>
<access>read-write</access>
</field>
<field>
<name>MASTER</name>
<description>Selection between using channel n independently or simultaneously with another channel (as a slave or master)</description>
<bitRange>[11:11]</bitRange>
<access>read-write</access>
</field>
<field>
<name>CCS</name>
<description>Selection of count clock (fTCLK) of channel n</description>
<bitRange>[12:12]</bitRange>
<access>read-write</access>
</field>
<field>
<name>CKS</name>
<description>Selection of operation clock (fMCK) of channel n</description>
<bitRange>[15:14]</bitRange>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>TMR13</name>
<description>Timer mode register mn</description>
<addressOffset>0x016</addressOffset>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<resetMask>0xFFFF</resetMask>
<fields>
<field>
<name>MD</name>
<description>Operation mode of channel n </description>
<bitRange>[3:0]</bitRange>
<access>read-write</access>
</field>
<field>
<name>CIS</name>
<description>Selection of TImn pin input valid edge</description>
<bitRange>[7:6]</bitRange>
<access>read-write</access>
</field>
<field>
<name>STS</name>
<description>Setting of start trigger or capture trigger of channel n</description>
<bitRange>[10:8]</bitRange>
<access>read-write</access>
</field>
<field>
<name>SPLIT</name>
<description>Selection of 8 or 16-bit timer operation for channels 1 and 3</description>
<bitRange>[11:11]</bitRange>
<access>read-write</access>
</field>
<field>
<name>CCS</name>
<description>Selection of count clock (fTCLK) of channel n</description>
<bitRange>[12:12]</bitRange>
<access>read-write</access>
</field>
<field>
<name>CKS</name>
<description>Selection of operation clock (fMCK) of channel n</description>
<bitRange>[15:14]</bitRange>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>TMR14</name>
<description>Timer mode register mn</description>
<addressOffset>0x018</addressOffset>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<resetMask>0xFFFF</resetMask>
<fields>
<field>
<name>MD</name>
<description>Operation mode of channel n</description>
<bitRange>[3:0]</bitRange>
<access>read-write</access>
</field>
<field>
<name>CIS</name>
<description>Selection of TImn pin input valid edge</description>
<bitRange>[7:6]</bitRange>
<access>read-write</access>
</field>
<field>
<name>STS</name>
<description>Setting of start trigger or capture trigger of channel n</description>
<bitRange>[10:8]</bitRange>
<access>read-write</access>
</field>
<field>
<name>MASTER</name>
<description>Selection between using channel n independently or simultaneously with another channel (as a slave or master)</description>
<bitRange>[11:11]</bitRange>
<access>read-write</access>
</field>
<field>
<name>CCS</name>
<description>Selection of count clock (fTCLK) of channel n</description>
<bitRange>[12:12]</bitRange>
<access>read-write</access>
</field>
<field>
<name>CKS</name>
<description>Selection of operation clock (fMCK) of channel n</description>
<bitRange>[15:14]</bitRange>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>TMR15</name>
<description>Timer mode register mn</description>
<addressOffset>0x01A</addressOffset>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<resetMask>0xFFFF</resetMask>
<fields>
<field>
<name>MD</name>
<description>Operation mode of channel n</description>
<bitRange>[3:0]</bitRange>
<access>read-write</access>
</field>
<field>
<name>CIS</name>
<description>Selection of TImn pin input valid edge</description>
<bitRange>[7:6]</bitRange>
<access>read-write</access>
</field>
<field>
<name>STS</name>
<description>Setting of start trigger or capture trigger of channel n</description>
<bitRange>[10:8]</bitRange>
<access>read-write</access>
</field>
<field>
<name>CCS</name>
<description>Selection of count clock (fTCLK) of channel n</description>
<bitRange>[12:12]</bitRange>
<access>read-write</access>
</field>
<field>
<name>CKS</name>
<description>Selection of operation clock (fMCK) of channel n</description>
<bitRange>[15:14]</bitRange>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>TMR16</name>
<description>Timer mode register mn</description>
<addressOffset>0x01C</addressOffset>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<resetMask>0xFFFF</resetMask>
<fields>
<field>
<name>MD</name>
<description>Operation mode of channel n</description>
<bitRange>[3:0]</bitRange>
<access>read-write</access>
</field>
<field>
<name>CIS</name>
<description>Selection of TImn pin input valid edge</description>
<bitRange>[7:6]</bitRange>
<access>read-write</access>
</field>
<field>
<name>STS</name>
<description>Setting of start trigger or capture trigger of channel n</description>
<bitRange>[10:8]</bitRange>
<access>read-write</access>
</field>
<field>
<name>MASTER</name>
<description>Selection between using channel n independently or simultaneously with another channel (as a slave or master)</description>
<bitRange>[11:11]</bitRange>
<access>read-write</access>
</field>
<field>
<name>CCS</name>
<description>Selection of count clock (fTCLK) of channel n</description>
<bitRange>[12:12]</bitRange>
<access>read-write</access>
</field>
<field>
<name>CKS</name>
<description>Selection of operation clock (fMCK) of channel n</description>
<bitRange>[15:14]</bitRange>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>TMR17</name>
<description>Timer mode register mn</description>
<addressOffset>0x01E</addressOffset>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<resetMask>0xFFFF</resetMask>
<fields>
<field>
<name>MD</name>
<description>Operation mode of channel n</description>
<bitRange>[3:0]</bitRange>
<access>read-write</access>
</field>
<field>
<name>CIS</name>
<description>Selection of TImn pin input valid edge</description>
<bitRange>[7:6]</bitRange>
<access>read-write</access>
</field>
<field>
<name>STS</name>
<description>Setting of start trigger or capture trigger of channel n</description>
<bitRange>[10:8]</bitRange>
<access>read-write</access>
</field>
<field>
<name>CCS</name>
<description>Selection of count clock (fTCLK) of channel n</description>
<bitRange>[12:12]</bitRange>
<access>read-write</access>
</field>
<field>
<name>CKS</name>
<description>Selection of operation clock (fMCK) of channel n</description>
<bitRange>[15:14]</bitRange>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>TSR10</name>
<description>Timer status register mn</description>
<addressOffset>0x020</addressOffset>
<access>read-only</access>
<resetValue>0x0000</resetValue>
<resetMask>0xFFFF</resetMask>
<fields>
<field>
<name>OVF</name>
<description>Counter overflow status of channel n</description>
<bitRange>[0:0]</bitRange>
</field>
</fields>
</register>
<register derivedFrom="TSR10">
<name>TSR11</name>
<description>Timer status register mn</description>
<addressOffset>0x022</addressOffset>
</register>
<register derivedFrom="TSR10">
<name>TSR12</name>
<description>Timer status register mn</description>
<addressOffset>0x024</addressOffset>
</register>
<register derivedFrom="TSR10">
<name>TSR13</name>
<description>Timer status register mn</description>
<addressOffset>0x026</addressOffset>
</register>
<register derivedFrom="TSR10">
<name>TSR14</name>
<description>Timer status register mn</description>
<addressOffset>0x028</addressOffset>
</register>
<register derivedFrom="TSR10">
<name>TSR15</name>
<description>Timer status register mn</description>
<addressOffset>0x02A</addressOffset>
</register>
<register derivedFrom="TSR10">
<name>TSR16</name>
<description>Timer status register mn</description>
<addressOffset>0x02C</addressOffset>
</register>
<register derivedFrom="TSR10">
<name>TSR17</name>
<description>Timer status register mn</description>
<addressOffset>0x02E</addressOffset>
</register>
<register>
<name>TE1</name>
<description>Timer channel enable status register m</description>
<addressOffset>0x030</addressOffset>
<access>read-only</access>
<resetValue>0x0000</resetValue>
<resetMask>0xFFFF</resetMask>
<fields>
<field>
<name>TE10</name>
<description>Indication of operation enable/stop status of channel 0</description>
<bitRange>[0:0]</bitRange>
</field>
<field>
<name>TE11</name>
<description>Indication of operation enable/stop status of channel 1</description>
<bitRange>[1:1]</bitRange>
</field>
<field>
<name>TE12</name>
<description>Indication of operation enable/stop status of channel 2</description>
<bitRange>[2:2]</bitRange>
</field>
<field>
<name>TE13</name>
<description>Indication of operation enable/stop status of channel 3</description>
<bitRange>[3:3]</bitRange>
</field>
<field>
<name>TE14</name>
<description>Indication of operation enable/stop status of channel 4</description>
<bitRange>[4:4]</bitRange>
</field>
<field>
<name>TE15</name>
<description>Indication of operation enable/stop status of channel 5</description>
<bitRange>[5:5]</bitRange>
</field>
<field>
<name>TE16</name>
<description>Indication of operation enable/stop status of channel 6</description>
<bitRange>[6:6]</bitRange>
</field>
<field>
<name>TE17</name>
<description>Indication of operation enable/stop status of channel 7</description>
<bitRange>[7:7]</bitRange>
</field>
</fields>
</register>
<register>
<name>TS1</name>
<description>Timer channel start register 0</description>
<addressOffset>0x032</addressOffset>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<resetMask>0xFFFF</resetMask>
<fields>
<field>
<name>TS10</name>
<description>Operation enable (start) trigger of channel 0</description>
<bitRange>[0:0]</bitRange>
</field>
<field>
<name>TS11</name>
<description>Operation enable (start) trigger of channel 1</description>
<bitRange>[1:1]</bitRange>
</field>
<field>
<name>TS12</name>
<description>Operation enable (start) trigger of channel 2</description>
<bitRange>[2:2]</bitRange>
</field>
<field>
<name>TS13</name>
<description>Operation enable (start) trigger of channel 3</description>
<bitRange>[3:3]</bitRange>
</field>
<field>
<name>TS14</name>
<description>Operation enable (start) trigger of channel 4</description>
<bitRange>[4:4]</bitRange>
</field>
<field>
<name>TS15</name>
<description>Operation enable (start) trigger of channel 5</description>
<bitRange>[5:5]</bitRange>
</field>
<field>
<name>TS16</name>
<description>Operation enable (start) trigger of channel 6</description>
<bitRange>[6:6]</bitRange>
</field>
<field>
<name>TS17</name>
<description>Operation enable (start) trigger of channel 7</description>
<bitRange>[7:7]</bitRange>
</field>
</fields>
</register>
<register>
<name>TT1</name>
<description>Timer channel stop register 0</description>
<addressOffset>0x034</addressOffset>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<resetMask>0xFFFF</resetMask>
<fields>
<field>
<name>TT10</name>
<description>Operation stop trigger of channel 0</description>
<bitRange>[0:0]</bitRange>
</field>
<field>
<name>TT11</name>
<description>Operation stop trigger of channel 1</description>
<bitRange>[1:1]</bitRange>
</field>
<field>
<name>TT12</name>
<description>Operation stop trigger of channel 2</description>
<bitRange>[2:2]</bitRange>
</field>
<field>
<name>TT13</name>
<description>Operation stop trigger of channel 3</description>
<bitRange>[3:3]</bitRange>
</field>
<field>
<name>TT14</name>
<description>Operation stop trigger of channel 4</description>
<bitRange>[4:4]</bitRange>
</field>
<field>
<name>TT15</name>
<description>Operation stop trigger of channel 5</description>
<bitRange>[5:5]</bitRange>
</field>
<field>
<name>TT16</name>
<description>Operation stop trigger of channel 6</description>
<bitRange>[6:6]</bitRange>
</field>
<field>
<name>TT17</name>
<description>Operation stop trigger of channel 7</description>
<bitRange>[7:7]</bitRange>
</field>
</fields>
</register>
<register>
<name>TPS1</name>
<description>Timer clock select register 0</description>
<addressOffset>0x036</addressOffset>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<resetMask>0xFFFF</resetMask>
<fields>
<field>
<name>PRS10</name>
<description>Prescaler 0</description>
<bitRange>[3:0]</bitRange>
</field>
<field>
<name>PRS11</name>
<description>Prescaler 1</description>
<bitRange>[7:4]</bitRange>
</field>
<field>
<name>PRS12</name>
<description>Prescaler 2</description>
<bitRange>[9:8]</bitRange>
</field>
<field>
<name>PRS13</name>
<description>Prescaler 3</description>
<bitRange>[13:12]</bitRange>
</field>
</fields>
</register>
<register>
<name>TO1</name>
<description>Timer output register 0</description>
<addressOffset>0x038</addressOffset>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<resetMask>0xFFFF</resetMask>
<fields>
<field>
<name>TO10</name>
<description>Timer output of channel 0</description>
<bitRange>[0:0]</bitRange>
</field>
<field>
<name>TO11</name>
<description>Timer output of channel 1</description>
<bitRange>[1:1]</bitRange>
</field>
<field>
<name>TO12</name>
<description>Timer output of channel 2</description>
<bitRange>[2:2]</bitRange>
</field>
<field>
<name>TO13</name>
<description>Timer output of channel 3</description>
<bitRange>[3:3]</bitRange>
</field>
<field>
<name>TO14</name>
<description>Timer output of channel 4</description>
<bitRange>[4:4]</bitRange>
</field>
<field>
<name>TO15</name>
<description>Timer output of channel 5</description>
<bitRange>[5:5]</bitRange>
</field>
<field>
<name>TO16</name>
<description>Timer output of channel 6</description>
<bitRange>[6:6]</bitRange>
</field>
<field>
<name>TO17</name>
<description>Timer output of channel 7</description>
<bitRange>[7:7]</bitRange>
</field>
</fields>
</register>
<register>
<name>TOE1</name>
<description>Timer output enable register 0</description>
<addressOffset>0x03A</addressOffset>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<resetMask>0xFFFF</resetMask>
<fields>
<field>
<name>TOE10</name>
<description>Timer output enable of channel 0</description>
<bitRange>[0:0]</bitRange>
</field>
<field>
<name>TOE11</name>
<description>Timer output enable of channel 1</description>
<bitRange>[1:1]</bitRange>
</field>
<field>
<name>TOE12</name>
<description>Timer output enable of channel 2</description>
<bitRange>[2:2]</bitRange>
</field>
<field>
<name>TOE13</name>
<description>Timer output enable of channel 3</description>
<bitRange>[3:3]</bitRange>
</field>
<field>
<name>TOE14</name>
<description>Timer output enable of channel 4</description>
<bitRange>[4:4]</bitRange>
</field>
<field>
<name>TOE15</name>
<description>Timer output enable of channel 5</description>
<bitRange>[5:5]</bitRange>
</field>
<field>
<name>TOE16</name>
<description>Timer output enable of channel 6</description>
<bitRange>[6:6]</bitRange>
</field>
<field>
<name>TOE17</name>
<description>Timer output enable of channel 7</description>
<bitRange>[7:7]</bitRange>
</field>
</fields>
</register>
<register>
<name>TOL1</name>
<description>Timer output level register 0</description>
<addressOffset>0x03C</addressOffset>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<resetMask>0xFFFF</resetMask>
<fields>
<field>
<name>TOL11</name>
<description>Control of timer output level of channel 1</description>
<bitRange>[1:1]</bitRange>
</field>
<field>
<name>TOL12</name>
<description>Control of timer output level of channel 2</description>
<bitRange>[2:2]</bitRange>
</field>
<field>
<name>TOL13</name>
<description>Control of timer output level of channel 3</description>
<bitRange>[3:3]</bitRange>
</field>
<field>
<name>TOL14</name>
<description>Control of timer output level of channel 4</description>
<bitRange>[4:4]</bitRange>
</field>
<field>
<name>TOL15</name>
<description>Control of timer output level of channel 5</description>
<bitRange>[5:5]</bitRange>
</field>
<field>
<name>TOL16</name>
<description>Control of timer output level of channel 6</description>
<bitRange>[6:6]</bitRange>
</field>
<field>
<name>TOL17</name>
<description>Control of timer output level of channel 7</description>
<bitRange>[7:7]</bitRange>
</field>
</fields>
</register>
<register>
<name>TOM1</name>
<description>Timer output mode register 0</description>
<addressOffset>0x03E</addressOffset>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<resetMask>0xFFFF</resetMask>
<fields>
<field>
<name>TOM11</name>
<description>Control of timer output mode of channel 1</description>
<bitRange>[1:1]</bitRange>
</field>
<field>
<name>TOM12</name>
<description>Control of timer output mode of channel 2</description>
<bitRange>[2:2]</bitRange>
</field>
<field>
<name>TOM13</name>
<description>Control of timer output mode of channel 3</description>
<bitRange>[3:3]</bitRange>
</field>
<field>
<name>TOM14</name>
<description>Control of timer output mode of channel 4</description>
<bitRange>[4:4]</bitRange>
</field>
<field>
<name>TOM15</name>
<description>Control of timer output mode of channel 5</description>
<bitRange>[5:5]</bitRange>
</field>
<field>
<name>TOM16</name>
<description>Control of timer output mode of channel 6</description>
<bitRange>[6:6]</bitRange>
</field>
<field>
<name>TOM17</name>
<description>Control of timer output mode of channel 7</description>
<bitRange>[7:7]</bitRange>
</field>
</fields>
</register>
<register>
<dim>8</dim>
<dimIncrement>2</dimIncrement>
<dimIndex>0-7</dimIndex>
<name>TDR1%s</name>
<description>Timer data register 0%s</description>
<addressOffset>0x190</addressOffset>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<resetMask>0xFFFF</resetMask>
</register>
<register>
<name>TDR11L</name>
<description>Timer data lower register 11</description>
<alternateRegister>TDR11</alternateRegister>
<addressOffset>0x192</addressOffset>
<size>8</size>
</register>
<register>
<name>TDR11H</name>
<description>Timer data higher register 11</description>
<alternateRegister>TDR11</alternateRegister>
<addressOffset>0x193</addressOffset>
<size>8</size>
</register>
<register>
<name>TDR13L</name>
<description>Timer data lower register 13</description>
<alternateRegister>TDR13</alternateRegister>
<addressOffset>0x196</addressOffset>
<size>8</size>
</register>
<register>
<name>TDR13H</name>
<description>Timer data higher register 13</description>
<alternateRegister>TDR13</alternateRegister>
<addressOffset>0x197</addressOffset>
<size>8</size>
</register>
</registers>
</peripheral>
<!-- TMA -->
<peripheral>
<name>TMA</name>
<version>1.0</version>
<description>General Purpose Timer A</description>
<groupName>TMA</groupName>
<baseAddress>0x40042240</baseAddress>
<size>8</size>
<access>read-write</access>
<addressBlock>
<offset>0</offset>
<size>0x0D0</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>TMA</name>
<description>TMA interrupt request </description>
<value>26</value>
</interrupt>
<registers>
<register>
<name>TACR0</name>
<description>Timer control register 0</description>
<addressOffset>0x000</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0xFF</resetMask>
<fields>
<field>
<name>TSTART</name>
<description>Timer count start</description>
<bitRange>[0:0]</bitRange>
</field>
<field>
<name>TCSTF</name>
<description>Timer count status flag</description>
<bitRange>[1:1]</bitRange>
</field>
<field>
<name>TSTOP</name>
<description>Timer count forced stop</description>
<bitRange>[2:2]</bitRange>
</field>
<field>
<name>TEDGF</name>
<description>Active edge flag</description>
<bitRange>[4:4]</bitRange>
</field>
<field>
<name>TUNDF</name>
<description>Timer underflow flag</description>
<bitRange>[5:5]</bitRange>
</field>
</fields>
</register>
<register>
<name>TAIOC0</name>
<description>Timer I/O control register 0</description>
<addressOffset>0x001</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0xFF</resetMask>
<fields>
<field>
<name>TEDGSEL</name>
<description>I/O polarity switch</description>
<bitRange>[0:0]</bitRange>
</field>
<field>
<name>TOENA</name>
<description>TAO output enable</description>
<bitRange>[2:2]</bitRange>
</field>
<field>
<name>TIPF</name>
<description>TAIO input filter select</description>
<bitRange>[5:4]</bitRange>
</field>
<field>
<name>TIOGT</name>
<description>TAIO count control</description>
<bitRange>[7:6]</bitRange>
</field>
</fields>
</register>
<register>
<name>TAMR0</name>
<description>Timer mode register 0</description>
<addressOffset>0x002</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0xFF</resetMask>
<fields>
<field>
<name>TMOD</name>
<description>Operation mode select</description>
<bitRange>[2:0]</bitRange>
</field>
<field>
<name>TEDGPL</name>
<description>TAIO edge polarity select</description>
<bitRange>[3:3]</bitRange>
</field>
<field>
<name>TCK</name>
<description>Timer count source select</description>
<bitRange>[6:4]</bitRange>
</field>
</fields>
</register>
<register>
<name>TAISR0</name>
<description>Timer event pin select register 0</description>
<addressOffset>0x003</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0xFF</resetMask>
<fields>
<field>
<name>RCCPSEL</name>
<description>Timer output signal select</description>
<bitRange>[2:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>TA0</name>
<description>Timer counter register 0</description>
<addressOffset>0x0C0</addressOffset>
<size>16</size>
<resetValue>0xFFFF</resetValue>
<resetMask>0xFFFF</resetMask>
</register>
</registers>
</peripheral>
<!-- TMB -->
<peripheral>
<name>TMB</name>
<version>1.0</version>
<description>General Purpose Timer B</description>
<groupName>TMB</groupName>
<baseAddress>0x40042650</baseAddress>
<size>8</size>
<access>read-write</access>
<addressBlock>
<offset>0</offset>
<size>0x0D0</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>TMB</name>
<description>TMB interrupt request</description>
<value>29</value>
</interrupt>
<registers>
<register>
<name>TBMR</name>
<description>Timer mode register</description>
<addressOffset>0x000</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0xFF</resetMask>
<fields>
<field>
<name>TBPWM</name>
<description>PWM mode select</description>
<bitRange>[0:0]</bitRange>
</field>
<field>
<name>TBMDF</name>
<description>Phase counting mode select</description>
<bitRange>[1:1]</bitRange>
</field>
<field>
<name>TBDFA</name>
<description>Digital filer function select for TBIO0 pin</description>
<bitRange>[2:2]</bitRange>
</field>
<field>
<name>TBDFB</name>
<description>Digital filer function select for TBIO1 pin</description>
<bitRange>[3:3]</bitRange>
</field>
<field>
<name>TBDFCK</name>
<description>Digital filter function clock select</description>
<bitRange>[5:4]</bitRange>
</field>
<field>
<name>TBELCICE</name>
<description>EVENTC input capture request select</description>
<bitRange>[6:6]</bitRange>
</field>
<field>
<name>TBSTART</name>
<description>Timer count start</description>
<bitRange>[7:7]</bitRange>
</field>
</fields>
</register>
<register>
<name>TBCNTC</name>
<description>Timer count control register</description>
<addressOffset>0x001</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0xFF</resetMask>
<fields>
<field>
<name>CNTEN0</name>
<description>counter enable 0</description>
<bitRange>[0:0]</bitRange>
</field>
<field>
<name>CNTEN1</name>
<description>counter enable 1</description>
<bitRange>[1:1]</bitRange>
</field>
<field>
<name>CNTEN2</name>
<description>counter enable 2</description>
<bitRange>[2:2]</bitRange>
</field>
<field>
<name>CNTEN3</name>
<description>counter enable 3</description>
<bitRange>[3:3]</bitRange>
</field>
<field>
<name>CNTEN4</name>
<description>counter enable 4</description>
<bitRange>[4:4]</bitRange>
</field>
<field>
<name>CNTEN5</name>
<description>counter enable 5</description>
<bitRange>[5:5]</bitRange>
</field>
<field>
<name>CNTEN6</name>
<description>counter enable 6</description>
<bitRange>[6:6]</bitRange>
</field>
<field>
<name>CNTEN7</name>
<description>counter enable 7</description>
<bitRange>[7:7]</bitRange>
</field>
</fields>
</register>
<register>
<name>TBCR</name>
<description>Timer control register</description>
<addressOffset>0x002</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0x7F</resetMask>
<fields>
<field>
<name>TBTCK</name>
<description>Count source select</description>
<bitRange>[2:0]</bitRange>
</field>
<field>
<name>TBCKEG</name>
<description>External clock active edge select</description>
<bitRange>[4:3]</bitRange>
</field>
<field>
<name>TBCCLR</name>
<description>TB register clear source select</description>
<bitRange>[6:5]</bitRange>
</field>
</fields>
</register>
<register>
<name>TBIER</name>
<description>Timer interrupt enable register</description>
<addressOffset>0x003</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0x0F</resetMask>
<fields>
<field>
<name>TBIMIEA</name>
<description>Input-capture/compare-match interrupt enable A</description>
<bitRange>[0:0]</bitRange>
</field>
<field>
<name>TBIMIEB</name>
<description>Input-capture/compare-match interrupt enable B</description>
<bitRange>[1:1]</bitRange>
</field>
<field>
<name>TBUDIE</name>
<description>Underflow interrupt enable</description>
<bitRange>[2:2]</bitRange>
</field>
<field>
<name>TBOVIE</name>
<description>Overflow interrupt enable</description>
<bitRange>[3:3]</bitRange>
</field>
</fields>
</register>
<register>
<name>TBSR</name>
<description>Timer status enable register</description>
<addressOffset>0x004</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0x1F</resetMask>
<fields>
<field>
<name>TBIMFA</name>
<description>Input-capture/compare-match flag A</description>
<bitRange>[0:0]</bitRange>
</field>
<field>
<name>TBIMFB</name>
<description>Input-capture/compare-match flag B</description>
<bitRange>[1:1]</bitRange>
</field>
<field>
<name>TBUDF</name>
<description>Underflow flag</description>
<bitRange>[2:2]</bitRange>
</field>
<field>
<name>TBOVF</name>
<description>Overflow flag</description>
<bitRange>[3:3]</bitRange>
</field>
<field>
<name>TBDIRF</name>
<description>Count direction flag</description>
<bitRange>[4:4]</bitRange>
</field>
</fields>
</register>
<register>
<name>TBIOR</name>
<description>Timer I/O control register</description>
<addressOffset>0x005</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0xFF</resetMask>
<fields>
<field>
<name>TBIOA</name>
<description>TBGRA mode select and control</description>
<bitRange>[2:0]</bitRange>
</field>
<field>
<name>TBBUFA</name>
<description>TBGRC register function select</description>
<bitRange>[3:3]</bitRange>
</field>
<field>
<name>TBIOB</name>
<description>TBGRB mode select and control</description>
<bitRange>[6:4]</bitRange>
</field>
<field>
<name>TBBUFB</name>
<description>TBGRD register function select</description>
<bitRange>[7:7]</bitRange>
</field>
</fields>
</register>
<register>
<name>TB</name>
<description>Timer counter register</description>
<addressOffset>0x006</addressOffset>
<size>16</size>
<resetValue>0x0000</resetValue>
<resetMask>0xFFFF</resetMask>
</register>
<register>
<dim>4</dim>
<dimIncrement>2</dimIncrement>
<dimIndex>A-D</dimIndex>
<name>TBGR%s</name>
<description>Timer general register %s</description>
<addressOffset>0x008</addressOffset>
<size>16</size>
<resetValue>0xFFFF</resetValue>
<resetMask>0xFFFF</resetMask>
</register>
</registers>
</peripheral>
<!-- TMC -->
<peripheral>
<name>TMC</name>
<version>1.0</version>
<description>General Purpose Timer C</description>
<groupName>TMC</groupName>
<baseAddress>0x40042C50</baseAddress>
<size>8</size>
<access>read-write</access>
<addressBlock>
<offset>0</offset>
<size>0x010</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>TMC</name>
<description>TMC interrupt request</description>
<value>30</value>
</interrupt>
<registers>
<register>
<name>TC</name>
<description>Timer counter register</description>
<addressOffset>0x000</addressOffset>
<size>16</size>
<resetValue>0x0000</resetValue>
<resetMask>0xFFFF</resetMask>
</register>
<register>
<name>TCBUF</name>
<description>Timer count buffer register</description>
<addressOffset>0x002</addressOffset>
<size>16</size>
<resetValue>0x0000</resetValue>
<resetMask>0xFFFF</resetMask>
</register>
<register>
<name>TCCR1</name>
<description>Timer control register 1</description>
<addressOffset>0x004</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0xFF</resetMask>
<fields>
<field>
<name>OVIE</name>
<description>Enables overflow interrupt</description>
<bitRange>[0:0]</bitRange>
</field>
<field>
<name>TM_TRIG</name>
<description>Selects a hardware start trigger from timer M</description>
<bitRange>[1:1]</bitRange>
</field>
<field>
<name>TRIG_MD_HW</name>
<description>Selects operation in a count mode selected by a trigger from timer M</description>
<bitRange>[2:2]</bitRange>
</field>
<field>
<name>TRIG_MD_SW</name>
<description>Signal for enabling TC counter reset by software</description>
<bitRange>[3:3]</bitRange>
</field>
<field>
<name>START_MD</name>
<description>Selects count start source</description>
<bitRange>[4:4]</bitRange>
</field>
<field>
<name>TCK</name>
<description>Selects count source</description>
<bitRange>[7:5]</bitRange>
</field>
</fields>
</register>
<register>
<name>TCCR2</name>
<description>Timer control register 2</description>
<addressOffset>0x005</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0x07</resetMask>
<fields>
<field>
<name>TSTART</name>
<description>counter start</description>
<bitRange>[0:0]</bitRange>
</field>
<field>
<name>CMP1_TCR</name>
<description>Selects operation to be performed when a trigger is generated from comparator 1</description>
<bitRange>[2:1]</bitRange>
</field>
</fields>
</register>
<register>
<name>TCSR</name>
<description>Timer status register</description>
<addressOffset>0x006</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0x03</resetMask>
<fields>
<field>
<name>TCOVF</name>
<description>Overflow status of TC counter </description>
<bitRange>[0:0]</bitRange>
</field>
<field>
<name>TCSB</name>
<description>Counter status flag</description>
<bitRange>[1:1]</bitRange>
</field>
</fields>
</register>
</registers>
</peripheral>
<!-- TMM -->
<peripheral>
<name>TMM</name>
<version>1.0</version>
<description>BLDC Motor control Timer M</description>
<groupName>TMM</groupName>
<baseAddress>0x40042A60</baseAddress>
<size>8</size>
<access>read-write</access>
<addressBlock>
<offset>0</offset>
<size>0x2000</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>TMM0</name>
<description>TMM channel 0 interrupt request</description>
<value>27</value>
</interrupt>
<interrupt>
<name>TMM1</name>
<description>TMM channel 1 interrupt request</description>
<value>28</value>
</interrupt>
<registers>
<register>
<name>TMELC</name>
<description>Timer ELC register</description>
<addressOffset>0x000</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0x33</resetMask>
<fields>
<field>
<name>ELCICE0</name>
<description>ELC event input 0 select for timer M input capture D0</description>
<bitRange>[0:0]</bitRange>
</field>
<field>
<name>ELCOBE0</name>
<description>ELC event input 0 enable for timer M pulse output forced cutoff</description>
<bitRange>[1:1]</bitRange>
</field>
<field>
<name>ELCICE1</name>
<description>ELC event input 1 select for timer M input capture D1</description>
<bitRange>[4:4]</bitRange>
</field>
<field>
<name>ELCOBE1</name>
<description>ELC event input 1 enable for timer M pulse output forced cutoff</description>
<bitRange>[5:5]</bitRange>
</field>
</fields>
</register>
<register>
<name>TMSTR</name>
<description>Timer start register</description>
<addressOffset>0x003</addressOffset>
<size>8</size>
<resetValue>0x008</resetValue>
<resetMask>0x0F</resetMask>
<fields>
<field>
<name>TSTART0</name>
<description>TM0 count start flag</description>
<bitRange>[0:0]</bitRange>
</field>
<field>
<name>TSTART1</name>
<description>TM1 count start flag</description>
<bitRange>[1:1]</bitRange>
</field>
<field>
<name>CSEL0</name>
<description>TM0 count operation select</description>
<bitRange>[2:2]</bitRange>
</field>
<field>
<name>CSEL1</name>
<description>TM1 count operation select</description>
<bitRange>[3:3]</bitRange>
</field>
</fields>
</register>
<register>
<name>TMMR</name>
<description>Timer mode register</description>
<addressOffset>0x004</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0xF1</resetMask>
<fields>
<field>
<name>TMSYNC</name>
<description>TMs synchronous</description>
<bitRange>[0:0]</bitRange>
</field>
<field>
<name>TMBFC0</name>
<description>TMGRC0 register function select</description>
<bitRange>[4:4]</bitRange>
</field>
<field>
<name>TMBFD0</name>
<description>TMGRD0 register function select</description>
<bitRange>[5:5]</bitRange>
</field>
<field>
<name>TMBFC1</name>
<description>TMGRC1 register function select</description>
<bitRange>[6:6]</bitRange>
</field>
<field>
<name>TMBFD1</name>
<description>TMGRD1 register function select</description>
<bitRange>[7:7]</bitRange>
</field>
</fields>
</register>
<register>
<name>TMPMR</name>
<description>PWM function select register</description>
<addressOffset>0x005</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0x77</resetMask>
<fields>
<field>
<name>TMPWMB0</name>
<description>PWM function of TMIOB0 select</description>
<bitRange>[0:0]</bitRange>
</field>
<field>
<name>TMPWMC0</name>
<description>PWM function of TMIOC0 select</description>
<bitRange>[1:1]</bitRange>
</field>
<field>
<name>TMPWMD0</name>
<description>PWM function of TMIOD0 select</description>
<bitRange>[2:2]</bitRange>
</field>
<field>
<name>TMPWMB1</name>
<description>PWM function of TMIOB1 select</description>
<bitRange>[4:4]</bitRange>
</field>
<field>
<name>TMPWMC1</name>
<description>PWM function of TMIOC1 select</description>
<bitRange>[5:5]</bitRange>
</field>
<field>
<name>TMPWMD1</name>
<description>PWM function of TMIOD1 select</description>
<bitRange>[6:6]</bitRange>
</field>
</fields>
</register>
<register>
<name>TMFCR</name>
<description>Timer function control register</description>
<addressOffset>0x006</addressOffset>
<size>8</size>
<resetValue>0x80</resetValue>
<resetMask>0xCF</resetMask>
<fields>
<field>
<name>CMD</name>
<description>Combination mode select</description>
<bitRange>[1:0]</bitRange>
</field>
<field>
<name>OLS0</name>
<description>Phase output level select</description>
<bitRange>[2:2]</bitRange>
</field>
<field>
<name>OLS1</name>
<description>Counter-Phase output level select</description>
<bitRange>[3:3]</bitRange>
</field>
<field>
<name>STCLK</name>
<description>External clock input select</description>
<bitRange>[6:6]</bitRange>
</field>
<field>
<name>PWM3</name>
<description>PWM3 mode select</description>
<bitRange>[7:7]</bitRange>
</field>
</fields>
</register>
<register>
<name>TMOER1</name>
<description>Timer output master enable register 1</description>
<addressOffset>0x007</addressOffset>
<size>8</size>
<resetValue>0xFF</resetValue>
<resetMask>0xFF</resetMask>
<fields>
<field>
<name>EA0</name>
<description>TMIOA0 output disable</description>
<bitRange>[0:0]</bitRange>
</field>
<field>
<name>EB0</name>
<description>TMIOB0 output disable</description>
<bitRange>[1:1]</bitRange>
</field>
<field>
<name>EC0</name>
<description>TMIOC0 output disable</description>
<bitRange>[2:2]</bitRange>
</field>
<field>
<name>ED0</name>
<description>TMIOD0 output disable</description>
<bitRange>[3:3]</bitRange>
</field>
<field>
<name>EA1</name>
<description>TMIOA1 output disable</description>
<bitRange>[4:4]</bitRange>
</field>
<field>
<name>EB1</name>
<description>TMIOB1 output disable</description>
<bitRange>[5:5]</bitRange>
</field>
<field>
<name>EC1</name>
<description>TMIOC1 output disable</description>
<bitRange>[6:6]</bitRange>
</field>
<field>
<name>ED1</name>
<description>TMIOD1 output disable</description>
<bitRange>[7:7]</bitRange>
</field>
</fields>
</register>
<register>
<name>TMOER2</name>
<description>Timer output master enable register 2</description>
<addressOffset>0x008</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0x81</resetMask>
<fields>
<field>
<name>TMSHUTS</name>
<description>Forced cutoff flag</description>
<bitRange>[0:0]</bitRange>
</field>
<field>
<name>TMPTO</name>
<description>INTP0 pin of pulse output forced cutoff signal input enabled</description>
<bitRange>[7:7]</bitRange>
</field>
</fields>
</register>
<register>
<name>TMOCR</name>
<description>Timer output control register</description>
<addressOffset>0x009</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0xFF</resetMask>
<fields>
<field>
<name>TOA0</name>
<description>TMIOA0 initial output level select</description>
<bitRange>[0:0]</bitRange>
</field>
<field>
<name>TOB0</name>
<description>TMIOB0 initial output level select</description>
<bitRange>[1:1]</bitRange>
</field>
<field>
<name>TOC0</name>
<description>TMIOC0 initial output level select</description>
<bitRange>[2:2]</bitRange>
</field>
<field>
<name>TOD0</name>
<description>TMIOD0 initial output level select</description>
<bitRange>[3:3]</bitRange>
</field>
<field>
<name>TOA1</name>
<description>TMIOA1 initial output level select</description>
<bitRange>[4:4]</bitRange>
</field>
<field>
<name>TOB1</name>
<description>TMIOB1 initial output level select</description>
<bitRange>[5:5]</bitRange>
</field>
<field>
<name>TOC1</name>
<description>TMIOC1 initial output level select</description>
<bitRange>[6:6]</bitRange>
</field>
<field>
<name>TOD1</name>
<description>TMIOD1 initial output level select</description>
<bitRange>[7:7]</bitRange>
</field>
</fields>
</register>
<register>
<name>TMDF0</name>
<description>Digital filter function select register 0</description>
<addressOffset>0x00A</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0xCF</resetMask>
<fields>
<field>
<name>DFA</name>
<description>TMIOAi pin digital filter function select</description>
<bitRange>[0:0]</bitRange>
</field>
<field>
<name>DFB</name>
<description>TMIOBi pin digital filter function select</description>
<bitRange>[1:1]</bitRange>
</field>
<field>
<name>DFC</name>
<description>TMIOCi pin digital filter function select</description>
<bitRange>[2:2]</bitRange>
</field>
<field>
<name>DFD</name>
<description>TMIODi pin digital filter function select</description>
<bitRange>[3:3]</bitRange>
</field>
<field>
<name>DFCK</name>
<description>Clock select for digital filter function</description>
<bitRange>[7:6]</bitRange>
</field>
</fields>
</register>
<register derivedFrom="TMDF0">
<name>TMDF1</name>
<description>Digital filter function select register 1</description>
<addressOffset>0x00B</addressOffset>
</register>
<register>
<name>TMCR0</name>
<description>Timer control register 0</description>
<addressOffset>0x010</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0xFF</resetMask>
<fields>
<field>
<name>TCK</name>
<description>Count source select</description>
<bitRange>[2:0]</bitRange>
</field>
<field>
<name>CKEG</name>
<description>External clock edge select</description>
<bitRange>[4:3]</bitRange>
</field>
<field>
<name>CCLR</name>
<description>TMi counter clear select</description>
<bitRange>[7:5]</bitRange>
</field>
</fields>
</register>
<register derivedFrom="TMCR0">
<name>TMCR1</name>
<description>Timer control register 1</description>
<addressOffset>0x020</addressOffset>
</register>
<register>
<name>TMIORA0</name>
<description>Timer I/O control register A0</description>
<addressOffset>0x011</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0x77</resetMask>
<fields>
<field>
<name>IOA</name>
<description>TMGRA mode control</description>
<bitRange>[2:0]</bitRange>
</field>
<field>
<name>IOB</name>
<description>TMGRB mode control</description>
<bitRange>[6:4]</bitRange>
</field>
</fields>
</register>
<register derivedFrom="TMIORA0">
<name>TMIORA1</name>
<description>Timer I/O control register A1</description>
<addressOffset>0x021</addressOffset>
</register>
<register>
<name>TMIORC0</name>
<description>Timer I/O control register C0</description>
<addressOffset>0x012</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0xFF</resetMask>
<fields>
<field>
<name>IOC</name>
<description>TMGRC mode control</description>
<bitRange>[3:0]</bitRange>
</field>
<field>
<name>IOD</name>
<description>TMGRD mode control</description>
<bitRange>[7:4]</bitRange>
</field>
</fields>
</register>
<register derivedFrom="TMIORC0">
<name>TMIORC1</name>
<description>Timer I/O control register C1</description>
<addressOffset>0x022</addressOffset>
</register>
<register>
<name>TMSR0</name>
<description>Timer status register 0</description>
<addressOffset>0x013</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0x1F</resetMask>
<fields>
<field>
<name>IMFA</name>
<description>Input capture/compare match flag A</description>
<bitRange>[0:0]</bitRange>
</field>
<field>
<name>IMFB</name>
<description>Input capture/compare match flag B</description>
<bitRange>[1:1]</bitRange>
</field>
<field>
<name>IMFC</name>
<description>Input capture/compare match flag C</description>
<bitRange>[2:2]</bitRange>
</field>
<field>
<name>IMFD</name>
<description>Input capture/compare match flag D</description>
<bitRange>[3:3]</bitRange>
</field>
<field>
<name>OVF</name>
<description>Overflow flag</description>
<bitRange>[4:4]</bitRange>
</field>
</fields>
</register>
<register derivedFrom="TMSR0">
<name>TMSR1</name>
<description>Timer status register 1</description>
<addressOffset>0x023</addressOffset>
<resetMask>0x3F</resetMask>
<fields>
<field>
<name>UDF</name>
<description>Underflow flag</description>
<bitRange>[5:5]</bitRange>
</field>
</fields>
</register>
<register>
<name>TMIER0</name>
<description>Timer interrupt enable register 0</description>
<addressOffset>0x014</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0x1F</resetMask>
<fields>
<field>
<name>IMIEA</name>
<description>Input capture/compare match interrupt enable A</description>
<bitRange>[0:0]</bitRange>
</field>
<field>
<name>IMIEB</name>
<description>Input capture/compare match interrupt enable B</description>
<bitRange>[1:1]</bitRange>
</field>
<field>
<name>IMIEC</name>
<description>Input capture/compare match interrupt enable C</description>
<bitRange>[2:2]</bitRange>
</field>
<field>
<name>IMIED</name>
<description>Input capture/compare match interrupt enable D</description>
<bitRange>[3:3]</bitRange>
</field>
<field>
<name>OVIE</name>
<description>Overflow/underflow interrupt enable</description>
<bitRange>[4:4]</bitRange>
</field>
</fields>
</register>
<register derivedFrom="TMIER0">
<name>TMIER1</name>
<description>Timer interrupt enable register 1</description>
<addressOffset>0x024</addressOffset>
</register>
<register>
<name>TMPOCR0</name>
<description>PWM output level control register 0</description>
<addressOffset>0x015</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0x07</resetMask>
<fields>
<field>
<name>POLB</name>
<description>PWM output level control B</description>
<bitRange>[0:0]</bitRange>
</field>
<field>
<name>POLC</name>
<description>PWM output level control C</description>
<bitRange>[1:1]</bitRange>
</field>
<field>
<name>POLD</name>
<description>PWM output level control D</description>
<bitRange>[2:2]</bitRange>
</field>
</fields>
</register>
<register derivedFrom="TMPOCR0">
<name>TMPOCR1</name>
<description>PWM output level control register 1</description>
<addressOffset>0x025</addressOffset>
</register>
<register>
<name>TM0</name>
<description>Timer M counter 0</description>
<addressOffset>0x016</addressOffset>
<size>16</size>
<resetValue>0x0000</resetValue>
<resetMask>0xFFFF</resetMask>
</register>
<register derivedFrom="TM0">
<name>TM1</name>
<description>Timer M counter 1</description>
<addressOffset>0x026</addressOffset>
</register>
<register>
<name>TMGRA0</name>
<description>Timer M general register A0</description>
<addressOffset>0x018</addressOffset>
<size>16</size>
<resetValue>0xFFFF</resetValue>
<resetMask>0xFFFF</resetMask>
</register>
<register derivedFrom="TMGRA0">
<name>TMGRA1</name>
<description>Timer M general register A1</description>
<addressOffset>0x028</addressOffset>
</register>
<register>
<name>TMGRB0</name>
<description>Timer M general register B0</description>
<addressOffset>0x01A</addressOffset>
<size>16</size>
<resetValue>0xFFFF</resetValue>
<resetMask>0xFFFF</resetMask>
</register>
<register derivedFrom="TMGRB0">
<name>TMGRB1</name>
<description>Timer M general register B1</description>
<addressOffset>0x02A</addressOffset>
</register>
<register>
<name>TMGRC0</name>
<description>Timer M general register C0</description>
<addressOffset>0x0F8</addressOffset>
<size>16</size>
<resetValue>0xFFFF</resetValue>
<resetMask>0xFFFF</resetMask>
</register>
<register derivedFrom="TMGRC0">
<name>TMGRC1</name>
<description>Timer M general register C1</description>
<addressOffset>0x0FC</addressOffset>
</register>
<register>
<name>TMGRD0</name>
<description>Timer M general register D0</description>
<addressOffset>0x0FA</addressOffset>
<size>16</size>
<resetValue>0xFFFF</resetValue>
<resetMask>0xFFFF</resetMask>
</register>
<register derivedFrom="TMGRD0">
<name>TMGRD1</name>
<description>Timer M general register D1</description>
<addressOffset>0x0FE</addressOffset>
</register>
<register>
<name>OPCTL0</name>
<description>PWMOPA control register 0</description>
<addressOffset>0x11F8</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0x7F</resetMask>
<fields>
<field>
<name>HS_SEL</name>
<description>Output forced cutoff release mode selection</description>
<bitRange>[0:0]</bitRange>
</field>
<field>
<name>HZ_REL</name>
<description>When software release is selected: Output cutoff release control</description>
<bitRange>[1:1]</bitRange>
</field>
<field>
<name>ACT</name>
<description>When software release is selected: Software release timing selection</description>
<bitRange>[2:2]</bitRange>
</field>
<field>
<name>IN_SEL</name>
<description>Cutoff source selection</description>
<bitRange>[4:3]</bitRange>
</field>
<field>
<name>IN_EG</name>
<description>Output forced cutoff source edge/output forced cutoff release edge selection</description>
<bitRange>[5:5]</bitRange>
</field>
<field>
<name>HAZAD_SET</name>
<description>Output cutoff hazard control selection</description>
<bitRange>[6:6]</bitRange>
</field>
</fields>
</register>
<register>
<name>OPDF0</name>
<description>PWMOPA cutoff control register 0</description>
<addressOffset>0x11F9</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0xFF</resetMask>
<fields>
<field>
<name>DFA0</name>
<description>TMIOA0 pin output forced cutoff control</description>
<bitRange>[1:0]</bitRange>
</field>
<field>
<name>DFB0</name>
<description>TMIOB0 pin output forced cutoff control</description>
<bitRange>[3:2]</bitRange>
</field>
<field>
<name>DFC0</name>
<description>TMIOC0 pin output forced cutoff control</description>
<bitRange>[5:4]</bitRange>
</field>
<field>
<name>DFD0</name>
<description>TMIOD0 pin output forced cutoff control</description>
<bitRange>[7:6]</bitRange>
</field>
</fields>
</register>
<register>
<name>OPDF1</name>
<description>PWMOPA cutoff control register 1</description>
<addressOffset>0x11FA</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0xFF</resetMask>
<fields>
<field>
<name>DFA1</name>
<description>TMIOA1 pin output forced cutoff control</description>
<bitRange>[1:0]</bitRange>
</field>
<field>
<name>DFB1</name>
<description>TMIOB1 pin output forced cutoff control</description>
<bitRange>[3:2]</bitRange>
</field>
<field>
<name>DFC1</name>
<description>TMIOC1 pin output forced cutoff control</description>
<bitRange>[5:4]</bitRange>
</field>
<field>
<name>DFD1</name>
<description>TMIOD1 pin output forced cutoff control</description>
<bitRange>[7:6]</bitRange>
</field>
</fields>
</register>
<register>
<name>OPEDGE</name>
<description>PWMOPA edge selection register</description>
<addressOffset>0x11FB</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0x03</resetMask>
<fields>
<field>
<name>EG</name>
<description>Output forced cutoff release edge selection</description>
<bitRange>[1:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>OPSR</name>
<description>PWMOPA status register</description>
<addressOffset>0x11FC</addressOffset>
<size>8</size>
<access>read-only</access>
<resetValue>0x00</resetValue>
<resetMask>0x07</resetMask>
<fields>
<field>
<name>HZIF0</name>
<description>Output cutoff source state</description>
<bitRange>[0:0]</bitRange>
</field>
<field>
<name>HZOF0</name>
<description>cutoff state</description>
<bitRange>[1:1]</bitRange>
</field>
<field>
<name>HZOF1</name>
<description>cutoff state</description>
<bitRange>[2:2]</bitRange>
</field>
</fields>
</register>
</registers>
</peripheral>
<!-- RTC -->
<peripheral>
<name>RTC</name>
<version>1.0</version>
<description>Real-Time clock</description>
<groupName>RTC</groupName>
<baseAddress>0x40044F00</baseAddress>
<size>8</size>
<access>read-write</access>
<addressBlock>
<offset>0</offset>
<size>0x100</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>RTC</name>
<description>Real-Time Clock interrupt request</description>
<value>22</value>
</interrupt>
<!--interrupt>
<name>IT</name>
<description>15-bit interval timer interrupt request</description>
<value>54</value>
</interrupt-->
<registers>
<register>
<name>SUBCUD</name>
<description>Watch error correction register</description>
<addressOffset>0x034</addressOffset>
<size>16</size>
<resetValue>0x0000</resetValue>
<resetMask>0xFFFF</resetMask>
<fields>
<field>
<name>F</name>
<description>watch error correction value</description>
<bitRange>[12:0]</bitRange>
</field>
<field>
<name>DEV</name>
<description>watch error correction timing</description>
<bitRange>[15:15]</bitRange>
</field>
</fields>
</register>
<register>
<name>ITMC</name>
<description>15-bit interval timer control register</description>
<addressOffset>0x050</addressOffset>
<size>16</size>
<resetValue>0x7FFF</resetValue>
<resetMask>0xFFFF</resetMask>
<fields>
<field>
<name>ITCMP</name>
<description>15-bit interval timer compare value</description>
<bitRange>[14:0]</bitRange>
</field>
<field>
<name>RINTE</name>
<description>15-bit interval timer operation control</description>
<bitRange>[15:15]</bitRange>
</field>
</fields>
</register>
<register>
<name>SEC</name>
<description>Second count register</description>
<addressOffset>0x052</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0x7F</resetMask>
</register>
<register>
<name>MIN</name>
<description>Minute count register</description>
<addressOffset>0x053</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0x7F</resetMask>
</register>
<register>
<name>HOUR</name>
<description>Hour count register</description>
<addressOffset>0x054</addressOffset>
<size>8</size>
<resetValue>0x12</resetValue>
<resetMask>0x3F</resetMask>
</register>
<register>
<name>WEEK</name>
<description>Week count register</description>
<addressOffset>0x055</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0x07</resetMask>
</register>
<register>
<name>DAY</name>
<description>Day count register</description>
<addressOffset>0x056</addressOffset>
<size>8</size>
<resetValue>0x01</resetValue>
<resetMask>0x3F</resetMask>
</register>
<register>
<name>MONTH</name>
<description>Month count register</description>
<addressOffset>0x057</addressOffset>
<size>8</size>
<resetValue>0x01</resetValue>
<resetMask>0x1F</resetMask>
</register>
<register>
<name>YEAR</name>
<description>Year count register</description>
<addressOffset>0x058</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0xFF</resetMask>
</register>
<register>
<name>ALARMWM</name>
<description>Alarm minute register</description>
<addressOffset>0x05A</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0x7F</resetMask>
</register>
<register>
<name>ALARMWH</name>
<description>Alarm hour register</description>
<addressOffset>0x05B</addressOffset>
<size>8</size>
<resetValue>0x12</resetValue>
<resetMask>0x3F</resetMask>
</register>
<register>
<name>ALARMWW</name>
<description>Alarm week register</description>
<addressOffset>0x05C</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0x3F</resetMask>
</register>
<register>
<name>RTCC0</name>
<description>Real-time clock control register 0</description>
<addressOffset>0x05D</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0xAF</resetMask>
<fields>
<field>
<name>CT</name>
<description>Constant-period interrupt (INTRTC) selection</description>
<bitRange>[2:0]</bitRange>
</field>
<field>
<name>AMPM</name>
<description>Selection of 12-/24-hour system</description>
<bitRange>[3:3]</bitRange>
</field>
<field>
<name>RCLOE</name>
<description>RTC1HZ pin output enable</description>
<bitRange>[5:5]</bitRange>
</field>
<field>
<name>RTCE</name>
<description>Real-time clock operation control</description>
<bitRange>[7:7]</bitRange>
</field>
</fields>
</register>
<register>
<name>RTCC1</name>
<description>Real-time clock control register 1</description>
<addressOffset>0x05E</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0xDB</resetMask>
<fields>
<field>
<name>RWAIT</name>
<description>Wait control of real-time clock</description>
<bitRange>[0:0]</bitRange>
</field>
<field>
<name>RWST</name>
<description>Wait status flag of real-time clock</description>
<bitRange>[1:1]</bitRange>
</field>
<field>
<name>RIFG</name>
<description>Constant-period interrupt status flag</description>
<bitRange>[3:3]</bitRange>
</field>
<field>
<name>WAFG</name>
<description>Alarm detection status flag</description>
<bitRange>[4:4]</bitRange>
</field>
<field>
<name>WALIE</name>
<description>Control of alarm interrupt (INTRTC) function operation</description>
<bitRange>[6:6]</bitRange>
</field>
<field>
<name>WALE</name>
<description>Alarm operation control</description>
<bitRange>[7:7]</bitRange>
</field>
</fields>
</register>
</registers>
</peripheral>
<!-- PCBZ -->
<peripheral>
<name>PCBZ</name>
<version>1.0</version>
<description>Clock/Buzzer output controller</description>
<groupName>PCBZ</groupName>
<baseAddress>0x40040FA0</baseAddress>
<size>8</size>
<access>read-write</access>
<addressBlock>
<offset>0</offset>
<size>0x010</size>
<usage>registers</usage>
</addressBlock>
<registers>
<register>
<name>CKS0</name>
<description>Clock output select registers 0</description>
<addressOffset>0x005</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0xFF</resetMask>
<fields>
<field>
<name>CCS</name>
<description>PCLBUZn output clock select</description>
<bitRange>[2:0]</bitRange>
</field>
<field>
<name>CSEL</name>
<description>PCLBUZn output clock select</description>
<bitRange>[3:3]</bitRange>
</field>
<field>
<name>PCLOE</name>
<description>PCLBUZn pin output enable</description>
<bitRange>[7:7]</bitRange>
</field>
</fields>
</register>
<register derivedFrom="CKS0">
<name>CKS1</name>
<description>Clock output select registers 1</description>
<addressOffset>0x006</addressOffset>
</register>
</registers>
</peripheral>
<!-- WDT -->
<peripheral>
<name>WDT</name>
<version>1.0</version>
<description>Watchdog Timer with window</description>
<groupName>WDT</groupName>
<baseAddress>0x40021000</baseAddress>
<size>8</size>
<access>read-write</access>
<addressBlock>
<offset>0</offset>
<size>0x010</size>
<usage>registers</usage>
</addressBlock>
<registers>
<register>
<name>WDTE</name>
<description>Watchdog timer enable register</description>
<addressOffset>0x001</addressOffset>
<resetMask>0xAC</resetMask>
</register>
</registers>
</peripheral>
<!-- ADC -->
<peripheral>
<name>ADC</name>
<version>1.0</version>
<description>A/D Converter</description>
<groupName>ADC</groupName>
<baseAddress>0x40045000</baseAddress>
<size>8</size>
<access>read-write</access>
<addressBlock>
<offset>0</offset>
<size>0x100</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>ADC</name>
<description>ADC interrupt request</description>
<value>21</value>
</interrupt>
<registers>
<register>
<name>ADM0</name>
<description>A/D mode register 0</description>
<addressOffset>0x000</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0xB9</resetMask>
<fields>
<field>
<name>ADCE</name>
<description>A/D enable </description>
<bitRange>[0:0]</bitRange>
</field>
<field>
<name>FR</name>
<description>A/D conversion clock (fAD) select</description>
<bitRange>[5:3]</bitRange>
</field>
<field>
<name>ADCS</name>
<description>A/D conversion operation control</description>
<bitRange>[7:7]</bitRange>
</field>
</fields>
</register>
<register>
<name>ADM1</name>
<description>A/D mode register 1</description>
<addressOffset>0x002</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0x8B</resetMask>
<fields>
<field>
<name>ADMODE</name>
<description>A/D mode select </description>
<bitRange>[1:0]</bitRange>
</field>
<field>
<name>ADSCM</name>
<description>A/D conversion mode</description>
<bitRange>[3:3]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Sequential</name>
<description>Sequential conversion mode</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>OneShot</name>
<description>One-shot conversion mode</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>ADMD</name>
<description>A/D conversion channel select mode</description>
<bitRange>[7:7]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Select</name>
<description>Select mode</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Scan</name>
<description>Scan mode</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>ADM2</name>
<description>A/D mode register 2</description>
<addressOffset>0x004</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0xEA</resetMask>
<fields>
<field>
<name>CHRDE</name>
<description>output CH number in A/D conversion result in Scan mode</description>
<bitRange>[1:1]</bitRange>
</field>
<field>
<name>ADRCK</name>
<description>the upper limit and lower limit conversion result values</description>
<bitRange>[3:3]</bitRange>
</field>
<field>
<name>ADREFM</name>
<description>Selection of the - side reference voltage of A/D converter</description>
<bitRange>[5:5]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>VSS</name>
<description>Supplied from VSS </description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>AVREFM</name>
<description>Supplied from AVREFM</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>ADREFP</name>
<description>Selection of the + side reference voltage of A/D converter</description>
<bitRange>[7:6]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>VDD</name>
<description>Supplied from VDD </description>
<value>0b00</value>
</enumeratedValue>
<enumeratedValue>
<name>AVREFP0</name>
<description>Supplied from AVREFP</description>
<value>0b01</value>
</enumeratedValue>
<enumeratedValue>
<name>AVREFP1</name>
<description>Supplied from inside AVREF of A/D</description>
<value>0b10</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>ADTRG</name>
<description>A/D mode register 2</description>
<addressOffset>0x006</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0x33</resetMask>
<fields>
<field>
<name>ADTMD</name>
<description>A/D conversion trigger mode</description>
<bitRange>[7:6]</bitRange>
</field>
<field>
<name>ADTRS</name>
<description>A/D hard trigger select </description>
<bitRange>[1:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>ADS</name>
<description>Analog input channel specification register</description>
<addressOffset>0x008</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0xFF</resetMask>
<fields>
<field>
<name>ADSCHn</name>
<description>Select ADC channel n</description>
<bitRange>[3:4]</bitRange>
<access>read-write</access>
</field>
<field>
<name>ADCHPGA0</name>
<description>Selection of channel n for PGA0</description>
<bitRange>[5:5]</bitRange>
<access>read-write</access>
</field>
<field>
<name>ADCHPGA1</name>
<description>Selection of channel n for PGA1</description>
<bitRange>[6:6]</bitRange>
<access>read-write</access>
</field>
<field>
<name>ADISS</name>
<description>Selection of ADC channel</description>
<bitRange>[7:7]</bitRange>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>ADCR</name>
<description>12-bit A/D conversion result register</description>
<addressOffset>0x00E</addressOffset>
<size>16</size>
<resetValue>0x0000</resetValue>
<resetMask>0x0FFF</resetMask>
</register>
<register>
<name>ADCRH</name>
<description>Higher 8-bit A/D conversion result register</description>
<alternateRegister>ADCR</alternateRegister>
<addressOffset>0x00F</addressOffset>
<size>8</size>
</register>
<register>
<name>ADUL</name>
<description>Conversion result comparison upper limit setting register</description>
<addressOffset>0x00B</addressOffset>
<size>8</size>
<resetValue>0xFF</resetValue>
<resetMask>0xFF</resetMask>
</register>
<register>
<name>ADLL</name>
<description>Conversion result comparison lower limit setting register</description>
<addressOffset>0x00A</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0xFF</resetMask>
</register>
<register>
<name>ADTES</name>
<description>A/D test register</description>
<addressOffset>0x010</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0x07</resetMask>
</register>
<register>
<name>ADFLG</name>
<description>A/D flag register</description>
<addressOffset>0x016</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0x1F</resetMask>
</register>
<register>
<name>ADNSMP</name>
<description>A/D sampling time control register</description>
<addressOffset>0x00C</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0xFF</resetMask>
</register>
<register>
<name>ADSMPWAIT</name>
<description>A/D sampling wait control register</description>
<addressOffset>0x015</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0xFF</resetMask>
</register>
<register>
<name>ADNDIS</name>
<description>A/D charge/discharge control register</description>
<addressOffset>0x011</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0xFF</resetMask>
</register>
</registers>
</peripheral>
<!-- DAC -->
<peripheral>
<name>DAC</name>
<version>1.0</version>
<description>D/A Converter</description>
<groupName>DAC</groupName>
<baseAddress>0x40044700</baseAddress>
<size>8</size>
<access>read-write</access>
<addressBlock>
<offset>0</offset>
<size>0x100</size>
<usage>registers</usage>
</addressBlock>
<registers>
<register>
<name>DACS0</name>
<description>D/A conversion value setting register 0</description>
<addressOffset>0x034</addressOffset>
<resetValue>0x00</resetValue>
<resetMask>0xFF</resetMask>
</register>
<register derivedFrom="DACS0">
<name>DACS1</name>
<description>D/A conversion value setting register 1</description>
<addressOffset>0x035</addressOffset>
</register>
<register>
<name>DAM</name>
<description>D/A conversion mode register</description>
<addressOffset>0x036</addressOffset>
<resetValue>0x00</resetValue>
<resetMask>0xFF</resetMask>
<fields>
<field>
<name>DAMD0</name>
<description>D/A converter operation mode selection</description>
<bitRange>[0:0]</bitRange>
</field>
<field>
<name>DAMD1</name>
<description>D/A converter operation mode selection</description>
<bitRange>[1:1]</bitRange>
</field>
<field>
<name>DACE0</name>
<description>D/A converter operation control</description>
<bitRange>[4:4]</bitRange>
</field>
<field>
<name>DACE1</name>
<description>D/A converter operation control</description>
<bitRange>[5:5]</bitRange>
</field>
</fields>
</register>
</registers>
</peripheral>
<!-- CMP -->
<peripheral>
<name>CMP</name>
<version>1.0</version>
<description>Comparator</description>
<groupName>CMP</groupName>
<baseAddress>0x40043840</baseAddress>
<size>8</size>
<access>read-write</access>
<addressBlock>
<offset>0</offset>
<size>0x100</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>CMP0</name>
<description>CMP0 interrupt request</description>
<value>24</value>
</interrupt>
<interrupt>
<name>CMP1</name>
<description>CMP1 interrupt request</description>
<value>25</value>
</interrupt>
<registers>
<register>
<name>COMPMDR</name>
<description>Comparator mode setting register</description>
<addressOffset>0x000</addressOffset>
<resetValue>0x00</resetValue>
<resetMask>0x99</resetMask>
<fields>
<field>
<name>C0ENB</name>
<description>Comparator 0 operation enable</description>
<bitRange>[0:0]</bitRange>
</field>
<field>
<name>C0MON</name>
<description>Comparator 0 monitor flag</description>
<bitRange>[3:3]</bitRange>
</field>
<field>
<name>C1ENB</name>
<description>Comparator 1 operation enable</description>
<bitRange>[4:4]</bitRange>
</field>
<field>
<name>C1MON</name>
<description>Comparator 1 monitor flag</description>
<bitRange>[7:7]</bitRange>
</field>
</fields>
</register>
<register>
<name>COMPFIR</name>
<description>Comparator filter control register</description>
<addressOffset>0x001</addressOffset>
<resetValue>0x00</resetValue>
<resetMask>0xFF</resetMask>
<fields>
<field>
<name>C0FCK</name>
<description>Comparator 0 filter selection</description>
<bitRange>[1:0]</bitRange>
</field>
<field>
<name>C0EPO</name>
<description>Comparator 0 edge polarity switching</description>
<bitRange>[2:2]</bitRange>
</field>
<field>
<name>C0EDG</name>
<description>Comparator 0 edge detection selection</description>
<bitRange>[3:3]</bitRange>
</field>
<field>
<name>C1FCK</name>
<description>Comparator 1 filter selection</description>
<bitRange>[5:4]</bitRange>
</field>
<field>
<name>C1EPO</name>
<description>Comparator 1 edge polarity switching</description>
<bitRange>[6:6]</bitRange>
</field>
<field>
<name>C1EDG</name>
<description>Comparator 1 edge detection selection</description>
<bitRange>[7:7]</bitRange>
</field>
</fields>
</register>
<register>
<name>COMPOCR</name>
<description>Comparator output control register</description>
<addressOffset>0x002</addressOffset>
<resetValue>0x00</resetValue>
<resetMask>0xF7</resetMask>
<fields>
<field>
<name>C0IE</name>
<description>Comparator 0 interrupt request enable</description>
<bitRange>[0:0]</bitRange>
</field>
<field>
<name>C0OE</name>
<description>VOUT0 pin output enable</description>
<bitRange>[1:1]</bitRange>
</field>
<field>
<name>C0OP</name>
<description>VOUT0 output polarity selection</description>
<bitRange>[2:2]</bitRange>
</field>
<field>
<name>C1IE</name>
<description>Comparator 1 interrupt request enable</description>
<bitRange>[4:4]</bitRange>
</field>
<field>
<name>C1OE</name>
<description>VOUT1 pin output enable</description>
<bitRange>[5:5]</bitRange>
</field>
<field>
<name>C1OP</name>
<description>VOUT1 output polarity selection</description>
<bitRange>[6:6]</bitRange>
</field>
<field>
<name>C1OTWMD</name>
<description>TIMER WINDOW output mode control bit of comparator 1</description>
<bitRange>[7:7]</bitRange>
</field>
</fields>
</register>
<register>
<name>CVRCTL</name>
<description>Comparator internal reference voltage control register</description>
<addressOffset>0x003</addressOffset>
<resetValue>0x00</resetValue>
<resetMask>0x33</resetMask>
<fields>
<field>
<name>CVRVS0</name>
<description>Power supply selection bit for internal reference voltage</description>
<bitRange>[0:0]</bitRange>
</field>
<field>
<name>CVRE0</name>
<description>Control bit for internal reference voltage 0</description>
<bitRange>[1:1]</bitRange>
</field>
<field>
<name>CVRVS1</name>
<description>Ground selection bit for internal reference voltage</description>
<bitRange>[4:4]</bitRange>
</field>
<field>
<name>CVRE1</name>
<description>Control bit for internal reference voltage 1</description>
<bitRange>[5:5]</bitRange>
</field>
</fields>
</register>
<register>
<name>C0RVM</name>
<description>Comparator internal reference voltage select register 0</description>
<addressOffset>0x004</addressOffset>
<resetValue>0x00</resetValue>
<resetMask>0xFF</resetMask>
</register>
<register derivedFrom="C0RVM">
<name>C1RVM</name>
<description>Comparator internal reference voltage select register 1</description>
<addressOffset>0x005</addressOffset>
</register>
<register>
<name>CMPSEL0</name>
<description>Comparator 0 input signal selection control register</description>
<addressOffset>0x00A</addressOffset>
<resetValue>0x00</resetValue>
<resetMask>0x83</resetMask>
<fields>
<field>
<name>C0REFS</name>
<description>Selection of the input signal on the negative side of Comparator 0</description>
<bitRange>[1:0]</bitRange>
</field>
<field>
<name>CMP0SEL</name>
<description>Selection of the input signal on the positive side of Comparator 0</description>
<bitRange>[7:7]</bitRange>
</field>
</fields>
</register>
<register>
<name>CMPSEL1</name>
<description>Comparator 1 input signal selection control register</description>
<addressOffset>0x00B</addressOffset>
<resetValue>0x00</resetValue>
<resetMask>0xC7</resetMask>
<fields>
<field>
<name>C1REFS</name>
<description>Selection of the input signal on the negative side of Comparator 1</description>
<bitRange>[2:0]</bitRange>
</field>
<field>
<name>CMP1SEL</name>
<description>Selection of the input signal on the positive side of Comparator 1</description>
<bitRange>[7:6]</bitRange>
</field>
</fields>
</register>
<register>
<name>CMP0HY</name>
<description>Comparator 0 hysteresis control register</description>
<addressOffset>0x00E</addressOffset>
<resetValue>0x00</resetValue>
<resetMask>0x33</resetMask>
<fields>
<field>
<name>C0HYSLS</name>
<description>Selection of the hysteresis method of Comparator 0</description>
<bitRange>[1:0]</bitRange>
</field>
<field>
<name>C0HYSVS</name>
<description>Selection of the hysteresis level of Comparator 0</description>
<bitRange>[5:4]</bitRange>
</field>
</fields>
</register>
<register>
<name>CMP1HY</name>
<description>Comparator 1 hysteresis control register</description>
<addressOffset>0x00F</addressOffset>
<resetValue>0x00</resetValue>
<resetMask>0x33</resetMask>
<fields>
<field>
<name>C1HYSLS</name>
<description>Selection of the hysteresis method of Comparator 1</description>
<bitRange>[1:0]</bitRange>
</field>
<field>
<name>C1HYSVS</name>
<description>Selection of the hysteresis level of Comparator 1</description>
<bitRange>[5:4]</bitRange>
</field>
</fields>
</register>
</registers>
</peripheral>
<!-- PGA -->
<peripheral>
<name>PGA</name>
<version>1.0</version>
<description>Programmable Gain Amplifier</description>
<groupName>PGA</groupName>
<baseAddress>0x40043840</baseAddress>
<alternatePeripheral>CMP</alternatePeripheral>
<size>8</size>
<access>read-write</access>
<addressBlock>
<offset>0</offset>
<size>0x100</size>
<usage>registers</usage>
</addressBlock>
<registers>
<register>
<name>PGA0CTL</name>
<description>PGA 0 control register</description>
<addressOffset>0x006</addressOffset>
<resetValue>0x00</resetValue>
<resetMask>0x8B</resetMask>
<fields>
<field>
<name>PGAVG</name>
<description>Programmable gain amplifier amplification factor selection</description>
<bitRange>[2:0]</bitRange>
</field>
<field>
<name>PVRVS</name>
<description>GND selection of feedback resistance of the programmable gain amplifier</description>
<bitRange>[3:3]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>PGAGND0</name>
<description>PGA0GND selected</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>VSS</name>
<description>VSS pin selected</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PGAEN</name>
<description>Programmable gain amplifier operation control</description>
<bitRange>[7:7]</bitRange>
</field>
</fields>
</register>
<register>
<name>PGA1CTL</name>
<description>PGA 1 control register</description>
<addressOffset>0x007</addressOffset>
<resetValue>0x00</resetValue>
<resetMask>0x8B</resetMask>
<fields>
<field>
<name>PGAVG</name>
<description>Programmable gain amplifier amplification factor selection</description>
<bitRange>[2:0]</bitRange>
</field>
<field>
<name>PVRVS</name>
<description>GND selection of feedback resistance of the programmable gain amplifier</description>
<bitRange>[3:3]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>VSS</name>
<description>VSS pin selected</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>PGA1GND</name>
<description>PGA0GND selected</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PGAEN</name>
<description>Programmable gain amplifier operation control</description>
<bitRange>[7:7]</bitRange>
</field>
</fields>
</register>
<!-- <register derivedFrom="PGA0CTL">
<name>PGA1CTL</name>
<description>PGA 1 control register</description>
<addressOffset>0x007</addressOffset>
</register> -->
</registers>
</peripheral>
<!-- SCI0 -->
<peripheral>
<name>SCI0</name>
<version>1.0</version>
<description>Serial Communication Interface 0 with UART, SPI and simplified I2C supported</description>
<groupName>SCI0</groupName>
<baseAddress>0x40041100</baseAddress>
<size>16</size>
<access>read-write</access>
<addressBlock>
<offset>0</offset>
<size>0x300</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>ST0</name>
<description>UART0 transmission transfer end or buffer empty</description>
<value>10</value>
</interrupt>
<!---
<interrupt>
<name>SPI00</name>
<description>SPI00 transfer end or buffer empty</description>
<value>10</value>
</interrupt>
<interrupt>
<name>IIC00</name>
<description>IIC00 transfer end</description>
<value>10</value>
</interrupt>
-->
<interrupt>
<name>SR0</name>
<description>UART0 rerception transfer</description>
<value>11</value>
</interrupt>
<!---
<interrupt>
<name>SPI01</name>
<description>SPI01 transfer end or buffer empty</description>
<value>11</value>
</interrupt>
<interrupt>
<name>IIC01</name>
<description>IIC01 transfer end</description>
<value>11</value>
</interrupt>
-->
<interrupt>
<name>SRE0</name>
<description>UART0 rerception communication error occurrence</description>
<value>12</value>
</interrupt>
<interrupt>
<name>ST1</name>
<description>UART1 transmission transfer end or buffer empty</description>
<value>13</value>
</interrupt>
<!---
<interrupt>
<name>SPI10</name>
<description>SPI10 transfer end or buffer empty</description>
<value>13</value>
</interrupt>
<interrupt>
<name>IIC10</name>
<description>IIC10 transfer end</description>
<value>13</value>
</interrupt>
-->
<interrupt>
<name>SR1</name>
<description>UART1 rerception transfer</description>
<value>14</value>
</interrupt>
<!---
<interrupt>
<name>SPI11</name>
<description>SPI11 transfer end or buffer empty</description>
<value>14</value>
</interrupt>
<interrupt>
<name>IIC11</name>
<description>IIC11 transfer end</description>
<value>14</value>
</interrupt>
-->
<interrupt>
<name>SRE1</name>
<description>UART1 rerception communication error occurrence</description>
<value>15</value>
</interrupt>
<registers>
<register>
<name>SSR00</name>
<description>Serial status register mn</description>
<addressOffset>0x000</addressOffset>
<access>read-only</access>
<resetValue>0x0000</resetValue>
<resetMask>0x0067</resetMask>
<fields>
<field>
<name>OVF</name>
<description>Overrun error detection flag of channel n</description>
<bitRange>[0:0]</bitRange>
</field>
<field>
<name>PEF</name>
<description>Parity error detection flag of channel n</description>
<bitRange>[1:1]</bitRange>
</field>
<field>
<name>FEF</name>
<description>Framing error detection flag of channel n</description>
<bitRange>[2:2]</bitRange>
</field>
<field>
<name>BFF</name>
<description>Buffer register status indication flag of channel n</description>
<bitRange>[5:5]</bitRange>
</field>
<field>
<name>TSF</name>
<description>Communication status indication flag of channel n</description>
<bitRange>[6:6]</bitRange>
</field>
</fields>
</register>
<register derivedFrom="SSR00">
<name>SSR01</name>
<description>Serial status register mn</description>
<addressOffset>0x002</addressOffset>
</register>
<register derivedFrom="SSR00">
<name>SSR02</name>
<description>Serial status register mn</description>
<addressOffset>0x004</addressOffset>
</register>
<register derivedFrom="SSR00">
<name>SSR03</name>
<description>Serial status register mn</description>
<addressOffset>0x006</addressOffset>
</register>
<register>
<name>SIR00</name>
<description>Serial flag clear trigger register mn</description>
<addressOffset>0x008</addressOffset>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<resetMask>0x0007</resetMask>
<fields>
<field>
<name>OVCT</name>
<description>Clear trigger of overrun error flag of channel n</description>
<bitRange>[0:0]</bitRange>
</field>
<field>
<name>PECT</name>
<description>Clear trigger of parity error flag of channel n</description>
<bitRange>[1:1]</bitRange>
</field>
<field>
<name>FECT</name>
<description>Clear trigger of framing error flag of channel n</description>
<bitRange>[2:2]</bitRange>
</field>
</fields>
</register>
<register derivedFrom="SIR00">
<name>SIR01</name>
<description>Serial flag clear trigger register mn</description>
<addressOffset>0x00A</addressOffset>
</register>
<register derivedFrom="SIR00">
<name>SIR02</name>
<description>Serial flag clear trigger register mn</description>
<addressOffset>0x00C</addressOffset>
</register>
<register derivedFrom="SIR00">
<name>SIR03</name>
<description>Serial flag clear trigger register mn</description>
<addressOffset>0x00E</addressOffset>
</register>
<register>
<name>SMR00</name>
<description>Serial mode register mn</description>
<addressOffset>0x010</addressOffset>
<access>read-write</access>
<resetValue>0x0020</resetValue>
<resetMask>0xC147</resetMask>
<fields>
<field>
<name>MD</name>
<description>Setting of operation mode of channel n </description>
<bitRange>[3:0]</bitRange>
</field>
<field>
<name>SIS</name>
<description>Controls inversion of level of receive data of channel n in UART mode</description>
<bitRange>[6:6]</bitRange>
</field>
<field>
<name>STS</name>
<description>Selection of start trigger source</description>
<bitRange>[8:8]</bitRange>
</field>
<field>
<name>CCS</name>
<description>Selection of transfer clock (fTCLK) of channel n</description>
<bitRange>[14:14]</bitRange>
</field>
<field>
<name>CKS</name>
<description>Selection of operation clock (fMCK) of channel n</description>
<bitRange>[15:15]</bitRange>
</field>
</fields>
</register>
<register derivedFrom="SMR00">
<name>SMR01</name>
<description>Serial mode register mn</description>
<addressOffset>0x012</addressOffset>
</register>
<register derivedFrom="SMR00">
<name>SMR02</name>
<description>Serial mode register mn</description>
<addressOffset>0x014</addressOffset>
</register>
<register derivedFrom="SMR00">
<name>SMR03</name>
<description>Serial mode register mn</description>
<addressOffset>0x016</addressOffset>
</register>
<register>
<name>SCR00</name>
<description>Serial communication operation setting register mn</description>
<addressOffset>0x018</addressOffset>
<access>read-write</access>
<resetValue>0x0087</resetValue>
<resetMask>0xF7B3</resetMask>
<fields>
<field>
<name>DLS</name>
<description>Setting of data length in SPI and UART modes</description>
<bitRange>[1:0]</bitRange>
</field>
<field>
<name>SLC</name>
<description>Setting of stop bit in UART mode</description>
<bitRange>[5:4]</bitRange>
</field>
<field>
<name>DIR</name>
<description>Selection of data transfer sequence in SPI and UART modes</description>
<bitRange>[7:7]</bitRange>
</field>
<field>
<name>PTC</name>
<description>Setting of parity bit in UART mode</description>
<bitRange>[9:8]</bitRange>
</field>
<field>
<name>EOC</name>
<description>Mask control of error interrupt signal (INTSREx (x = 0 to 2))</description>
<bitRange>[10:10]</bitRange>
</field>
<field>
<name>CKP</name>
<description>Selection of clock phase in SPI mode</description>
<bitRange>[12:12]</bitRange>
</field>
<field>
<name>DAP</name>
<description>Selection of data phase in SPI mode</description>
<bitRange>[13:13]</bitRange>
</field>
<field>
<name>RXE</name>
<description>Reception enable</description>
<bitRange>[14:14]</bitRange>
</field>
<field>
<name>TXE</name>
<description>Transmission enable</description>
<bitRange>[15:15]</bitRange>
</field>
</fields>
</register>
<register derivedFrom="SCR00">
<name>SCR01</name>
<description>Serial communication operation setting register mn</description>
<addressOffset>0x01A</addressOffset>
</register>
<register derivedFrom="SCR00">
<name>SCR02</name>
<description>Serial communication operation setting register mn</description>
<addressOffset>0x01C</addressOffset>
</register>
<register derivedFrom="SCR00">
<name>SCR03</name>
<description>Serial communication operation setting register mn</description>
<addressOffset>0x01E</addressOffset>
</register>
<register>
<name>SE0</name>
<description>Serial channel enable status register m</description>
<addressOffset>0x020</addressOffset>
<access>read-only</access>
<resetValue>0x0000</resetValue>
<resetMask>0x000F</resetMask>
<fields>
<field>
<name>SE00</name>
<description>Indication of operation enable/stop status of channel 0</description>
<bitRange>[0:0]</bitRange>
</field>
<field>
<name>SE01</name>
<description>Indication of operation enable/stop status of channel 1</description>
<bitRange>[1:1]</bitRange>
</field>
<field>
<name>SE02</name>
<description>Indication of operation enable/stop status of channel 2</description>
<bitRange>[2:2]</bitRange>
</field>
<field>
<name>SE03</name>
<description>Indication of operation enable/stop status of channel 3</description>
<bitRange>[3:3]</bitRange>
</field>
</fields>
</register>
<register>
<name>SS0</name>
<description>Serial channel start register 0</description>
<addressOffset>0x022</addressOffset>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<resetMask>0x000F</resetMask>
<fields>
<field>
<name>SS00</name>
<description>Operation start trigger of channel 0</description>
<bitRange>[0:0]</bitRange>
</field>
<field>
<name>SS01</name>
<description>Operation start trigger of channel 1</description>
<bitRange>[1:1]</bitRange>
</field>
<field>
<name>SS02</name>
<description>Operation start trigger of channel 2</description>
<bitRange>[2:2]</bitRange>
</field>
<field>
<name>SS03</name>
<description>Operation start trigger of channel 3</description>
<bitRange>[3:3]</bitRange>
</field>
</fields>
</register>
<register>
<name>ST0</name>
<description>Serial channel stop register 0</description>
<addressOffset>0x024</addressOffset>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<resetMask>0x000F</resetMask>
<fields>
<field>
<name>ST00</name>
<description>Operation stop trigger of channel 0</description>
<bitRange>[0:0]</bitRange>
</field>
<field>
<name>ST01</name>
<description>Operation stop trigger of channel 1</description>
<bitRange>[1:1]</bitRange>
</field>
<field>
<name>ST02</name>
<description>Operation stop trigger of channel 2</description>
<bitRange>[2:2]</bitRange>
</field>
<field>
<name>ST03</name>
<description>Operation stop trigger of channel 3</description>
<bitRange>[3:3]</bitRange>
</field>
</fields>
</register>
<register>
<name>SPS0</name>
<description>Serial clock select register 0</description>
<addressOffset>0x026</addressOffset>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<resetMask>0x00FF</resetMask>
<fields>
<field>
<name>PRS00</name>
<description>Prescaler 0</description>
<bitRange>[3:0]</bitRange>
</field>
<field>
<name>PRS01</name>
<description>Prescaler 1</description>
<bitRange>[7:4]</bitRange>
</field>
</fields>
</register>
<register>
<name>SO0</name>
<description>Serial output register 0</description>
<addressOffset>0x028</addressOffset>
<access>read-write</access>
<resetValue>0x0F0F</resetValue>
<resetMask>0x0F0F</resetMask>
<fields>
<field>
<name>SO00</name>
<description>Serial data output of channel 0</description>
<bitRange>[0:0]</bitRange>
</field>
<field>
<name>SO01</name>
<description>Serial data output of channel 1</description>
<bitRange>[1:1]</bitRange>
</field>
<field>
<name>SO02</name>
<description>Serial data output of channel 2</description>
<bitRange>[2:2]</bitRange>
</field>
<field>
<name>SO03</name>
<description>Serial data output of channel 3</description>
<bitRange>[3:3]</bitRange>
</field>
<field>
<name>CKO00</name>
<description>Serial clock output of channel 0</description>
<bitRange>[8:8]</bitRange>
</field>
<field>
<name>CKO01</name>
<description>Serial clock output of channel 1</description>
<bitRange>[9:9]</bitRange>
</field>
<field>
<name>CKO02</name>
<description>Serial clock output of channel 2</description>
<bitRange>[10:10]</bitRange>
</field>
<field>
<name>CKO03</name>
<description>Serial clock output of channel 3</description>
<bitRange>[11:11]</bitRange>
</field>
</fields>
</register>
<register>
<name>SOE0</name>
<description>Serial output enable register 0</description>
<addressOffset>0x02A</addressOffset>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<resetMask>0x000F</resetMask>
<fields>
<field>
<name>SOE00</name>
<description>Serial output enable of channel 0</description>
<bitRange>[0:0]</bitRange>
</field>
<field>
<name>SOE01</name>
<description>Serial output enable of channel 1</description>
<bitRange>[1:1]</bitRange>
</field>
<field>
<name>SOE02</name>
<description>Serial output enable of channel 2</description>
<bitRange>[2:2]</bitRange>
</field>
<field>
<name>SOE03</name>
<description>Serial output enable of channel 3</description>
<bitRange>[3:3]</bitRange>
</field>
</fields>
</register>
<register>
<name>SOL0</name>
<description>Serial output level register 0</description>
<addressOffset>0x034</addressOffset>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<resetMask>0x0005</resetMask>
<fields>
<field>
<name>SOL00</name>
<description>Selects inversion of the level of the transmit data of channel n in UART mode</description>
<bitRange>[0:0]</bitRange>
</field>
<field>
<name>SOL02</name>
<description>Selects inversion of the level of the transmit data of channel n in UART mode</description>
<bitRange>[2:2]</bitRange>
</field>
</fields>
</register>
<register>
<dim>4</dim>
<dimIncrement>2</dimIncrement>
<dimIndex>0-3</dimIndex>
<name>SDR0%s</name>
<description>Serial data register 0%s</description>
<addressOffset>0x210</addressOffset>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<resetMask>0xFFFF</resetMask>
</register>
<!-- <register>
<dim>2</dim>
<dimIncrement>2</dimIncrement>
<dimIndex>2-3</dimIndex>
<name>SDR0%s</name>
<description>Serial data register 0%s</description>
<addressOffset>0x244</addressOffset>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<resetMask>0xFFFF</resetMask>
</register> -->
<register>
<name>SIO00</name>
<description>SPI data register</description>
<alternateRegister>SDR00</alternateRegister>
<addressOffset>0x210</addressOffset>
<size>8</size>
</register>
<register>
<name>SIO01</name>
<description>SPI data register</description>
<alternateRegister>SDR01</alternateRegister>
<addressOffset>0x212</addressOffset>
<size>8</size>
</register>
<register>
<name>SIO10</name>
<description>SPI data register</description>
<alternateRegister>SDR02</alternateRegister>
<addressOffset>0x214</addressOffset>
<size>8</size>
</register>
<register>
<name>SIO11</name>
<description>SPI data register</description>
<alternateRegister>SDR03</alternateRegister>
<addressOffset>0x216</addressOffset>
<size>8</size>
</register>
<register>
<name>TXD0</name>
<description>UART transmit data register</description>
<alternateRegister>SDR00</alternateRegister>
<addressOffset>0x210</addressOffset>
<size>8</size>
</register>
<register>
<name>RXD0</name>
<description>UART receive data register</description>
<alternateRegister>SDR01</alternateRegister>
<addressOffset>0x212</addressOffset>
<size>8</size>
</register>
<register>
<name>TXD1</name>
<description>UART transmit data register</description>
<alternateRegister>SDR02</alternateRegister>
<addressOffset>0x214</addressOffset>
<size>8</size>
</register>
<register>
<name>RXD1</name>
<description>UART receive data register</description>
<alternateRegister>SDR03</alternateRegister>
<addressOffset>0x216</addressOffset>
<size>8</size>
</register>
</registers>
</peripheral>
<!-- SCI1 -->
<peripheral>
<name>SCI1</name>
<version>1.0</version>
<description>Serial Communication Interface 1 with UART, SPI and simplified I2C supported</description>
<groupName>SCI1</groupName>
<baseAddress>0x40041400</baseAddress>
<size>16</size>
<access>read-write</access>
<addressBlock>
<offset>0</offset>
<size>0x300</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>ST2</name>
<description>UART2 transmission transfer end or buffer empty</description>
<value>7</value>
</interrupt>
<!---
<interrupt>
<name>SPI20</name>
<description>SPI20 transfer end or buffer empty</description>
<value>7</value>
</interrupt>
<interrupt>
<name>IIC20</name>
<description>IIC20 transfer end</description>
<value>7</value>
</interrupt>
-->
<interrupt>
<name>SR2</name>
<description>UART2 rerception transfer</description>
<value>8</value>
</interrupt>
<!---
<interrupt>
<name>SPI21</name>
<description>SPI21 transfer end or buffer empty</description>
<value>8</value>
</interrupt>
<interrupt>
<name>IIC21</name>
<description>IIC21 transfer end</description>
<value>8</value>
</interrupt>
-->
<interrupt>
<name>SRE2</name>
<description>UART2 rerception communication error occurrence</description>
<value>9</value>
</interrupt>
<registers>
<register>
<name>SSR10</name>
<description>Serial status register mn</description>
<addressOffset>0x000</addressOffset>
<access>read-only</access>
<resetValue>0x0000</resetValue>
<resetMask>0x0067</resetMask>
<fields>
<field>
<name>OVF</name>
<description>Overrun error detection flag of channel n</description>
<bitRange>[0:0]</bitRange>
</field>
<field>
<name>PEF</name>
<description>Parity error detection flag of channel n</description>
<bitRange>[1:1]</bitRange>
</field>
<field>
<name>FEF</name>
<description>Framing error detection flag of channel n</description>
<bitRange>[2:2]</bitRange>
</field>
<field>
<name>BFF</name>
<description>Buffer register status indication flag of channel n</description>
<bitRange>[5:5]</bitRange>
</field>
<field>
<name>TSF</name>
<description>Communication status indication flag of channel n</description>
<bitRange>[6:6]</bitRange>
</field>
</fields>
</register>
<register derivedFrom="SSR10">
<name>SSR11</name>
<description>Serial status register mn</description>
<addressOffset>0x002</addressOffset>
</register>
<register>
<name>SIR10</name>
<description>Serial flag clear trigger register mn</description>
<addressOffset>0x004</addressOffset>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<resetMask>0x0007</resetMask>
<fields>
<field>
<name>OVCT</name>
<description>Clear trigger of overrun error flag of channel n</description>
<bitRange>[0:0]</bitRange>
</field>
<field>
<name>PECT</name>
<description>Clear trigger of parity error flag of channel n</description>
<bitRange>[1:1]</bitRange>
</field>
<field>
<name>FECT</name>
<description>Clear trigger of framing error flag of channel n</description>
<bitRange>[2:2]</bitRange>
</field>
</fields>
</register>
<register derivedFrom="SIR10">
<name>SIR11</name>
<description>Serial flag clear trigger register mn</description>
<addressOffset>0x006</addressOffset>
</register>
<register>
<name>SMR10</name>
<description>Serial mode register mn</description>
<addressOffset>0x008</addressOffset>
<access>read-write</access>
<resetValue>0x0020</resetValue>
<resetMask>0xC147</resetMask>
<fields>
<field>
<name>MD</name>
<description>Setting of operation mode of channel n </description>
<bitRange>[2:0]</bitRange>
</field>
<field>
<name>SIS</name>
<description>Controls inversion of level of receive data of channel n in UART mode</description>
<bitRange>[6:6]</bitRange>
</field>
<field>
<name>STS</name>
<description>Selection of start trigger source</description>
<bitRange>[8:8]</bitRange>
</field>
<field>
<name>CCS</name>
<description>Selection of transfer clock (fTCLK) of channel n</description>
<bitRange>[14:14]</bitRange>
</field>
<field>
<name>CKS</name>
<description>Selection of operation clock (fMCK) of channel n</description>
<bitRange>[15:15]</bitRange>
</field>
</fields>
</register>
<register derivedFrom="SMR10">
<name>SMR11</name>
<description>Serial mode register mn</description>
<addressOffset>0x00A</addressOffset>
</register>
<register>
<name>SCR10</name>
<description>Serial communication operation setting register mn</description>
<addressOffset>0x00C</addressOffset>
<access>read-write</access>
<resetValue>0x0087</resetValue>
<resetMask>0xF7BF</resetMask>
<fields>
<field>
<name>DLS</name>
<description>Setting of data length in SPI and UART modes</description>
<bitRange>[3:0]</bitRange>
</field>
<field>
<name>SLC</name>
<description>Setting of stop bit in UART mode</description>
<bitRange>[5:4]</bitRange>
</field>
<field>
<name>DIR</name>
<description>Selection of data transfer sequence in SPI and UART modes</description>
<bitRange>[7:7]</bitRange>
</field>
<field>
<name>PTC</name>
<description>Setting of parity bit in UART mode</description>
<bitRange>[9:8]</bitRange>
</field>
<field>
<name>EOC</name>
<description>Mask control of error interrupt signal (INTSREx (x = 0 to 2))</description>
<bitRange>[10:10]</bitRange>
</field>
<field>
<name>CKP</name>
<description>Selection of clock phase in SPI mode</description>
<bitRange>[12:12]</bitRange>
</field>
<field>
<name>DAP</name>
<description>Selection of data phase in SPI mode</description>
<bitRange>[13:13]</bitRange>
</field>
<field>
<name>RXE</name>
<description>Reception enable</description>
<bitRange>[14:14]</bitRange>
</field>
<field>
<name>TXE</name>
<description>Transmission enable</description>
<bitRange>[15:15]</bitRange>
</field>
</fields>
</register>
<register derivedFrom="SCR10">
<name>SCR11</name>
<description>Serial communication operation setting register mn</description>
<addressOffset>0x00E</addressOffset>
</register>
<register>
<name>SE1</name>
<description>Serial channel enable status register 1</description>
<addressOffset>0x010</addressOffset>
<access>read-only</access>
<resetValue>0x0000</resetValue>
<resetMask>0x0003</resetMask>
<fields>
<field>
<name>SE10</name>
<description>Indication of operation enable/stop status of channel 0</description>
<bitRange>[0:0]</bitRange>
</field>
<field>
<name>SE11</name>
<description>Indication of operation enable/stop status of channel 1</description>
<bitRange>[1:1]</bitRange>
</field>
</fields>
</register>
<register>
<name>SS1</name>
<description>Serial channel start register 1</description>
<addressOffset>0x012</addressOffset>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<resetMask>0x0003</resetMask>
<fields>
<field>
<name>SS10</name>
<description>Operation start trigger of channel 0</description>
<bitRange>[0:0]</bitRange>
</field>
<field>
<name>SS11</name>
<description>Operation start trigger of channel 1</description>
<bitRange>[1:1]</bitRange>
</field>
</fields>
</register>
<register>
<name>ST1</name>
<description>Serial channel stop register 1</description>
<addressOffset>0x014</addressOffset>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<resetMask>0x0003</resetMask>
<fields>
<field>
<name>ST10</name>
<description>Operation stop trigger of channel 0</description>
<bitRange>[0:0]</bitRange>
</field>
<field>
<name>ST11</name>
<description>Operation stop trigger of channel 1</description>
<bitRange>[1:1]</bitRange>
</field>
</fields>
</register>
<register>
<name>SPS1</name>
<description>Serial clock select register 1</description>
<addressOffset>0x016</addressOffset>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<resetMask>0x00FF</resetMask>
<fields>
<field>
<name>PRS10</name>
<description>Prescaler 0</description>
<bitRange>[3:0]</bitRange>
</field>
<field>
<name>PRS11</name>
<description>Prescaler 1</description>
<bitRange>[7:4]</bitRange>
</field>
</fields>
</register>
<register>
<name>SO1</name>
<description>Serial output register 1</description>
<addressOffset>0x018</addressOffset>
<access>read-write</access>
<resetValue>0x0F0F</resetValue>
<resetMask>0x0F0F</resetMask>
<fields>
<field>
<name>SO10</name>
<description>Serial data output of channel 0</description>
<bitRange>[0:0]</bitRange>
</field>
<field>
<name>SO11</name>
<description>Serial data output of channel 1</description>
<bitRange>[1:1]</bitRange>
</field>
<field>
<name>CKO10</name>
<description>Serial clock output of channel 0</description>
<bitRange>[8:8]</bitRange>
</field>
<field>
<name>CKO11</name>
<description>Serial clock output of channel 1</description>
<bitRange>[9:9]</bitRange>
</field>
</fields>
</register>
<register>
<name>SOE1</name>
<description>Serial output enable register 1</description>
<addressOffset>0x01A</addressOffset>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<resetMask>0x0003</resetMask>
<fields>
<field>
<name>SOE10</name>
<description>Serial output enable of channel 0</description>
<bitRange>[0:0]</bitRange>
</field>
<field>
<name>SOE11</name>
<description>Serial output enable of channel 1</description>
<bitRange>[1:1]</bitRange>
</field>
</fields>
</register>
<register>
<name>SOL1</name>
<description>Serial output level register 1</description>
<addressOffset>0x020</addressOffset>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<resetMask>0x0001</resetMask>
<fields>
<field>
<name>SOL10</name>
<description>Selects inversion of the level of the transmit data of channel n in UART mode</description>
<bitRange>[0:0]</bitRange>
</field>
</fields>
</register>
<register>
<dim>2</dim>
<dimIncrement>2</dimIncrement>
<dimIndex>0-1</dimIndex>
<name>SDR1%s</name>
<description>Serial data register 1%s</description>
<addressOffset>0x110</addressOffset>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<resetMask>0xFFFF</resetMask>
</register>
<register>
<name>SIO20</name>
<description>SPI data register</description>
<alternateRegister>SDR10</alternateRegister>
<addressOffset>0x110</addressOffset>
<size>8</size>
</register>
<register>
<name>SIO21</name>
<description>SPI data register</description>
<alternateRegister>SDR11</alternateRegister>
<addressOffset>0x112</addressOffset>
<size>8</size>
</register>
<register>
<name>TXD2</name>
<description>UART transmit data register</description>
<alternateRegister>SDR10</alternateRegister>
<addressOffset>0x110</addressOffset>
<size>8</size>
</register>
<register>
<name>RXD2</name>
<description>UART receive data register</description>
<alternateRegister>SDR11</alternateRegister>
<addressOffset>0x112</addressOffset>
<size>8</size>
</register>
</registers>
</peripheral>
<!-- SCI2 -->
<peripheral>
<name>SCI2</name>
<version>1.0</version>
<description>Serial Communication Interface 2 with UART, SPI and simplified I2C supported</description>
<groupName>SCI2</groupName>
<baseAddress>0x40041600</baseAddress>
<size>16</size>
<access>read-write</access>
<addressBlock>
<offset>0</offset>
<size>0x300</size>
<usage>registers</usage>
</addressBlock>
<!---
<interrupt>
<name>ST3</name>
<description>UART3 transmission transfer end or buffer empty</description>
<value>39</value>
</interrupt>
<interrupt>
<name>SPI30</name>
<description>SPI30 transfer end or buffer empty</description>
<value>39</value>
</interrupt>
<interrupt>
<name>IIC30</name>
<description>IIC30 transfer end</description>
<value>39</value>
</interrupt>
<interrupt>
<name>SR3</name>
<description>UART3 rerception transfer</description>
<value>40</value>
</interrupt>
<interrupt>
<name>SPI31</name>
<description>SPI31 transfer end or buffer empty</description>
<value>40</value>
</interrupt>
<interrupt>
<name>IIC31</name>
<description>IIC31 transfer end</description>
<value>40</value>
</interrupt>
<interrupt>
<name>SRE3</name>
<description>UART3 rerception communication error occurrence</description>
<value>41</value>
</interrupt>
-->
<registers>
<register>
<name>SSR20</name>
<description>Serial status register mn</description>
<addressOffset>0x000</addressOffset>
<access>read-only</access>
<resetValue>0x0000</resetValue>
<resetMask>0x0067</resetMask>
<fields>
<field>
<name>OVF</name>
<description>Overrun error detection flag of channel n</description>
<bitRange>[0:0]</bitRange>
</field>
<field>
<name>PEF</name>
<description>Parity error detection flag of channel n</description>
<bitRange>[1:1]</bitRange>
</field>
<field>
<name>FEF</name>
<description>Framing error detection flag of channel n</description>
<bitRange>[2:2]</bitRange>
</field>
<field>
<name>BFF</name>
<description>Buffer register status indication flag of channel n</description>
<bitRange>[5:5]</bitRange>
</field>
<field>
<name>TSF</name>
<description>Communication status indication flag of channel n</description>
<bitRange>[6:6]</bitRange>
</field>
</fields>
</register>
<register derivedFrom="SSR20">
<name>SSR21</name>
<description>Serial status register mn</description>
<addressOffset>0x002</addressOffset>
</register>
<register>
<name>SIR20</name>
<description>Serial flag clear trigger register mn</description>
<addressOffset>0x004</addressOffset>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<resetMask>0x0007</resetMask>
<fields>
<field>
<name>OVCT</name>
<description>Clear trigger of overrun error flag of channel n</description>
<bitRange>[0:0]</bitRange>
</field>
<field>
<name>PECT</name>
<description>Clear trigger of parity error flag of channel n</description>
<bitRange>[1:1]</bitRange>
</field>
<field>
<name>FECT</name>
<description>Clear trigger of framing error flag of channel n</description>
<bitRange>[2:2]</bitRange>
</field>
</fields>
</register>
<register derivedFrom="SIR20">
<name>SIR21</name>
<description>Serial flag clear trigger register mn</description>
<addressOffset>0x006</addressOffset>
</register>
<register>
<name>SMR20</name>
<description>Serial mode register mn</description>
<addressOffset>0x008</addressOffset>
<access>read-write</access>
<resetValue>0x0020</resetValue>
<resetMask>0xC147</resetMask>
<fields>
<field>
<name>MD</name>
<description>Setting of operation mode of channel n </description>
<bitRange>[2:0]</bitRange>
</field>
<field>
<name>SIS</name>
<description>Controls inversion of level of receive data of channel n in UART mode</description>
<bitRange>[6:6]</bitRange>
</field>
<field>
<name>STS</name>
<description>Selection of start trigger source</description>
<bitRange>[8:8]</bitRange>
</field>
<field>
<name>CCS</name>
<description>Selection of transfer clock (fTCLK) of channel n</description>
<bitRange>[14:14]</bitRange>
</field>
<field>
<name>CKS</name>
<description>Selection of operation clock (fMCK) of channel n</description>
<bitRange>[15:15]</bitRange>
</field>
</fields>
</register>
<register derivedFrom="SMR20">
<name>SMR21</name>
<description>Serial mode register mn</description>
<addressOffset>0x00A</addressOffset>
</register>
<register>
<name>SCR20</name>
<description>Serial communication operation setting register mn</description>
<addressOffset>0x00C</addressOffset>
<access>read-write</access>
<resetValue>0x0087</resetValue>
<resetMask>0xF7BF</resetMask>
<fields>
<field>
<name>DLS</name>
<description>Setting of data length in SPI and UART modes</description>
<bitRange>[1:0]</bitRange>
</field>
<field>
<name>SLC</name>
<description>Setting of stop bit in UART mode</description>
<bitRange>[5:4]</bitRange>
</field>
<field>
<name>DIR</name>
<description>Selection of data transfer sequence in SPI and UART modes</description>
<bitRange>[7:7]</bitRange>
</field>
<field>
<name>PTC</name>
<description>Setting of parity bit in UART mode</description>
<bitRange>[9:8]</bitRange>
</field>
<field>
<name>EOC</name>
<description>Mask control of error interrupt signal (INTSREx (x = 0 to 2))</description>
<bitRange>[10:10]</bitRange>
</field>
<field>
<name>CKP</name>
<description>Selection of clock phase in SPI mode</description>
<bitRange>[12:12]</bitRange>
</field>
<field>
<name>DAP</name>
<description>Selection of data phase in SPI mode</description>
<bitRange>[13:13]</bitRange>
</field>
<field>
<name>RXE</name>
<description>Reception enable</description>
<bitRange>[14:14]</bitRange>
</field>
<field>
<name>TXE</name>
<description>Transmission enable</description>
<bitRange>[15:15]</bitRange>
</field>
</fields>
</register>
<register derivedFrom="SCR20">
<name>SCR21</name>
<description>Serial communication operation setting register mn</description>
<addressOffset>0x00E</addressOffset>
</register>
<register>
<name>SE2</name>
<description>Serial channel enable status register 2</description>
<addressOffset>0x010</addressOffset>
<access>read-only</access>
<resetValue>0x0000</resetValue>
<resetMask>0x0003</resetMask>
<fields>
<field>
<name>SE20</name>
<description>Indication of operation enable/stop status of channel 0</description>
<bitRange>[0:0]</bitRange>
</field>
<field>
<name>SE21</name>
<description>Indication of operation enable/stop status of channel 1</description>
<bitRange>[1:1]</bitRange>
</field>
</fields>
</register>
<register>
<name>SS2</name>
<description>Serial channel start register 2</description>
<addressOffset>0x012</addressOffset>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<resetMask>0x0003</resetMask>
<fields>
<field>
<name>SS20</name>
<description>Operation start trigger of channel 0</description>
<bitRange>[0:0]</bitRange>
</field>
<field>
<name>SS21</name>
<description>Operation start trigger of channel 1</description>
<bitRange>[1:1]</bitRange>
</field>
</fields>
</register>
<register>
<name>ST2</name>
<description>Serial channel stop register 2</description>
<addressOffset>0x014</addressOffset>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<resetMask>0x0003</resetMask>
<fields>
<field>
<name>ST20</name>
<description>Operation stop trigger of channel 0</description>
<bitRange>[0:0]</bitRange>
</field>
<field>
<name>ST21</name>
<description>Operation stop trigger of channel 1</description>
<bitRange>[1:1]</bitRange>
</field>
</fields>
</register>
<register>
<name>SPS2</name>
<description>Serial clock select register 0</description>
<addressOffset>0x016</addressOffset>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<resetMask>0x00FF</resetMask>
<fields>
<field>
<name>PRS20</name>
<description>Prescaler 0</description>
<bitRange>[3:0]</bitRange>
</field>
<field>
<name>PRS21</name>
<description>Prescaler 1</description>
<bitRange>[7:4]</bitRange>
</field>
</fields>
</register>
<register>
<name>SO2</name>
<description>Serial output register 0</description>
<addressOffset>0x018</addressOffset>
<access>read-write</access>
<resetValue>0x0F0F</resetValue>
<resetMask>0x0F0F</resetMask>
<fields>
<field>
<name>SO20</name>
<description>Serial data output of channel 0</description>
<bitRange>[0:0]</bitRange>
</field>
<field>
<name>SO21</name>
<description>Serial data output of channel 1</description>
<bitRange>[1:1]</bitRange>
</field>
<field>
<name>CKO20</name>
<description>Serial clock output of channel 0</description>
<bitRange>[8:8]</bitRange>
</field>
<field>
<name>CKO21</name>
<description>Serial clock output of channel 1</description>
<bitRange>[9:9]</bitRange>
</field>
</fields>
</register>
<register>
<name>SOE2</name>
<description>Serial output enable register 2</description>
<addressOffset>0x01A</addressOffset>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<resetMask>0x0003</resetMask>
<fields>
<field>
<name>SOE20</name>
<description>Serial output enable of channel 0</description>
<bitRange>[0:0]</bitRange>
</field>
<field>
<name>SOE21</name>
<description>Serial output enable of channel 1</description>
<bitRange>[1:1]</bitRange>
</field>
</fields>
</register>
<register>
<name>SOL2</name>
<description>Serial output level register 2</description>
<addressOffset>0x020</addressOffset>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<resetMask>0x0001</resetMask>
<fields>
<field>
<name>SOL20</name>
<description>Selects inversion of the level of the transmit data of channel n in UART mode</description>
<bitRange>[0:0]</bitRange>
</field>
</fields>
</register>
<register>
<dim>2</dim>
<dimIncrement>2</dimIncrement>
<dimIndex>0-1</dimIndex>
<name>SDR2%s</name>
<description>Serial data register 2%s</description>
<addressOffset>0x110</addressOffset>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<resetMask>0xFFFF</resetMask>
</register>
<register>
<name>SIO30</name>
<description>SPI data register</description>
<alternateRegister>SDR20</alternateRegister>
<addressOffset>0x110</addressOffset>
<size>8</size>
</register>
<register>
<name>SIO31</name>
<description>SPI data register</description>
<alternateRegister>SDR21</alternateRegister>
<addressOffset>0x112</addressOffset>
<size>8</size>
</register>
<register>
<name>TXD3</name>
<description>UART transmit data register</description>
<alternateRegister>SDR20</alternateRegister>
<addressOffset>0x110</addressOffset>
<size>8</size>
</register>
<register>
<name>RXD3</name>
<description>UART receive data register</description>
<alternateRegister>SDR21</alternateRegister>
<addressOffset>0x112</addressOffset>
<size>8</size>
</register>
</registers>
</peripheral>
<!-- IICA0 -->
<peripheral>
<name>IICA0</name>
<version>1.0</version>
<description>Serial Interface I2C with multimaster and wakeup supported</description>
<groupName>IICA0</groupName>
<baseAddress>0x40041A30</baseAddress>
<size>8</size>
<access>read-write</access>
<addressBlock>
<offset>0</offset>
<size>0x200</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>IICA0</name>
<description>IICA interrupt request</description>
<value>16</value>
</interrupt>
<registers>
<register>
<name>IICCTL00</name>
<description>IICA control register 0</description>
<addressOffset>0x000</addressOffset>
<resetValue>0x00</resetValue>
<resetMask>0xFF</resetMask>
<fields>
<field>
<name>SPT</name>
<description>Stop condition trigger</description>
<bitRange>[0:0]</bitRange>
</field>
<field>
<name>STT</name>
<description>Start condition trigger</description>
<bitRange>[1:1]</bitRange>
</field>
<field>
<name>ACKE</name>
<description>Acknowledgment control</description>
<bitRange>[2:2]</bitRange>
</field>
<field>
<name>WTIM</name>
<description>Control of wait and interrupt request generation</description>
<bitRange>[3:3]</bitRange>
</field>
<field>
<name>SPIE</name>
<description>Enable generation of interrupt request when stop condition is detected</description>
<bitRange>[4:4]</bitRange>
</field>
<field>
<name>WREL</name>
<description>Wait cancellation</description>
<bitRange>[5:5]</bitRange>
</field>
<field>
<name>LREL</name>
<description>Exit from communications</description>
<bitRange>[6:6]</bitRange>
</field>
<field>
<name>IICE</name>
<description>I2C operation enable</description>
<bitRange>[7:7]</bitRange>
</field>
</fields>
</register>
<register>
<name>IICCTL01</name>
<description>IICA control register 1</description>
<addressOffset>0x001</addressOffset>
<resetValue>0x00</resetValue>
<resetMask>0xBD</resetMask>
<fields>
<field>
<name>PRS</name>
<description>Operation clock (fMCK) contro</description>
<bitRange>[0:0]</bitRange>
<access>read-write</access>
</field>
<field>
<name>DFC</name>
<description>Digital filter operation control</description>
<bitRange>[2:2]</bitRange>
<access>read-write</access>
</field>
<field>
<name>SMC</name>
<description>Operation mode switching</description>
<bitRange>[3:3]</bitRange>
<access>read-write</access>
</field>
<field>
<name>DAD</name>
<description>Detection of SDAAn pin level (valid only when IICEn = 1)</description>
<bitRange>[4:4]</bitRange>
<access>read-only</access>
</field>
<field>
<name>CLD</name>
<description>Detection of SCLAn pin level (valid only when IICEn = 1)</description>
<bitRange>[5:5]</bitRange>
<access>read-only</access>
</field>
<field>
<name>WUP</name>
<description>Control of address match wakeup</description>
<bitRange>[7:7]</bitRange>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>IICWL0</name>
<description>IICA low-level width setting register 0</description>
<addressOffset>0x002</addressOffset>
<resetValue>0xFF</resetValue>
<resetMask>0xFF</resetMask>
</register>
<register>
<name>IICWH0</name>
<description>IICA high-level width setting register 0</description>
<addressOffset>0x003</addressOffset>
<resetValue>0xFF</resetValue>
<resetMask>0xFF</resetMask>
</register>
<register>
<name>SVA0</name>
<description>Slave address register 0</description>
<addressOffset>0x004</addressOffset>
<resetValue>0x00</resetValue>
<resetMask>0xFE</resetMask>
</register>
<register>
<name>IICA00</name>
<description>IICA shift register 00</description>
<addressOffset>0x120</addressOffset>
<resetValue>0x00</resetValue>
<resetMask>0xFF</resetMask>
</register>
<register>
<name>IICS0</name>
<description>IICA status register 0</description>
<addressOffset>0x121</addressOffset>
<access>read-only</access>
<resetValue>0x00</resetValue>
<resetMask>0xFF</resetMask>
<fields>
<field>
<name>MSTS</name>
<description>Master status check flag</description>
<bitRange>[7:7]</bitRange>
</field>
<field>
<name>ALD</name>
<description>Detection of arbitration loss</description>
<bitRange>[6:6]</bitRange>
</field>
<field>
<name>EXC</name>
<description>Detection of extension code reception</description>
<bitRange>[5:5]</bitRange>
</field>
<field>
<name>COI</name>
<description>Detection of matching addresses</description>
<bitRange>[4:4]</bitRange>
</field>
<field>
<name>TRC</name>
<description>Detection of transmit/receive status</description>
<bitRange>[3:3]</bitRange>
</field>
<field>
<name>ACKD</name>
<description>Detection of acknowledge (ACK)</description>
<bitRange>[2:2]</bitRange>
</field>
<field>
<name>STD</name>
<description>Detection of start condition</description>
<bitRange>[1:1]</bitRange>
</field>
<field>
<name>SPD</name>
<description>Detection of stop condition</description>
<bitRange>[0:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>IICF0</name>
<description>IICA flag register 0</description>
<addressOffset>0x122</addressOffset>
<access>read-write</access>
<resetValue>0x00</resetValue>
<resetMask>0xFF</resetMask>
<fields>
<field>
<name>STCF</name>
<description>STT clear flag</description>
<bitRange>[7:7]</bitRange>
<access>read-only</access>
</field>
<field>
<name>IICBSY</name>
<description>I2C bus status flag</description>
<bitRange>[6:6]</bitRange>
<access>read-only</access>
</field>
<field>
<name>STCEN</name>
<description>Initial start enable trigger</description>
<bitRange>[1:1]</bitRange>
<access>read-write</access>
</field>
<field>
<name>IICRSV</name>
<description>Communication reservation function disable bit</description>
<bitRange>[0:0]</bitRange>
<access>read-write</access>
</field>
</fields>
</register>
</registers>
</peripheral>
<!-- IICA1 -->
<peripheral>
<name>IICA1</name>
<version>1.0</version>
<description>Serial Interface I2C with multimaster and wakeup supported</description>
<groupName>IICA1</groupName>
<baseAddress>0x40046230</baseAddress>
<size>8</size>
<access>read-write</access>
<addressBlock>
<offset>0</offset>
<size>0x200</size>
<usage>registers</usage>
</addressBlock>
<!--
<interrupt>
<name>IICA1</name>
<description>IICA interrupt request</description>
<value>80</value>
</interrupt>
-->
<registers>
<register>
<name>IICCTL10</name>
<description>IICA control register 0</description>
<addressOffset>0x000</addressOffset>
<resetValue>0x00</resetValue>
<resetMask>0xFF</resetMask>
<fields>
<field>
<name>SPT</name>
<description>Stop condition trigger</description>
<bitRange>[0:0]</bitRange>
</field>
<field>
<name>STT</name>
<description>Start condition trigger</description>
<bitRange>[1:1]</bitRange>
</field>
<field>
<name>ACKE</name>
<description>Acknowledgment control</description>
<bitRange>[2:2]</bitRange>
</field>
<field>
<name>WTIM</name>
<description>Control of wait and interrupt request generation</description>
<bitRange>[3:3]</bitRange>
</field>
<field>
<name>SPIE</name>
<description>Enable generation of interrupt request when stop condition is detected</description>
<bitRange>[4:4]</bitRange>
</field>
<field>
<name>WREL</name>
<description>Wait cancellation</description>
<bitRange>[5:5]</bitRange>
</field>
<field>
<name>LREL</name>
<description>Exit from communications</description>
<bitRange>[6:6]</bitRange>
</field>
<field>
<name>IICE</name>
<description>I2C operation enable</description>
<bitRange>[7:7]</bitRange>
</field>
</fields>
</register>
<register>
<name>IICCTL11</name>
<description>IICA control register 1</description>
<addressOffset>0x001</addressOffset>
<resetValue>0x00</resetValue>
<resetMask>0xBD</resetMask>
<fields>
<field>
<name>PRS</name>
<description>Operation clock (fMCK) contro</description>
<bitRange>[0:0]</bitRange>
<access>read-write</access>
</field>
<field>
<name>DFC</name>
<description>Digital filter operation control</description>
<bitRange>[2:2]</bitRange>
<access>read-write</access>
</field>
<field>
<name>SMC</name>
<description>Operation mode switching</description>
<bitRange>[3:3]</bitRange>
<access>read-write</access>
</field>
<field>
<name>DAD</name>
<description>Detection of SDAAn pin level (valid only when IICEn = 1)</description>
<bitRange>[4:4]</bitRange>
<access>read-only</access>
</field>
<field>
<name>CLD</name>
<description>Detection of SCLAn pin level (valid only when IICEn = 1)</description>
<bitRange>[5:5]</bitRange>
<access>read-only</access>
</field>
<field>
<name>WUP</name>
<description>Control of address match wakeup</description>
<bitRange>[7:7]</bitRange>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>IICWL1</name>
<description>IICA low-level width setting register 1</description>
<addressOffset>0x002</addressOffset>
<resetValue>0xFF</resetValue>
<resetMask>0xFF</resetMask>
</register>
<register>
<name>IICWH1</name>
<description>IICA high-level width setting register 1</description>
<addressOffset>0x003</addressOffset>
<resetValue>0xFF</resetValue>
<resetMask>0xFF</resetMask>
</register>
<register>
<name>SVA1</name>
<description>Slave address register 1</description>
<addressOffset>0x004</addressOffset>
<resetValue>0x00</resetValue>
<resetMask>0xFE</resetMask>
</register>
<register>
<name>IICA10</name>
<description>IICA shift register 10</description>
<addressOffset>0x120</addressOffset>
<resetValue>0x00</resetValue>
<resetMask>0xFF</resetMask>
</register>
<register>
<name>IICS1</name>
<description>IICA status register 1</description>
<addressOffset>0x121</addressOffset>
<access>read-only</access>
<resetValue>0x00</resetValue>
<resetMask>0xFF</resetMask>
<fields>
<field>
<name>MSTS</name>
<description>Master status check flag</description>
<bitRange>[7:7]</bitRange>
</field>
<field>
<name>ALD</name>
<description>Detection of arbitration loss</description>
<bitRange>[6:6]</bitRange>
</field>
<field>
<name>EXC</name>
<description>Detection of extension code reception</description>
<bitRange>[5:5]</bitRange>
</field>
<field>
<name>COI</name>
<description>Detection of matching addresses</description>
<bitRange>[4:4]</bitRange>
</field>
<field>
<name>TRC</name>
<description>Detection of transmit/receive status</description>
<bitRange>[3:3]</bitRange>
</field>
<field>
<name>ACKD</name>
<description>Detection of acknowledge (ACK)</description>
<bitRange>[2:2]</bitRange>
</field>
<field>
<name>STD</name>
<description>Detection of start condition</description>
<bitRange>[1:1]</bitRange>
</field>
<field>
<name>SPD</name>
<description>Detection of stop condition</description>
<bitRange>[0:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>IICF1</name>
<description>IICA flag register 1</description>
<addressOffset>0x122</addressOffset>
<access>read-write</access>
<resetValue>0x00</resetValue>
<resetMask>0xFF</resetMask>
<fields>
<field>
<name>STCF</name>
<description>STT clear flag</description>
<bitRange>[7:7]</bitRange>
<access>read-only</access>
</field>
<field>
<name>IICBSY</name>
<description>I2C bus status flag</description>
<bitRange>[6:6]</bitRange>
<access>read-only</access>
</field>
<field>
<name>STCEN</name>
<description>Initial start enable trigger</description>
<bitRange>[1:1]</bitRange>
<access>read-write</access>
</field>
<field>
<name>IICRSV</name>
<description>Communication reservation function disable bit</description>
<bitRange>[0:0]</bitRange>
<access>read-write</access>
</field>
</fields>
</register>
</registers>
</peripheral>
<!-- IRDA -->
<!-- <peripheral>
<name>IRDA</name>
<version>1.0</version>
<description>IrDA communication module based on Infrared Data Association stardard 1.0</description>
<groupName>IRDA</groupName>
<baseAddress>0x400440A0</baseAddress>
<size>8</size>
<access>read-write</access>
<addressBlock>
<offset>0</offset>
<size>0x001</size>
<usage>registers</usage>
</addressBlock>
<registers>
<register>
<name>IRCR</name>
<description>IrDA control register</description>
<addressOffset>0x000</addressOffset>
<resetValue>0x00</resetValue>
<resetMask>0xFC</resetMask>
<fields>
<field>
<name>IRRXINV</name>
<description>IrRxD data polarity switching</description>
<bitRange>[2:2]</bitRange>
</field>
<field>
<name>IRTXINV</name>
<description>IrRxD data polarity switching</description>
<bitRange>[3:3]</bitRange>
</field>
<field>
<name>IRCKS</name>
<description>IrRxD clock selection</description>
<bitRange>[6:4]</bitRange>
</field>
<field>
<name>IRE</name>
<description>IrRxD enable</description>
<bitRange>[7:7]</bitRange>
</field>
</fields>
</register>
</registers>
</peripheral> -->
<!-- DMA -->
<peripheral>
<name>DMA</name>
<version>1.0</version>
<description>Enhanced DMA Controller</description>
<groupName>DMA</groupName>
<baseAddress>0x40005000</baseAddress>
<size>8</size>
<access>read-write</access>
<addressBlock>
<offset>0</offset>
<size>0x100</size>
<usage>registers</usage>
</addressBlock>
<registers>
<register>
<dim>5</dim>
<dimIncrement>1</dimIncrement>
<dimIndex>0-4</dimIndex>
<name>DMAEN%s</name>
<description>DMA activation enable register %s</description>
<addressOffset>0x000</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0xFF</resetMask>
</register>
<register>
<name>DMABAR</name>
<description>DMA base address register</description>
<addressOffset>0x008</addressOffset>
<size>32</size>
<resetValue>0x00000000</resetValue>
<resetMask>0xFFFFFFFF</resetMask>
</register>
<register>
<name>IFPRCR</name>
<description>DMA Trigger Protect register</description>
<addressOffset>0x00C</addressOffset>
<size>32</size>
<resetValue>0x00000000</resetValue>
<resetMask>0xFFFFFFFF</resetMask>
</register>
<register>
<dim>5</dim>
<dimIncrement>1</dimIncrement>
<dimIndex>0-4</dimIndex>
<name>DMAIF%s</name>
<description>DMA Trigger enable register %s</description>
<addressOffset>0x010</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0xFF</resetMask>
</register>
<register>
<dim>5</dim>
<dimIncrement>1</dimIncrement>
<dimIndex>0-4</dimIndex>
<name>DMSET%s</name>
<description>DMA activation enable set register %s</description>
<addressOffset>0x018</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0xFF</resetMask>
</register>
<register>
<dim>5</dim>
<dimIncrement>1</dimIncrement>
<dimIndex>0-4</dimIndex>
<name>DMCLR%s</name>
<description>DMA activation enable clear register %s</description>
<addressOffset>0x020</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0xFF</resetMask>
</register>
</registers>
</peripheral>
<!-- DMAVEC -->
<peripheral>
<name>DMAVEC</name>
<version>1.0</version>
<description>DMA Vector and Control Data Area</description>
<groupName>DMAVEC</groupName>
<baseAddress>0x20000000</baseAddress>
<size>32</size>
<access>read-write</access>
<addressBlock>
<offset>0</offset>
<size>0x2C0</size>
<usage>registers</usage>
</addressBlock>
<registers>
<register>
<dim>64</dim>
<dimIncrement>1</dimIncrement>
<name>VEC[%s]</name>
<description>DMA vector area</description>
<addressOffset>0x000</addressOffset>
<size>8</size>
</register>
<cluster>
<dim>40</dim>
<dimIncrement>16</dimIncrement>
<name>CTRL[%s]</name>
<description>DMA control data area</description>
<addressOffset>0x040</addressOffset>
<register>
<name>DMACR</name>
<description>DMA Control register</description>
<addressOffset>0x000</addressOffset>
<size>16</size>
<fields>
<field>
<name>SZ</name>
<description>Transfer Data size selection</description>
<bitRange>[7:6]</bitRange>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>BYTE</name>
<description>8 bits</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>HALF</name>
<description>16 bits</description>
<value>1</value>
</enumeratedValue>
<enumeratedValue>
<name>WORD</name>
<description>32 bits</description>
<value>2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>RPTINT</name>
<description>Enabling/disabling repeat mode interrupts</description>
<bitRange>[5:5]</bitRange>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<description>Interrupt generation disabled</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<description>Interrupt generation enabled</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CHNE</name>
<description>Enabling/disabling chain transfers</description>
<bitRange>[4:4]</bitRange>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<description>Chain transfers disabled</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<description>Chain transfers enabled</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DAMOD</name>
<description>Destination address control</description>
<bitRange>[3:3]</bitRange>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>Fixed</name>
<description>Fixed</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Incremented</name>
<description>Incremented</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SAMOD</name>
<description>Source address control</description>
<bitRange>[2:2]</bitRange>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>Fixed</name>
<description>Fixed</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Incremented</name>
<description>Incremented</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>RPTSEL</name>
<description>Repeat area selection</description>
<bitRange>[1:1]</bitRange>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>destination</name>
<description>Transfer destination is the repeat area</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>source</name>
<description>Transfer source is the repeat area</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>MODE</name>
<description>Transfer mode selection</description>
<bitRange>[0:0]</bitRange>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>Normal</name>
<description>Normal mode</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Repeat</name>
<description>Repeat mode</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>DMBLS</name>
<description>DMA Block Size register</description>
<addressOffset>0x002</addressOffset>
<size>16</size>
</register>
<register>
<name>DMACT</name>
<description>DMA Transfer Count register</description>
<addressOffset>0x004</addressOffset>
<size>16</size>
</register>
<register>
<name>DMRLD</name>
<description>DMA Transfer Count Reload register</description>
<addressOffset>0x006</addressOffset>
<size>16</size>
</register>
<register>
<name>DMSAR</name>
<description>DMA Source Address register</description>
<addressOffset>0x008</addressOffset>
<size>32</size>
</register>
<register>
<name>DMDAR</name>
<description>DMA Destination Address register</description>
<addressOffset>0x00C</addressOffset>
<size>32</size>
</register>
</cluster>
</registers>
</peripheral>
<!-- ELC -->
<peripheral>
<name>ELC</name>
<version>1.0</version>
<description>Event Link Controller</description>
<groupName>ELC</groupName>
<baseAddress>0x40043400</baseAddress>
<size>8</size>
<access>read-write</access>
<addressBlock>
<offset>0</offset>
<size>0x100</size>
<usage>registers</usage>
</addressBlock>
<registers>
<register>
<name>ELSELR00</name>
<description>Event output destination select register 00</description>
<addressOffset>0x000</addressOffset>
<resetValue>0x00</resetValue>
<resetMask>0x0F</resetMask>
</register>
<register derivedFrom="ELSELR00">
<name>ELSELR01</name>
<description>Event output destination select register 01</description>
<addressOffset>0x001</addressOffset>
</register>
<register derivedFrom="ELSELR00">
<name>ELSELR02</name>
<description>Event output destination select register 02</description>
<addressOffset>0x002</addressOffset>
</register>
<register derivedFrom="ELSELR00">
<name>ELSELR03</name>
<description>Event output destination select register 03</description>
<addressOffset>0x003</addressOffset>
</register>
<register derivedFrom="ELSELR00">
<name>ELSELR04</name>
<description>Event output destination select register 04</description>
<addressOffset>0x004</addressOffset>
</register>
<register derivedFrom="ELSELR00">
<name>ELSELR05</name>
<description>Event output destination select register 05</description>
<addressOffset>0x005</addressOffset>
</register>
<register derivedFrom="ELSELR00">
<name>ELSELR06</name>
<description>Event output destination select register 06</description>
<addressOffset>0x006</addressOffset>
</register>
<register derivedFrom="ELSELR00">
<name>ELSELR07</name>
<description>Event output destination select register 07</description>
<addressOffset>0x007</addressOffset>
</register>
<register derivedFrom="ELSELR00">
<name>ELSELR08</name>
<description>Event output destination select register 08</description>
<addressOffset>0x008</addressOffset>
</register>
<register derivedFrom="ELSELR00">
<name>ELSELR09</name>
<description>Event output destination select register 09</description>
<addressOffset>0x009</addressOffset>
</register>
<register derivedFrom="ELSELR00">
<name>ELSELR10</name>
<description>Event output destination select register 10</description>
<addressOffset>0x00A</addressOffset>
</register>
<register derivedFrom="ELSELR00">
<name>ELSELR11</name>
<description>Event output destination select register 11</description>
<addressOffset>0x00B</addressOffset>
</register>
<register derivedFrom="ELSELR00">
<name>ELSELR12</name>
<description>Event output destination select register 12</description>
<addressOffset>0x00C</addressOffset>
</register>
<register derivedFrom="ELSELR00">
<name>ELSELR13</name>
<description>Event output destination select register 13</description>
<addressOffset>0x00D</addressOffset>
</register>
<register derivedFrom="ELSELR00">
<name>ELSELR14</name>
<description>Event output destination select register 14</description>
<addressOffset>0x00E</addressOffset>
</register>
<register derivedFrom="ELSELR00">
<name>ELSELR15</name>
<description>Event output destination select register 15</description>
<addressOffset>0x00F</addressOffset>
</register>
<register derivedFrom="ELSELR00">
<name>ELSELR16</name>
<description>Event output destination select register 16</description>
<addressOffset>0x010</addressOffset>
</register>
<register derivedFrom="ELSELR00">
<name>ELSELR17</name>
<description>Event output destination select register 17</description>
<addressOffset>0x011</addressOffset>
</register>
<register derivedFrom="ELSELR00">
<name>ELSELR18</name>
<description>Event output destination select register 18</description>
<addressOffset>0x012</addressOffset>
</register>
<register derivedFrom="ELSELR00">
<name>ELSELR19</name>
<description>Event output destination select register 19</description>
<addressOffset>0x013</addressOffset>
</register>
<register derivedFrom="ELSELR00">
<name>ELSELR20</name>
<description>Event output destination select register 20</description>
<addressOffset>0x014</addressOffset>
</register>
<register derivedFrom="ELSELR00">
<name>ELSELR21</name>
<description>Event output destination select register 21</description>
<addressOffset>0x015</addressOffset>
</register>
<register derivedFrom="ELSELR00">
<name>ELSELR22</name>
<description>Event output destination select register 21</description>
<addressOffset>0x016</addressOffset>
</register>
</registers>
</peripheral>
<!-- INT -->
<peripheral>
<name>INT</name>
<version>1.0</version>
<description>Interrupt Controller</description>
<groupName>INT</groupName>
<baseAddress>0x40006000</baseAddress>
<size>32</size>
<access>read-write</access>
<addressBlock>
<offset>0</offset>
<size>0x200</size>
<usage>registers</usage>
</addressBlock>
<registers>
<cluster>
<dim>32</dim>
<dimIncrement>4</dimIncrement>
<name>IF[%s]</name>
<description>Interrupt flag register</description>
<addressOffset>0x000</addressOffset>
<resetValue>0x00000000</resetValue>
<resetMask>0x00000011</resetMask>
<register>
<name>IFL</name>
<description>Interrupt flag register</description>
<addressOffset>0x000</addressOffset>
<size>8</size>
</register>
<register>
<name>IFH</name>
<description>Interrupt flag register</description>
<addressOffset>0x001</addressOffset>
<size>8</size>
</register>
<register>
<name>IFT</name>
<description>Interrupt flag register</description>
<addressOffset>0x002</addressOffset>
<size>8</size>
</register>
</cluster>
<cluster>
<dim>32</dim>
<dimIncrement>4</dimIncrement>
<name>MK[%s]</name>
<description>Interrupt mask register</description>
<addressOffset>0x100</addressOffset>
<resetValue>0xFFFFFFFF</resetValue>
<resetMask>0x00000011</resetMask>
<register>
<name>MKL</name>
<description>Interrupt mask register</description>
<addressOffset>0x000</addressOffset>
<size>8</size>
</register>
<register>
<name>MKH</name>
<description>Interrupt mask register</description>
<addressOffset>0x001</addressOffset>
<size>8</size>
</register>
<register>
<name>MKT</name>
<description>Interrupt mask register</description>
<addressOffset>0x002</addressOffset>
<size>8</size>
</register>
</cluster>
</registers>
</peripheral>
<!-- INTM -->
<peripheral>
<name>INTM</name>
<version>1.0</version>
<description>Pin input edge detection</description>
<groupName>INTM</groupName>
<baseAddress>0x40046B38</baseAddress>
<size>8</size>
<access>read-write</access>
<addressBlock>
<offset>0</offset>
<size>0x100</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>INTP0</name>
<description>INTP0 External interrupt request input is valid</description>
<value>1</value>
</interrupt>
<interrupt>
<name>INTP1</name>
<description>INTP1 External interrupt request input is valid</description>
<value>2</value>
</interrupt>
<interrupt>
<name>INTP2</name>
<description>INTP2 External interrupt request input is valid</description>
<value>3</value>
</interrupt>
<interrupt>
<name>INTP3</name>
<description>INTP3 External interrupt request input is valid</description>
<value>4</value>
</interrupt>
<interrupt>
<name>INTP4</name>
<description>INTP4 External interrupt request input is valid</description>
<value>5</value>
</interrupt>
<interrupt>
<name>INTP5</name>
<description>INTP5 External interrupt request input is valid</description>
<value>6</value>
</interrupt>
<!--interrupt>
<name>INTP6</name>
<description>INTP6 External interrupt request input is valid</description>
<value>33</value>
</interrupt>
<interrupt>
<name>INTP7</name>
<description>INTP7 External interrupt request input is valid</description>
<value>34</value>
</interrupt>
<interrupt>
<name>INTP8</name>
<description>INTP8 External interrupt request input is valid</description>
<value>35</value>
</interrupt>
<interrupt>
<name>INTP9</name>
<description>INTP9 External interrupt request input is valid</description>
<value>36</value>
</interrupt>
<interrupt>
<name>INTP10</name>
<description>INTP10 External interrupt request input is valid</description>
<value>37</value>
</interrupt>
<interrupt>
<name>INTP11</name>
<description>INTP11 External interrupt request input is valid</description>
<value>38</value>
</interrupt-->
<registers>
<register>
<name>EGP0</name>
<description>External interrupt rising edge enable register</description>
<addressOffset>0x000</addressOffset>
<resetValue>0x00</resetValue>
<resetMask>0xFF</resetMask>
<fields>
<field>
<name>EGP0</name>
<description></description>
<bitRange>[0:0]</bitRange>
</field>
<field>
<name>EGP1</name>
<description></description>
<bitRange>[1:1]</bitRange>
</field>
<field>
<name>EGP2</name>
<description></description>
<bitRange>[2:2]</bitRange>
</field>
<field>
<name>EGP3</name>
<description></description>
<bitRange>[3:3]</bitRange>
</field>
<field>
<name>EGP4</name>
<description></description>
<bitRange>[4:4]</bitRange>
</field>
<field>
<name>EGP5</name>
<description></description>
<bitRange>[5:5]</bitRange>
</field>
<field>
<name>EGP6</name>
<description></description>
<bitRange>[6:6]</bitRange>
</field>
<field>
<name>EGP7</name>
<description></description>
<bitRange>[7:7]</bitRange>
</field>
</fields>
</register>
<register>
<name>EGN0</name>
<description>External interrupt falling edge enable register</description>
<addressOffset>0x001</addressOffset>
<resetValue>0x00</resetValue>
<resetMask>0xFF</resetMask>
<fields>
<field>
<name>EGN0</name>
<description></description>
<bitRange>[0:0]</bitRange>
</field>
<field>
<name>EGN1</name>
<description></description>
<bitRange>[1:1]</bitRange>
</field>
<field>
<name>EGN2</name>
<description></description>
<bitRange>[2:2]</bitRange>
</field>
<field>
<name>EGN3</name>
<description></description>
<bitRange>[3:3]</bitRange>
</field>
<field>
<name>EGN4</name>
<description></description>
<bitRange>[4:4]</bitRange>
</field>
<field>
<name>EGN5</name>
<description></description>
<bitRange>[5:5]</bitRange>
</field>
<field>
<name>EGN6</name>
<description></description>
<bitRange>[6:6]</bitRange>
</field>
<field>
<name>EGN7</name>
<description></description>
<bitRange>[7:7]</bitRange>
</field>
</fields>
</register>
<register>
<name>EGP1</name>
<description>External interrupt rising edge enable register</description>
<addressOffset>0x002</addressOffset>
<resetValue>0x00</resetValue>
<resetMask>0x0F</resetMask>
<fields>
<field>
<name>EGP8</name>
<description></description>
<bitRange>[0:0]</bitRange>
</field>
<field>
<name>EGP9</name>
<description></description>
<bitRange>[1:1]</bitRange>
</field>
<field>
<name>EGP10</name>
<description></description>
<bitRange>[2:2]</bitRange>
</field>
<field>
<name>EGP11</name>
<description></description>
<bitRange>[3:3]</bitRange>
</field>
</fields>
</register>
<register>
<name>EGN1</name>
<description>External interrupt falling edge enable register</description>
<addressOffset>0x003</addressOffset>
<resetValue>0x00</resetValue>
<resetMask>0x0F</resetMask>
<fields>
<field>
<name>EGN8</name>
<description></description>
<bitRange>[0:0]</bitRange>
</field>
<field>
<name>EGN9</name>
<description></description>
<bitRange>[1:1]</bitRange>
</field>
<field>
<name>EGN10</name>
<description></description>
<bitRange>[2:2]</bitRange>
</field>
<field>
<name>EGN11</name>
<description></description>
<bitRange>[3:3]</bitRange>
</field>
</fields>
</register>
</registers>
</peripheral>
<!-- KEY -->
<peripheral>
<name>KEY</name>
<version>1.0</version>
<description>Key interrupt</description>
<groupName>KEY</groupName>
<baseAddress>0x40044B30</baseAddress>
<size>8</size>
<access>read-write</access>
<interrupt>
<name>KEY</name>
<description>KEY return interrupt request</description>
<value>23</value>
</interrupt>
<addressBlock>
<offset>0</offset>
<size>0x010</size>
<usage>registers</usage>
</addressBlock>
<registers>
<register>
<name>KRM</name>
<description>Key return mode register</description>
<addressOffset>0x007</addressOffset>
<resetValue>0x00</resetValue>
<resetMask>0xFF</resetMask>
</register>
</registers>
</peripheral>
<!-- MISC -->
<peripheral>
<name>MISC</name>
<version>1.0</version>
<description>Miscellaneous function</description>
<groupName>MISC</groupName>
<baseAddress>0x40040470</baseAddress>
<size>8</size>
<access>read-write</access>
<addressBlock>
<offset>0</offset>
<size>0x100</size>
<usage>registers</usage>
</addressBlock>
<registers>
<register>
<name>NFEN0</name>
<description>Noise filter enable register 0</description>
<addressOffset>0x000</addressOffset>
<resetValue>0x00</resetValue>
<resetMask>0x15</resetMask>
<fields>
<field>
<name>SNFEN00</name>
<description>Enable noise filter of RxD0</description>
<bitRange>[0:0]</bitRange>
</field>
<field>
<name>SNFEN10</name>
<description>Enable noise filter of RxD1</description>
<bitRange>[2:2]</bitRange>
</field>
<field>
<name>SNFEN20</name>
<description>Enable noise filter of RxD2</description>
<bitRange>[4:4]</bitRange>
</field>
</fields>
</register>
<register>
<name>NFEN1</name>
<description>Noise filter enable register 1</description>
<addressOffset>0x001</addressOffset>
<resetValue>0x00</resetValue>
<resetMask>0x0F</resetMask>
<fields>
<field>
<name>TNFEN00</name>
<description>Enable noise filter of TI00</description>
<bitRange>[0:0]</bitRange>
</field>
<field>
<name>TNFEN01</name>
<description>Enable noise filter of TI01</description>
<bitRange>[1:1]</bitRange>
</field>
<field>
<name>TNFEN02</name>
<description>Enable noise filter of TI02</description>
<bitRange>[2:2]</bitRange>
</field>
<field>
<name>TNFEN03</name>
<description>Enable noise filter of TI03</description>
<bitRange>[3:3]</bitRange>
</field>
</fields>
</register>
<register>
<name>NFEN2</name>
<description>Noise filter enable register 2</description>
<addressOffset>0x002</addressOffset>
<resetValue>0x00</resetValue>
<resetMask>0xFF</resetMask>
<fields>
<field>
<name>TNFEN10</name>
<description>Enable noise filter of TI10</description>
<bitRange>[0:0]</bitRange>
</field>
<field>
<name>TNFEN11</name>
<description>Enable noise filter of TI11</description>
<bitRange>[1:1]</bitRange>
</field>
<field>
<name>TNFEN12</name>
<description>Enable noise filter of TI12</description>
<bitRange>[2:2]</bitRange>
</field>
<field>
<name>TNFEN13</name>
<description>Enable noise filter of TI13</description>
<bitRange>[3:3]</bitRange>
</field>
<field>
<name>TNFEN14</name>
<description>Enable noise filter of TI14</description>
<bitRange>[4:4]</bitRange>
</field>
<field>
<name>TNFEN15</name>
<description>Enable noise filter of TI15</description>
<bitRange>[5:5]</bitRange>
</field>
<field>
<name>TNFEN16</name>
<description>Enable noise filter of TI16</description>
<bitRange>[6:6]</bitRange>
</field>
<field>
<name>TNFEN17</name>
<description>Enable noise filter of TI17</description>
<bitRange>[7:7]</bitRange>
</field>
</fields>
</register>
<register>
<name>ISC</name>
<description>Input switch control register</description>
<addressOffset>0x003</addressOffset>
<resetValue>0x00</resetValue>
<resetMask>0x83</resetMask>
<fields>
<field>
<name>ISC0</name>
<description>Switching external interrupt (INTP0) input</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>INTP0</name>
<description>Uses INTP0 pin as an external interrupt</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>RXD0</name>
<description>Uses RXD0 pin as an external interrupt</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>ISC1</name>
<description>Switching TI03 input</description>
<bitRange>[1:1]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>TI03</name>
<description>Uses TI03 pin as an timer input</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>RXD0</name>
<description>Uses RXD0 pin as an timer input</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SSIE00</name>
<description>The slave select input (SS00) of SPI00 is valid</description>
<bitRange>[7:7]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>INVALID</name>
<description>The slave select input (SS00) pin is invalid</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>VALID</name>
<description>The slave select input (SS00) pin is valid</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>TIOS0</name>
<description>Timer I/O select register 0</description>
<addressOffset>0x004</addressOffset>
<resetValue>0x00</resetValue>
<resetMask>0x83</resetMask>
</register>
<register>
<name>TIOS1</name>
<description>Timer I/O select register 1</description>
<addressOffset>0x005</addressOffset>
<resetValue>0x00</resetValue>
<resetMask>0x01</resetMask>
</register>
<register>
<name>RTCCL</name>
<description>Real-time clock select register</description>
<addressOffset>0x00C</addressOffset>
<resetValue>0x00</resetValue>
<resetMask>0xC3</resetMask>
</register>
</registers>
</peripheral>
<!-- FMC -->
<peripheral>
<name>FMC</name>
<version>1.0</version>
<description>Flash Memory Controller</description>
<groupName>FMC</groupName>
<baseAddress>0x40020000</baseAddress>
<size>32</size>
<access>read-write</access>
<addressBlock>
<offset>0</offset>
<size>0x400</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>FMC</name>
<description>Flash erase or write finish</description>
<value>31</value>
</interrupt>
<registers>
<register>
<name>FLSTS</name>
<description>Flash status register</description>
<addressOffset>0x000</addressOffset>
<resetValue>0x00000000</resetValue>
<resetMask>0xFFFFFFFF</resetMask>
<fields>
<field>
<name>OVF</name>
<description>Flash erase or write operaiton finish</description>
<bitRange>[0:0]</bitRange>
</field>
<field>
<name>EVF</name>
<description>Flash hardware verification error flag</description>
<bitRange>[2:2]</bitRange>
</field>
</fields>
</register>
<register>
<name>FLOPMD1</name>
<description>Flash operation mode register 1</description>
<addressOffset>0x004</addressOffset>
<resetValue>0x00000000</resetValue>
<resetMask>0x000000FF</resetMask>
</register>
<register derivedFrom="FLOPMD1">
<name>FLOPMD2</name>
<description>Flash operation mode register 2</description>
<addressOffset>0x008</addressOffset>
</register>
<register>
<name>FLERMD</name>
<description>Flash erase mode register</description>
<addressOffset>0x00C</addressOffset>
<resetValue>0x00000000</resetValue>
<resetMask>0x00000018</resetMask>
</register>
<register>
<name>FLCERCNT</name>
<description>Flash chip erase control register</description>
<addressOffset>0x010</addressOffset>
<resetMask>0x800001FF</resetMask>
</register>
<register>
<name>FLSERCNT</name>
<description>Flash sector erase control register</description>
<addressOffset>0x014</addressOffset>
<resetMask>0x800001FF</resetMask>
</register>
<register>
<name>FLPROCNT</name>
<description>Flash program (write) control register</description>
<addressOffset>0x01C</addressOffset>
<resetMask>0x81FF81FF</resetMask>
</register>
<register>
<name>FLPROT</name>
<description>Flash protect control register</description>
<addressOffset>0x020</addressOffset>
<resetValue>0x00000000</resetValue>
<resetMask>0x000000FF</resetMask>
</register>
</registers>
</peripheral>
<!-- SAFETY -->
<peripheral>
<name>SAF</name>
<version>1.0</version>
<description>Flash memory CRC operation function (High-Speed CRC)</description>
<groupName>SAF</groupName>
<baseAddress>0x40020100</baseAddress>
<size>16</size>
<access>read-write</access>
<addressBlock>
<offset>0</offset>
<size>0x30000</size>
<usage>registers</usage>
</addressBlock>
<registers>
<register>
<name>CRC0CTL</name>
<description>Flash memory CRC control register</description>
<addressOffset>0x1710</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0xFF</resetMask>
<fields>
<field>
<name>CRC0EN</name>
<description>Control of high-speed CRC operation</description>
<bitRange>[7:7]</bitRange>
</field>
<field>
<name>FEA</name>
<description>High-speed CRC operation range</description>
<bitRange>[6:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>PGCRCL</name>
<description>Flash memory CRC operation result register</description>
<addressOffset>0x1712</addressOffset>
<size>16</size>
<resetValue>0x0000</resetValue>
<resetMask>0xFFFF</resetMask>
</register>
<register>
<name>CRCIN</name>
<description>CRC input register</description>
<addressOffset>0x232AC</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0xFF</resetMask>
</register>
<register>
<name>CRCD</name>
<description>CRC data register</description>
<addressOffset>0x231FA</addressOffset>
<size>16</size>
<resetValue>0x00</resetValue>
<resetMask>0xFF</resetMask>
</register>
<register>
<name>RPECTL</name>
<description>RAM parity error control register</description>
<addressOffset>0x325</addressOffset>
<size>8</size>
<access>read-write</access>
<resetValue>0x00</resetValue>
<resetMask>0x81</resetMask>
<fields>
<!-- RPEF: Parity error status flag -->
<field>
<name>RPEF</name>
<description>Parity error status flag</description>
<bitRange>[0:0]</bitRange>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>NoError</name>
<description>No parity error has occurred</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Error</name>
<description>Parity error has occurred</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<!-- RPERDIS: Disable RAM parity error reset -->
<field>
<name>RPERDIS</name>
<description>Disable RAM parity error reset</description>
<bitRange>[7:7]</bitRange>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>Enable</name>
<description>Enable parity error reset </description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Disable</name>
<description>Disable parity error reset </description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>SFRGD</name>
<description>SFR guard control register</description>
<addressOffset>0x20378</addressOffset>
<resetValue>0x00</resetValue>
<resetMask>0x0F</resetMask>
</register>
</registers>
</peripheral>
<!-- CRC -->
<peripheral>
<name>CRC</name>
<version>1.0</version>
<description>General Purpose CRC</description>
<groupName>CRC</groupName>
<baseAddress>0x400432F0</baseAddress>
<size>16</size>
<access>read-write</access>
<addressBlock>
<offset>0</offset>
<size>0x100</size>
<usage>registers</usage>
</addressBlock>
<registers>
<register>
<name>CRCD</name>
<description>CRC data register</description>
<addressOffset>0x00A</addressOffset>
<size>16</size>
<resetValue>0x00</resetValue>
<resetMask>0xFF</resetMask>
</register>
<register>
<name>CRCIN</name>
<description>CRC input register</description>
<addressOffset>0x0BC</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0xFF</resetMask>
</register>
</registers>
</peripheral>
<!-- DBG -->
<peripheral>
<name>DBG</name>
<version>1.0</version>
<description>DBG Controller</description>
<groupName>DBG</groupName>
<baseAddress>0x4001B000</baseAddress>
<size>32</size>
<access>read-write</access>
<addressBlock>
<offset>0</offset>
<size>0x100</size>
<usage>registers</usage>
</addressBlock>
<registers>
<register>
<name>DBGSTR</name>
<description>Debug status register</description>
<addressOffset>0x000</addressOffset>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<resetMask>0x30000000</resetMask>
<fields>
<field>
<name>CDBGPWRUPACK</name>
<description>DBG Power Up Acknowledgement</description>
<bitRange>[29:29]</bitRange>
</field>
<field>
<name>CDBGPWRUPREQ</name>
<description>DBG Power Up Request</description>
<bitRange>[28:28]</bitRange>
</field>
</fields>
</register>
<register>
<name>DBGSTOPCR</name>
<description>Debug Stop Control register</description>
<addressOffset>0x004</addressOffset>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<resetMask>0x01010007</resetMask>
<fields>
<field>
<name>SWDIS</name>
<description>SWD Disable</description>
<bitRange>[24:24]</bitRange>
</field>
<field>
<name>RPERMSK</name>
<description>Mask RAM parity error in debug mode</description>
<bitRange>[16:16]</bitRange>
</field>
<field>
<name>RESMSK</name>
<description>Mask internal reset in debug mode</description>
<bitRange>[2:2]</bitRange>
</field>
<field>
<name>FRZEN1</name>
<description>Stop Communation family macros when cpu halted</description>
<bitRange>[1:1]</bitRange>
</field>
<field>
<name>FRZEN0</name>
<description>Stop Timer family macros when cpu halted</description>
<bitRange>[0:0]</bitRange>
</field>
</fields>
</register>
</registers>
</peripheral>
<!-- CAN0 -->
<peripheral>
<name>CAN0</name>
<version>1.0</version>
<description>CAN0 Controller</description>
<groupName>CAN0</groupName>
<baseAddress>0x40045400</baseAddress>
<size>16</size>
<access>read-write</access>
<addressBlock>
<offset>0</offset>
<size>0x100</size>
<usage>registers</usage>
</addressBlock>
<!--interrupt>
<name>CAN0ERR</name>
<description>CAN0 error interrupt</description>
<value>41</value>
</interrupt>
<interrupt>
<name>CAN0REC</name>
<description>CAN0 reception completion interrupt</description>
<value>55</value>
</interrupt>
<interrupt>
<name>CAN0WUP</name>
<description>CAN0 wakeup interrupt</description>
<value>56</value>
</interrupt>
<interrupt>
<name>CAN0TRX</name>
<description>CAN0 transmission completion interrupt</description>
<value>57</value>
</interrupt-->
<registers>
<register>
<name>CGMCTRL</name>
<description>CAN global module control register</description>
<addressOffset>0x000</addressOffset>
<size>16</size>
<resetValue>0x0000</resetValue>
<resetMask>0xFFFF</resetMask>
</register>
<register>
<name>CGMCS</name>
<description>CAN global module clock select register</description>
<addressOffset>0x002</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0x0F</resetMask>
</register>
<register>
<name>CGMABT</name>
<description>CAN global automatic block transmission control register</description>
<addressOffset>0x006</addressOffset>
<size>16</size>
<resetValue>0x0000</resetValue>
<resetMask>0xFFFF</resetMask>
</register>
<register>
<name>CGMABTD</name>
<description>CAN global automatic block transmission delay setting register</description>
<addressOffset>0x008</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0x0F</resetMask>
</register>
<register>
<dim>2</dim>
<dimIncrement>2</dimIncrement>
<dimIndex>L,H</dimIndex>
<name>CMASK1%s</name>
<description>CAN module mask 1 register</description>
<addressOffset>0x040</addressOffset>
<resetValue>0x0000</resetValue>
<resetMask>0xFFFF</resetMask>
</register>
<register>
<dim>2</dim>
<dimIncrement>2</dimIncrement>
<dimIndex>L,H</dimIndex>
<name>CMASK2%s</name>
<description>CAN module mask 2 register</description>
<addressOffset>0x044</addressOffset>
<resetValue>0x0000</resetValue>
<resetMask>0xFFFF</resetMask>
</register>
<register>
<dim>2</dim>
<dimIncrement>2</dimIncrement>
<dimIndex>L,H</dimIndex>
<name>CMASK3%s</name>
<description>CAN module mask 3 register</description>
<addressOffset>0x048</addressOffset>
<resetValue>0x0000</resetValue>
<resetMask>0xFFFF</resetMask>
</register>
<register>
<dim>2</dim>
<dimIncrement>2</dimIncrement>
<dimIndex>L,H</dimIndex>
<name>CMASK4%s</name>
<description>CAN module mask 4 register</description>
<addressOffset>0x04C</addressOffset>
<resetValue>0x0000</resetValue>
<resetMask>0xFFFF</resetMask>
</register>
<register>
<name>CCTRL</name>
<description>CAN module control register</description>
<addressOffset>0x050</addressOffset>
<size>16</size>
<resetValue>0x0000</resetValue>
<resetMask>0xFFFF</resetMask>
</register>
<register>
<name>CLEC</name>
<description>CAN module last error code register</description>
<addressOffset>0x052</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0xFF</resetMask>
</register>
<register>
<name>CINFO</name>
<description>CAN module information register</description>
<addressOffset>0x053</addressOffset>
<size>8</size>
<access>read-only</access>
<resetValue>0x00</resetValue>
<resetMask>0xFF</resetMask>
</register>
<register>
<name>CERC</name>
<description>CAN module error counter register</description>
<addressOffset>0x054</addressOffset>
<size>16</size>
<access>read-only</access>
<resetValue>0x0000</resetValue>
<resetMask>0xFFFF</resetMask>
</register>
<register>
<name>CIE</name>
<description>CAN module interrupt enable register</description>
<addressOffset>0x056</addressOffset>
<size>16</size>
<resetValue>0x0000</resetValue>
<resetMask>0xFFFF</resetMask>
</register>
<register>
<name>CINTS</name>
<description>CAN module interrupt status register</description>
<addressOffset>0x058</addressOffset>
<size>16</size>
<resetValue>0x0000</resetValue>
<resetMask>0xFFFF</resetMask>
</register>
<register>
<name>CBRP</name>
<description>CAN module bit rate prescaler register</description>
<addressOffset>0x05A</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0xFF</resetMask>
</register>
<register>
<name>CBTR</name>
<description>CAN module bit rate register</description>
<addressOffset>0x05C</addressOffset>
<size>16</size>
<resetValue>0x0000</resetValue>
<resetMask>0xFFFF</resetMask>
</register>
<register>
<name>CLIPT</name>
<description>CAN module last in-pointer register</description>
<addressOffset>0x05E</addressOffset>
<size>8</size>
<access>read-only</access>
<resetValue>0x00</resetValue>
<resetMask>0xFF</resetMask>
</register>
<register>
<name>CRGPT</name>
<description>CAN module receive history list register</description>
<addressOffset>0x060</addressOffset>
<size>16</size>
<resetValue>0x0000</resetValue>
<resetMask>0xFFFF</resetMask>
</register>
<register>
<name>CLOPT</name>
<description>CAN module last out-pointer register</description>
<addressOffset>0x062</addressOffset>
<size>8</size>
<access>read-only</access>
<resetValue>0x00</resetValue>
<resetMask>0xFF</resetMask>
</register>
<register>
<name>CTGPT</name>
<description>CAN module transmit history list register</description>
<addressOffset>0x064</addressOffset>
<size>16</size>
<resetValue>0x0000</resetValue>
<resetMask>0xFFFF</resetMask>
</register>
<register>
<name>CTS</name>
<description>CAN module time stamp register</description>
<addressOffset>0x066</addressOffset>
<size>16</size>
<resetValue>0x0000</resetValue>
<resetMask>0xFFFF</resetMask>
</register>
</registers>
</peripheral>
<!-- CANMSG -->
<peripheral>
<name>CAN0MSG00</name>
<version>1.0</version>
<description>CAN0 Controller Message 00</description>
<groupName>CAN0</groupName>
<baseAddress>0x40045500</baseAddress>
<size>16</size>
<access>read-write</access>
<addressBlock>
<offset>0</offset>
<size>0x010</size>
<usage>registers</usage>
</addressBlock>
<registers>
<register>
<dim>4</dim>
<dimIncrement>2</dimIncrement>
<dimIndex>01, 23, 45, 67</dimIndex>
<name>CMDB%s</name>
<description>CAN message data byte %s register</description>
<addressOffset>0x000</addressOffset>
<size>16</size>
<resetValue>0x0000</resetValue>
<resetMask>0xFFFF</resetMask>
</register>
<register>
<dim>2</dim>
<dimIncrement>1</dimIncrement>
<dimIndex>0-1</dimIndex>
<name>CMDB%s</name>
<description>CAN message data byte %s register</description>
<alternateRegister>CMDB01</alternateRegister>
<addressOffset>0x000</addressOffset>
<size>8</size>
</register>
<register>
<dim>2</dim>
<dimIncrement>1</dimIncrement>
<dimIndex>2-3</dimIndex>
<name>CMDB%s</name>
<description>CAN message data byte %s register</description>
<alternateRegister>CMDB23</alternateRegister>
<addressOffset>0x002</addressOffset>
<size>8</size>
</register>
<register>
<dim>2</dim>
<dimIncrement>1</dimIncrement>
<dimIndex>4-5</dimIndex>
<name>CMDB%s</name>
<description>CAN message data byte %s register</description>
<alternateRegister>CMDB45</alternateRegister>
<addressOffset>0x004</addressOffset>
<size>8</size>
</register>
<register>
<dim>2</dim>
<dimIncrement>1</dimIncrement>
<dimIndex>6-7</dimIndex>
<name>CMDB%s</name>
<description>CAN message data byte %s register</description>
<alternateRegister>CMDB67</alternateRegister>
<addressOffset>0x006</addressOffset>
<size>8</size>
</register>
<register>
<name>CMDLC</name>
<description>CAN message data length register</description>
<addressOffset>0x008</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0xFF</resetMask>
</register>
<register>
<name>CMCONF</name>
<description>CAN message configuration register</description>
<addressOffset>0x009</addressOffset>
<size>8</size>
<resetValue>0x00</resetValue>
<resetMask>0xFF</resetMask>
</register>
<register>
<name>CMIDL</name>
<description>CAN message ID register</description>
<addressOffset>0x00A</addressOffset>
<size>16</size>
<resetValue>0x0000</resetValue>
<resetMask>0xFFFF</resetMask>
</register>
<register>
<name>CMIDH</name>
<description>CAN message ID register</description>
<addressOffset>0x00C</addressOffset>
<size>16</size>
<resetValue>0x0000</resetValue>
<resetMask>0xFFFF</resetMask>
</register>
<register>
<name>CMCTRL</name>
<description>CAN message control register</description>
<addressOffset>0x00E</addressOffset>
<size>16</size>
<resetValue>0x0000</resetValue>
<resetMask>0xFFFF</resetMask>
</register>
</registers>
</peripheral>
<peripheral derivedFrom="CAN0MSG00">
<name>CAN0MSG01</name>
<description>CAN Controller Message 01</description>
<groupName>CAN0</groupName>
<baseAddress>0x40045510</baseAddress>
</peripheral>
<peripheral derivedFrom="CAN0MSG00">
<name>CAN0MSG02</name>
<description>CAN Controller Message 02</description>
<groupName>CAN0</groupName>
<baseAddress>0x40045520</baseAddress>
</peripheral>
<peripheral derivedFrom="CAN0MSG00">
<name>CAN0MSG03</name>
<description>CAN Controller Message 03</description>
<groupName>CAN0</groupName>
<baseAddress>0x40045530</baseAddress>
</peripheral>
<peripheral derivedFrom="CAN0MSG00">
<name>CAN0MSG04</name>
<description>CAN Controller Message 04</description>
<groupName>CAN0</groupName>
<baseAddress>0x40045540</baseAddress>
</peripheral>
<peripheral derivedFrom="CAN0MSG00">
<name>CAN0MSG05</name>
<description>CAN Controller Message 05</description>
<groupName>CAN0</groupName>
<baseAddress>0x40045550</baseAddress>
</peripheral>
<peripheral derivedFrom="CAN0MSG00">
<name>CAN0MSG06</name>
<description>CAN Controller Message 06</description>
<groupName>CAN0</groupName>
<baseAddress>0x40045560</baseAddress>
</peripheral>
<peripheral derivedFrom="CAN0MSG00">
<name>CAN0MSG07</name>
<description>CAN Controller Message 07</description>
<groupName>CAN0</groupName>
<baseAddress>0x40045570</baseAddress>
</peripheral>
<peripheral derivedFrom="CAN0MSG00">
<name>CAN0MSG08</name>
<description>CAN Controller Message 08</description>
<groupName>CAN0</groupName>
<baseAddress>0x40045580</baseAddress>
</peripheral>
<peripheral derivedFrom="CAN0MSG00">
<name>CAN0MSG09</name>
<description>CAN Controller Message 09</description>
<groupName>CAN0</groupName>
<baseAddress>0x40045590</baseAddress>
</peripheral>
<peripheral derivedFrom="CAN0MSG00">
<name>CAN0MSG10</name>
<description>CAN Controller Message 10</description>
<groupName>CAN0</groupName>
<baseAddress>0x400455A0</baseAddress>
</peripheral>
<peripheral derivedFrom="CAN0MSG00">
<name>CAN0MSG11</name>
<description>CAN Controller Message 11</description>
<groupName>CAN0</groupName>
<baseAddress>0x400455B0</baseAddress>
</peripheral>
<peripheral derivedFrom="CAN0MSG00">
<name>CAN0MSG12</name>
<description>CAN Controller Message 12</description>
<groupName>CAN0</groupName>
<baseAddress>0x400455C0</baseAddress>
</peripheral>
<peripheral derivedFrom="CAN0MSG00">
<name>CAN0MSG13</name>
<description>CAN Controller Message 13</description>
<groupName>CAN0</groupName>
<baseAddress>0x400455D0</baseAddress>
</peripheral>
<peripheral derivedFrom="CAN0MSG00">
<name>CAN0MSG14</name>
<description>CAN Controller Message 14</description>
<groupName>CAN0</groupName>
<baseAddress>0x400455E0</baseAddress>
</peripheral>
<peripheral derivedFrom="CAN0MSG00">
<name>CAN0MSG15</name>
<description>CAN Controller Message 15</description>
<groupName>CAN0</groupName>
<baseAddress>0x400455F0</baseAddress>
</peripheral>
<!-- CAN1 -->
<peripheral derivedFrom="CAN0">
<name>CAN1</name>
<description>CAN0 Controller</description>
<groupName>CAN1</groupName>
<baseAddress>0x40045800</baseAddress>
</peripheral>
<peripheral derivedFrom="CAN0MSG00">
<name>CAN1MSG00</name>
<description>CAN Controller Message 01</description>
<groupName>CAN1</groupName>
<baseAddress>0x40045900</baseAddress>
</peripheral>
<peripheral derivedFrom="CAN0MSG00">
<name>CAN1MSG01</name>
<description>CAN Controller Message 01</description>
<groupName>CAN1</groupName>
<baseAddress>0x40045910</baseAddress>
</peripheral>
<peripheral derivedFrom="CAN0MSG00">
<name>CAN1MSG02</name>
<description>CAN Controller Message 02</description>
<groupName>CAN1</groupName>
<baseAddress>0x40045920</baseAddress>
</peripheral>
<peripheral derivedFrom="CAN0MSG00">
<name>CAN1MSG03</name>
<description>CAN Controller Message 03</description>
<groupName>CAN1</groupName>
<baseAddress>0x40045930</baseAddress>
</peripheral>
<peripheral derivedFrom="CAN0MSG00">
<name>CAN1MSG04</name>
<description>CAN Controller Message 04</description>
<groupName>CAN1</groupName>
<baseAddress>0x40045940</baseAddress>
</peripheral>
<peripheral derivedFrom="CAN0MSG00">
<name>CAN1MSG05</name>
<description>CAN Controller Message 05</description>
<groupName>CAN1</groupName>
<baseAddress>0x40045950</baseAddress>
</peripheral>
<peripheral derivedFrom="CAN0MSG00">
<name>CAN1MSG06</name>
<description>CAN Controller Message 06</description>
<groupName>CAN1</groupName>
<baseAddress>0x40045960</baseAddress>
</peripheral>
<peripheral derivedFrom="CAN0MSG00">
<name>CAN1MSG07</name>
<description>CAN Controller Message 07</description>
<groupName>CAN1</groupName>
<baseAddress>0x40045970</baseAddress>
</peripheral>
<peripheral derivedFrom="CAN0MSG00">
<name>CAN1MSG08</name>
<description>CAN Controller Message 08</description>
<groupName>CAN1</groupName>
<baseAddress>0x40045980</baseAddress>
</peripheral>
<peripheral derivedFrom="CAN0MSG00">
<name>CAN1MSG09</name>
<description>CAN Controller Message 09</description>
<groupName>CAN1</groupName>
<baseAddress>0x40045990</baseAddress>
</peripheral>
<peripheral derivedFrom="CAN0MSG00">
<name>CAN1MSG10</name>
<description>CAN Controller Message 10</description>
<groupName>CAN1</groupName>
<baseAddress>0x400459A0</baseAddress>
</peripheral>
<peripheral derivedFrom="CAN0MSG00">
<name>CAN1MSG11</name>
<description>CAN Controller Message 11</description>
<groupName>CAN1</groupName>
<baseAddress>0x400459B0</baseAddress>
</peripheral>
<peripheral derivedFrom="CAN0MSG00">
<name>CAN1MSG12</name>
<description>CAN Controller Message 12</description>
<groupName>CAN1</groupName>
<baseAddress>0x400459C0</baseAddress>
</peripheral>
<peripheral derivedFrom="CAN0MSG00">
<name>CAN1MSG13</name>
<description>CAN Controller Message 13</description>
<groupName>CAN1</groupName>
<baseAddress>0x400459D0</baseAddress>
</peripheral>
<peripheral derivedFrom="CAN0MSG00">
<name>CAN1MSG14</name>
<description>CAN Controller Message 14</description>
<groupName>CAN1</groupName>
<baseAddress>0x400459E0</baseAddress>
</peripheral>
<peripheral derivedFrom="CAN0MSG00">
<name>CAN1MSG15</name>
<description>CAN Controller Message 15</description>
<groupName>CAN1</groupName>
<baseAddress>0x400459F0</baseAddress>
</peripheral>
<!-- BGR -->
<peripheral>
<name>BGR</name>
<version>1.0</version>
<description>Temperature Sensor calibration data</description>
<groupName>BGR</groupName>
<baseAddress>0x00500C60</baseAddress>
<size>16</size>
<access>read-only</access>
<addressBlock>
<offset>0</offset>
<size>0x008</size>
<usage>registers</usage>
</addressBlock>
<registers>
<register>
<name>VBG85</name>
<description>The A/D conversion value of VBGR at 85 degrees and 3.0V reference voltage</description>
<addressOffset>0x000</addressOffset>
<access>read-only</access>
<resetMask>0xFFFF</resetMask>
</register>
<register>
<name>VBG25</name>
<description>The A/D conversion value of VBGR at 25 degrees and 3.0V reference voltage</description>
<addressOffset>0x004</addressOffset>
<access>read-only</access>
<resetMask>0xFFFF</resetMask>
</register>
</registers>
</peripheral>
<!-- TSN -->
<peripheral>
<name>TSN</name>
<version>1.0</version>
<description>Temperature Sensor calibration data</description>
<groupName>TSN</groupName>
<baseAddress>0x00500C68</baseAddress>
<size>16</size>
<access>read-only</access>
<addressBlock>
<offset>0</offset>
<size>0x008</size>
<usage>registers</usage>
</addressBlock>
<registers>
<register>
<name>TSN85</name>
<description>The A/D conversion value of Temperature Sensor at 85 degrees and 3.0V reference voltage</description>
<addressOffset>0x000</addressOffset>
<access>read-only</access>
<resetMask>0xFFFF</resetMask>
<dataType>int16_t</dataType>
</register>
<register>
<name>TSN25</name>
<description>The A/D conversion value of Temperature Sensor at 25 degrees and 3.0V reference voltage</description>
<addressOffset>0x004</addressOffset>
<access>read-only</access>
<resetMask>0xFFFF</resetMask>
<dataType>int16_t</dataType>
</register>
</registers>
</peripheral>
<!-- UID -->
<peripheral>
<name>UID</name>
<version>1.0</version>
<description>128-bit Unique ID</description>
<groupName>UID</groupName>
<baseAddress>0x00500E4C</baseAddress>
<size>32</size>
<access>read-only</access>
<addressBlock>
<offset>0</offset>
<size>0x080</size>
<usage>registers</usage>
</addressBlock>
<registers>
<register>
<dim>4</dim>
<dimIncrement>4</dimIncrement>
<dimIndex>0-3</dimIndex>
<name>UID%s</name>
<description>UID word %s</description>
<addressOffset>0x000</addressOffset>
<access>read-only</access>
<resetMask>0xFFFFFFFF</resetMask>
</register>
</registers>
</peripheral>
</peripherals>
</device>