Commit 068e7a92 authored by 赵康弘's avatar 赵康弘

feat: 修改CAN相关引脚配置

parent 5a76becb
/GHS/objs
/Config/Config292/Log
\ No newline at end of file
########################################################################################################################
# AUTOSAR Renesas R4.3.1 CAN Driver Generation Tool for X2x
# Run time = [18 Sep 2025 - 10:24:37]
# Run time = [18 Sep 2025 - 21:29:07]
# Command line arguments = .\Config\ECUC\test_Can_Can_ecuc.arxml
# .\Config\ECUC\test_Mcu_Mcu_ecuc.arxml
# .\generator\BSWMDT\R431_CAN_U2A8_BSWMDT.arxml
......@@ -20,6 +20,12 @@ INF000002: Command line arguments: MCALConfGen.exe -m Can -o
.\generator\BSWMDT\R431_CAN_U2A8_BSWMDT.arxml
.\stubs\Dem\xml\Dem_Can.arxml .\stubs\Os\xml\Os_Can.arxml
.\stubs\EcuM\xml\EcuM_Can.arxml .\stubs\CanIf\xml\CanIf.arxml
INF080009: The CanHwFilter having short name <CanHwFilter> is not
considered for the implementation, since this 'CanHwFilter'
container is mapped to 'CanHardwareObject0' which is
configured as <TRANSMIT> object. File name:
.\Config\ECUC\test_Can_Can_ecuc.arxml. Container path:
/ActiveEcuC/Can/CanConfigSet0/CanHardwareObject0/CanHwFilter.
INF080011: The reference clock in 'CanControllerPclkClock' parameter will
be used, the configured value in
'CanControllerPclkClockImmediateValue' parameter will not be
......@@ -36,13 +42,13 @@ INF080011: The reference clock in 'CanControllerPplClock' parameter will be
used. File name: .\Config\ECUC\test_Can_Can_ecuc.arxml.
Container path: /ActiveEcuC/Can/CanConfigSet0.
INF000004: Opened file <Output\Can_OutPut\include\Can_Cfg.h> at [18 Sep
2025 - 10:24:37].
2025 - 21:29:07].
INF000004: Opened file <Output\Can_OutPut\src\Can_Lcfg.c> at [18 Sep 2025 -
10:24:37].
21:29:07].
INF000004: Opened file <Output\Can_OutPut\src\Can_PBcfg.c> at [18 Sep 2025
- 10:24:37].
- 21:29:07].
INF000004: Opened file <Output\Can_OutPut\Can.log> at [18 Sep 2025 -
10:24:37].
21:29:07].
INF000005: <0> Error(s) and <0> Warning(s) detected.
INF000006: Execution completed successfully.
......@@ -70,7 +70,7 @@
* E:\Git\中通\ZhongTong-ZR5-A\Config\Config292\stubs\EcuM\xml\EcuM_Can.arxml
* E:\Git\中通\ZhongTong-ZR5-A\Config\Config292\stubs\CanIf\xml\CanIf.arxml
* E:\Git\中通\ZhongTong-ZR5-A\Config\Config292\Translation.trxml
* GENERATED ON: 18 Sep 2025 - 10:24:37
* GENERATED ON: 18 Sep 2025 - 21:29:07
*/
......@@ -223,7 +223,7 @@
#define CAN_RX_COMFIFO STD_ON
/* Pre-compile option for Transmit FIFO is configured in Tx/RX FIFO */
#define CAN_TX_COMFIFO STD_OFF
#define CAN_TX_COMFIFO STD_ON
/* Pre-compile option for GATEWAY is configured in Tx/RX FIFO */
#define CAN_GATEWAY_COMFIFO STD_OFF
......@@ -303,7 +303,7 @@
#define CAN_CONTROLLER0_RX_INTERRUPT STD_OFF
#define CAN_CONTROLLER1_RX_INTERRUPT STD_OFF
#define CAN_CONTROLLER2_RX_INTERRUPT STD_OFF
#define CAN_CONTROLLER3_RX_INTERRUPT STD_ON
#define CAN_CONTROLLER3_RX_INTERRUPT STD_OFF
#define CAN_CONTROLLER4_RX_INTERRUPT STD_OFF
#define CAN_CONTROLLER5_RX_INTERRUPT STD_OFF
#define CAN_CONTROLLER6_RX_INTERRUPT STD_OFF
......
......@@ -70,7 +70,7 @@
* E:\Git\中通\ZhongTong-ZR5-A\Config\Config292\stubs\EcuM\xml\EcuM_Can.arxml
* E:\Git\中通\ZhongTong-ZR5-A\Config\Config292\stubs\CanIf\xml\CanIf.arxml
* E:\Git\中通\ZhongTong-ZR5-A\Config\Config292\Translation.trxml
* GENERATED ON: 18 Sep 2025 - 10:24:37
* GENERATED ON: 18 Sep 2025 - 21:29:07
*/
......
......@@ -70,7 +70,7 @@
* E:\Git\中通\ZhongTong-ZR5-A\Config\Config292\stubs\EcuM\xml\EcuM_Can.arxml
* E:\Git\中通\ZhongTong-ZR5-A\Config\Config292\stubs\CanIf\xml\CanIf.arxml
* E:\Git\中通\ZhongTong-ZR5-A\Config\Config292\Translation.trxml
* GENERATED ON: 18 Sep 2025 - 10:24:37
* GENERATED ON: 18 Sep 2025 - 21:29:07
*/
......@@ -288,19 +288,19 @@ STATIC CONST(Can_BaudrateConfigType, CAN_CONFIG_DATA) Can_GaaBaudrateConfig00[]
0x0000U,
/* ulCFG */
CAN_RSCAN_NSJW(8) | CAN_RSCAN_NTSEG1(31) | CAN_RSCAN_NTSEG2(8) | CAN_RSCAN_NBRP(3),
CAN_RSCAN_NSJW(1) | CAN_RSCAN_NTSEG1(13) | CAN_RSCAN_NTSEG2(6) | CAN_RSCAN_NBRP(15),
/* ulDCFG */
CAN_RSCAN_SJW(2) | CAN_RSCAN_TSEG1(7) | CAN_RSCAN_TSEG2(2) | CAN_RSCAN_BRP(3),
CAN_RSCAN_SJW(1) | CAN_RSCAN_TSEG1(13) | CAN_RSCAN_TSEG2(6) | CAN_RSCAN_BRP(15),
/* ulFDCFG */
CAN_RSCAN_CLOE,
0UL,
/* blBRS */
CAN_TRUE,
CAN_FALSE,
/* blFdConfigured */
CAN_TRUE
CAN_FALSE
}
};
......@@ -378,10 +378,10 @@ STATIC CONST(Can_ControllerPBConfigType, CAN_CONFIG_DATA) Can_GaaControllerPBCon
/* Array for Hardware Object Handle */
STATIC CONST(Can_HohConfigType, CAN_CONFIG_DATA) Can_GaaHohConfig0[] =
{
/* Index: 0 - CanHardwareObject0 -> TXRXBUFFER(RX)[9] */
/* Index: 0 - CanHardwareObject0 -> TXRXFIFO(TX)[9]->TXBUFFER[224] */
{
/* enHoh */
CAN_HOH_HRH,
CAN_HOH_HTH,
/* ucMainFunctionRIndex */
0U,
......@@ -390,7 +390,7 @@ STATIC CONST(Can_HohConfigType, CAN_CONFIG_DATA) Can_GaaHohConfig0[] =
0x00U,
/* ucTMDLC */
0x00U,
0x08U,
/* usHohId */
0x0000U,
......@@ -405,7 +405,8 @@ STATIC CONST(Can_HohConfigType, CAN_CONFIG_DATA) Can_GaaHohConfig0[] =
0x00U,
/* ulXXCCRegValue */
CAN_RSCAN_CFM_RX | CAN_RSCAN_CFIM | CAN_RSCAN_CFRXIE | CAN_RSCAN_CFDC_16 | CAN_RSCAN_CFPLS_8,
CAN_RSCAN_CFITT(0) | CAN_RSCAN_CFTML(0) | CAN_RSCAN_CFM_TX | CAN_RSCAN_CFIM | CAN_RSCAN_CFTXIE | CAN_RSCAN_CFDC_16 |
CAN_RSCAN_CFPLS_8,
/* ulXXCCERegValue */
0UL,
......@@ -523,21 +524,10 @@ STATIC CONST(Can_HohConfigType, CAN_CONFIG_DATA) Can_GaaHohConfig0[] =
/* Array for Acceptance Filter Receive Rule Configuration */
STATIC CONST(Can_FilterType, CAN_CONFIG_DATA) Can_GaaFilterConfig0[] =
{
/* Index: 0 - CanHardwareObject0/CanHwFilter: RSCANFD03 -> TXRXFIFO[9] */
{
/* ulGAFLID */
0x00000100UL,
/* ulGAFLM */
0xC0000000UL,
/* aaGAFLP */
{ CAN_RSCAN_GAFLDLC_0, CAN_RSCAN_GAFLFDP_TXRXFIFO(9) }
},
/* Index: 1 - CanHardwareObject1/CanHwFilter: RSCANFD10 -> TXRXFIFO[0] */
/* Index: 0 - CanHardwareObject1/CanHwFilter: RSCANFD10 -> TXRXFIFO[0] */
{
/* ulGAFLID */
0x00000065UL,
0x80000065UL,
/* ulGAFLM */
0xC0000000UL,
......
########################################################################################################################
# AUTOSAR Renesas R4.3.1 DIO Driver Generation Tool for X2x
# Run time = [18 Sep 2025 - 10:24:41]
# Run time = [18 Sep 2025 - 18:07:54]
# Command line arguments = .\Config\ECUC\test_Dio_Dio_ecuc.arxml
# .\generator\BSWMDT\R431_DIO_U2A8_BSWMDT.arxml
#
......@@ -14,11 +14,11 @@ INF000002: Command line arguments: MCALConfGen.exe -m Dio -o
.\Translation.trxml
.\generator\BSWMDT\R431_DIO_U2A8_BSWMDT.arxml
INF000004: Opened file <Output\Dio_OutPut\include\Dio_Cfg.h> at [18 Sep
2025 - 10:24:41].
2025 - 18:07:54].
INF000004: Opened file <Output\Dio_OutPut\src\Dio_Lcfg.c> at [18 Sep 2025 -
10:24:41].
18:07:54].
INF000004: Opened file <Output\Dio_OutPut\Dio.log> at [18 Sep 2025 -
10:24:41].
18:07:54].
INF000005: <0> Error(s) and <0> Warning(s) detected.
INF000006: Execution completed successfully.
......@@ -65,7 +65,7 @@
* INPUT FILE: E:\Git\中通\ZhongTong-ZR5-A\Config\Config292\Config\ECUC\test_Dio_Dio_ecuc.arxml
* E:\Git\中通\ZhongTong-ZR5-A\Config\Config292\generator\BSWMDT\R431_DIO_U2A8_BSWMDT.arxml
* E:\Git\中通\ZhongTong-ZR5-A\Config\Config292\Translation.trxml
* GENERATED ON: 18 Sep 2025 - 10:24:41
* GENERATED ON: 18 Sep 2025 - 18:07:54
*/
......
......@@ -65,7 +65,7 @@
* INPUT FILE: E:\Git\中通\ZhongTong-ZR5-A\Config\Config292\Config\ECUC\test_Dio_Dio_ecuc.arxml
* E:\Git\中通\ZhongTong-ZR5-A\Config\Config292\generator\BSWMDT\R431_DIO_U2A8_BSWMDT.arxml
* E:\Git\中通\ZhongTong-ZR5-A\Config\Config292\Translation.trxml
* GENERATED ON: 18 Sep 2025 - 10:24:41
* GENERATED ON: 18 Sep 2025 - 18:07:54
*/
......
########################################################################################################################
# AUTOSAR Renesas R4.3.1 PORT Driver Generation Tool for X2x
# Run time = [18 Sep 2025 - 10:24:39]
# Run time = [18 Sep 2025 - 21:22:39]
# Command line arguments = .\Config\ECUC\test_Port_Port_ecuc.arxml
# .\generator\BSWMDT\R431_PORT_U2A8_BSWMDT.arxml
# .\stubs\Dem\xml\Dem_Port.arxml
......@@ -15,34 +15,13 @@ INF000002: Command line arguments: MCALConfGen.exe -m Port -o
.\Translation.trxml
.\generator\BSWMDT\R431_PORT_U2A8_BSWMDT.arxml
.\stubs\Dem\xml\Dem_Port.arxml
WRN124002: The parameter 'PortPinDirection' of container 'PortPin6' should
not be configured as <PORT_PIN_IN>, since the parameter
'PortPinInitialMode' of the same container is configured as an
Output type mode. The value for parameter 'PortPinDirection'
is considered as <PORT_PIN_OUT>. File Name:
.\Config\ECUC\test_Port_Port_ecuc.arxml Path:
/Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup24/PortPin6
WRN124002: The parameter 'PortPinDirection' of container 'PortPin7' should
not be configured as <PORT_PIN_IN>, since the parameter
'PortPinInitialMode' of the same container is configured as an
Output type mode. The value for parameter 'PortPinDirection'
is considered as <PORT_PIN_OUT>. File Name:
.\Config\ECUC\test_Port_Port_ecuc.arxml Path:
/Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup24/PortPin7
WRN124002: The parameter 'PortPinDirection' of container 'PortPin8' should
not be configured as <PORT_PIN_IN>, since the parameter
WRN124001: The parameter 'PortPinDirection' of container 'PortPin5' should
not be configured as <PORT_PIN_OUT>, since the parameter
'PortPinInitialMode' of the same container is configured as an
Output type mode. The value for parameter 'PortPinDirection'
is considered as <PORT_PIN_OUT>. File Name:
.\Config\ECUC\test_Port_Port_ecuc.arxml Path:
/Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup24/PortPin8
WRN124002: The parameter 'PortPinDirection' of container 'PortPin9' should
not be configured as <PORT_PIN_IN>, since the parameter
'PortPinInitialMode' of the same container is configured as an
Output type mode. The value for parameter 'PortPinDirection'
is considered as <PORT_PIN_OUT>. File Name:
Input type mode. The value for parameter 'PortPinDirection' is
considered as <PORT_PIN_IN>. File Name:
.\Config\ECUC\test_Port_Port_ecuc.arxml Path:
/Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup24/PortPin9
/Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup24/PortPin5
WRN124002: The parameter 'PortPinDirection' of container 'PortPin10' should
not be configured as <PORT_PIN_IN>, since the parameter
'PortPinInitialMode' of the same container is configured as an
......@@ -58,11 +37,11 @@ WRN124002: The parameter 'PortPinDirection' of container 'PortPin11' should
.\Config\ECUC\test_Port_Port_ecuc.arxml Path:
/Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup24/PortPin11
INF000004: Opened file <Output\Port_OutPut\include\Port_Cfg.h> at [18 Sep
2025 - 10:24:39].
2025 - 21:22:39].
INF000004: Opened file <Output\Port_OutPut\src\Port_PBcfg.c> at [18 Sep
2025 - 10:24:39].
2025 - 21:22:39].
INF000004: Opened file <Output\Port_OutPut\Port.log> at [18 Sep 2025 -
10:24:39].
INF000005: <0> Error(s) and <6> Warning(s) detected.
21:22:39].
INF000005: <0> Error(s) and <3> Warning(s) detected.
INF000007: Execution completed successfully with warnings.
......@@ -66,7 +66,7 @@
* E:\Git\中通\ZhongTong-ZR5-A\Config\Config292\generator\BSWMDT\R431_PORT_U2A8_BSWMDT.arxml
* E:\Git\中通\ZhongTong-ZR5-A\Config\Config292\stubs\Dem\xml\Dem_Port.arxml
* E:\Git\中通\ZhongTong-ZR5-A\Config\Config292\Translation.trxml
* GENERATED ON: 18 Sep 2025 - 10:24:39
* GENERATED ON: 18 Sep 2025 - 21:22:39
*/
......
......@@ -66,7 +66,7 @@
* E:\Git\中通\ZhongTong-ZR5-A\Config\Config292\generator\BSWMDT\R431_PORT_U2A8_BSWMDT.arxml
* E:\Git\中通\ZhongTong-ZR5-A\Config\Config292\stubs\Dem\xml\Dem_Port.arxml
* E:\Git\中通\ZhongTong-ZR5-A\Config\Config292\Translation.trxml
* GENERATED ON: 18 Sep 2025 - 10:24:39
* GENERATED ON: 18 Sep 2025 - 21:22:39
*/
......@@ -4330,10 +4330,10 @@ CONST(Port_Reg_Init, PORT_CONFIG_DATA) Port_GaaPortConfig[] =
/* Index: 0 - Register Value */
{
/* PMC */
0x0083U,
0x0683U,
/* PM */
0xFEA7U,
0xFCA7U,
/* PIPC */
0x0000U,
......@@ -4345,10 +4345,10 @@ CONST(Port_Reg_Init, PORT_CONFIG_DATA) Port_GaaPortConfig[] =
0x0081U,
/* PFCE */
0x0001U,
0x0601U,
/* PFCAE */
0x0000U,
0x0400U,
/* Reserve */
0x0000U,
......@@ -4420,7 +4420,7 @@ CONST(Port_Reg_Init, PORT_CONFIG_DATA) Port_GaaPortConfig[] =
0x0004U,
/* P */
0x0185U,
0x0785U,
/* Reserve */
0x0000U,
......@@ -4440,10 +4440,10 @@ CONST(Port_Reg_Init, PORT_CONFIG_DATA) Port_GaaPortConfig[] =
/* Index: 0 - Register Value */
{
/* PMC */
0x000CU,
0x003CU,
/* PM */
0xFFF3U,
0xFFE3U,
/* PIPC */
0x0000U,
......@@ -4452,13 +4452,13 @@ CONST(Port_Reg_Init, PORT_CONFIG_DATA) Port_GaaPortConfig[] =
0x0000U,
/* PFC */
0x000CU,
0x001CU,
/* PFCE */
0x0000U,
0x0020U,
/* PFCAE */
0x000CU,
0x002CU,
/* Reserve */
0x0000U,
......@@ -4530,7 +4530,7 @@ CONST(Port_Reg_Init, PORT_CONFIG_DATA) Port_GaaPortConfig[] =
0x0008U,
/* P */
0x0008U,
0x0038U,
/* Reserve */
0x0000U,
......@@ -5433,22 +5433,22 @@ CONST(Port_Reg_Init, PORT_CONFIG_DATA) Port_GaaPortConfig[] =
0x0FF0U,
/* PM */
0xC00FU,
0xC2AFU,
/* PIPC */
0x07E0U,
0x0400U,
/* PIBC */
0x0000U,
/* PFC */
0x0000U,
0x02F0U,
/* PFCE */
0x0000U,
0x03F0U,
/* PFCAE */
0x0FF0U,
0x0EA0U,
/* Reserve */
0x0000U,
......@@ -5520,7 +5520,7 @@ CONST(Port_Reg_Init, PORT_CONFIG_DATA) Port_GaaPortConfig[] =
0x0000U,
/* P */
0x3800U,
0x3BF0U,
/* Reserve */
0x0000U,
......
......@@ -297,7 +297,7 @@
</Settings>
</Settings>
<Settings Name="com.vector.cfg.consistency.internal.executer.BackgroundValidationExecuter">
<Setting Value="790" Name="InitialBackgroundValidationExecutionTimeMs"/>
<Setting Value="rO0ABXNyABFqYXZhLnV0aWwuSGFzaE1hcAUH2sHDFmDRAwACRgAKbG9hZEZhY3RvckkACXRocmVz&#xA;aG9sZHhwP0AAAAAAABh3CAAAACAAAAATdAA1Y29tLnZlY3Rvci5jZmcuZG9tLmlvLnVpLnZhbGlk&#xA;YXRpb25zLkRpby5EaW9DaGFubmVsSWRzcgAOamF2YS5sYW5nLkxvbmc7i+SQzI8j3wIAAUoABXZh&#xA;bHVleHIAEGphdmEubGFuZy5OdW1iZXKGrJUdC5TgiwIAAHhwAAAAAA8AAAB0AD1jb20udmVjdG9y&#xA;LmNmZy52YWxpZGF0aW9uLmJhc2ljcnVsZXMubXNyLmltcGwuRGVmaW5pdGlvbkNoZWNrc3EAfgAD&#xA;AAAAACUAAAB0AEtjb20udmVjdG9yLmNmZy52YWxpZGF0aW9uLmJhc2ljcnVsZXMubXNyLmltcGwu&#xA;bnVtZXJpY2FsY2hlY2suTnVtZXJpY2FsQ2hlY2tzcQB+AAMAAAAACAAAAHQAPGNvbS52ZWN0b3Iu&#xA;Y2ZnLmRvbS5iYXNlLnVpLmRldC52YWxpZGF0aW9uLkRldEFjdGl2YXRpb25DaGVja3NxAH4AAwAA&#xA;AAAmAAAAdABVY29tLnZlY3Rvci5jZmcudmFsaWRhdGlvbi5iYXNpY3J1bGVzLm1zci5pbXBsLm11&#xA;bHRpcGxpY2l0eS5NdWx0aXBsaWNpdHlDaGVja0NvbnRhaW5lcnNxAH4AAwAAAAAMAAAAdABoY29t&#xA;LnZlY3Rvci5jZmcubW9kZWwuc2VydmljZXMuaW50ZXJuYWwuYnN3aW50YmVoYXZpb3IuZGF0YWRl&#xA;c2MudmFsaWRhdGlvbi5PYnNvbGV0ZU1jU3VwcG9ydERhdGFWYWxpZGF0b3JzcQB+AAMAAAAABwAA&#xA;AHQANmNvbS52ZWN0b3IuY2ZnLmRvbS5iYXNlLnVpLmdwdC52YWxpZGF0aW9uLkdwdENoYW5uZWxJ&#xA;ZHNxAH4AAwAAAAALAAAAdABMY29tLnZlY3Rvci5jZmcudmFsaWRhdGlvbi5iYXNpY3J1bGVzLm1z&#xA;ci5pbXBsLnJlZmVyZW5jZWNoZWNrLlJlZmVyZW5jZUNoZWNrMnNxAH4AAwAAAAAnAAAAdABDY29t&#xA;LnZlY3Rvci5jZmcudmFsaWRhdGlvbi5iYXNpY3J1bGVzLm1zci5pbXBsLlN0cmluZ1BhcmFtZXRl&#xA;ckxlbmd0aHNxAH4AAwAAAAAHAAAAdABVY29tLnZlY3Rvci5jZmcudmFsaWRhdGlvbi5iYXNpY3J1&#xA;bGVzLm1zci5pbXBsLm11bHRpcGxpY2l0eS5NdWx0aXBsaWNpdHlDaGVja1BhcmFtZXRlcnNxAH4A&#xA;AwAAAAAKAAAAdABLY29tLnZlY3Rvci5jZmcudmFsaWRhdGlvbi5iYXNpY3J1bGVzLm1zci5pbXBs&#xA;LmJhc2V2YWx1ZWNoZWNrLkJhc2VWYWx1ZUNoZWNrc3EAfgADAAAAAAoAAAB0ADNjb20udmVjdG9y&#xA;LmNmZy52YWxpZGF0aW9uLmJhc2ljcnVsZXMuaW1wbC5TaG9ydG5hbWVzcQB+AAMAAAAAAQAAAHQA&#xA;OmNvbS52ZWN0b3IuY2ZnLnZhbGlkYXRpb24uYmFzaWNydWxlcy5tc3IuaW1wbC5MaW5rZXJTeW1i&#xA;b2xzcQB+AAMAAAAAAwAAAHQANWNvbS52ZWN0b3IuY2ZnLmRvbS5pby51aS52YWxpZGF0aW9ucy5B&#xA;ZGMuQWRjQ2hhbm5lbElkc3EAfgADAAAAAA0AAAB0AFBjb20udmVjdG9yLmNmZy52YWxpZGF0aW9u&#xA;LmJhc2ljcnVsZXMubXNyLmltcGwuT3B0aW9uYWxTeW1ib2xpY05hbWVWYWx1ZVZhbGlkYXRvcnNx&#xA;AH4AAwAAAAASAAAAdAA/Y29tLnZlY3Rvci5jZmcudmFsaWRhdGlvbi5iYXNpY3J1bGVzLm1zci5p&#xA;bXBsLk1vZHVsZVZhcmlhbnRFbnVtc3EAfgADAAAAAAEAAAB0ADdjb20udmVjdG9yLmNmZy5kb20u&#xA;aW8udWkudmFsaWRhdGlvbnMuU3BpLlNwaU1heFNlcXVlbmNlc3EAfgADAAAAAAEAAAB0AE9jb20u&#xA;dmVjdG9yLmNmZy52YWxpZGF0aW9uLmJhc2ljcnVsZXMubXNyLmltcGwuVW5pcXVlU3ltYm9saWNO&#xA;YW1lVmFsdWVWYWxpZGF0aW9uc3EAfgADAAAAAAcAAAB0AEFjb20udmVjdG9yLmNmZy5kb20ucnVu&#xA;dGltZXN5cy5ydGVzZXR1cC5pbnRlcm5hbC5BdXRvbWF0aWNSdGVTZXR1cHNxAH4AAwAAAAABAAAA&#xA;eA==" Name="ValidationRuleExecutionTimes"/>
<Setting Value="744" Name="InitialBackgroundValidationExecutionTimeMs"/>
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</Settings>
</Settings>
This source diff could not be displayed because it is too large. You can view the blob instead.
......@@ -4,105 +4,42 @@
#define CANFD0_CH0_RX_SELECT 0x00000400UL
#define CANFD0_CH1_RX_SELECT 0x00002000UL
#define CANFD0_CH2_RX_SELECT 0x00010000UL
#define CANFD0_CH3_RX_SELECT 0x00080000UL
#define CANFD0_CH4_RX_SELECT 0x00400000UL
#define CANFD0_CH5_RX_SELECT 0x02000000UL
const RSCANFD_Filter_st_t CANFD_RX_RULE_TABLE_LIST[CANFD0_RX_RULE_SIZE] = {
/* CAN 0 reception rules */
{0x000007FFUL , 0xFFFFFFFFUL, 0x00000000UL, CANFD0_CH0_RX_SELECT},
{0x0000075FUL , 0xFFFFFFFFUL, 0x00000000UL, CANFD0_CH0_RX_SELECT},
{0x00000361UL , 0xFFFFFFFFUL, 0x00000000UL, CANFD0_CH0_RX_SELECT},
{0x00000228UL , 0xFFFFFFFFUL, 0x80000000UL, CANFD0_CH0_RX_SELECT},
{0x00000260UL , 0xFFFFFFFFUL, 0x80000000UL, CANFD0_CH0_RX_SELECT},
{0x0000039CUL , 0xFFFFFFFFUL, 0x80000000UL, CANFD0_CH0_RX_SELECT},
{0x000003E9UL , 0xFFFFFFFFUL, 0x80000000UL, CANFD0_CH0_RX_SELECT},
{0x000001A1UL , 0xFFFFFFFFUL, 0x80000000UL, CANFD0_CH0_RX_SELECT},
{0x00000128UL , 0xFFFFFFFFUL, 0x80000000UL, CANFD0_CH0_RX_SELECT},
{0x00000168UL , 0xFFFFFFFFUL, 0x80000000UL, CANFD0_CH0_RX_SELECT},
{0x000000E8UL , 0xFFFFFFFFUL, 0x00000000UL, CANFD0_CH0_RX_SELECT},
{0x00000476UL , 0xFFFFFFFFUL, 0x80000000UL, CANFD0_CH0_RX_SELECT},
{0x000000A8UL , 0xFFFFFFFFUL, 0x80000000UL, CANFD0_CH0_RX_SELECT},
{0x00000036UL , 0xFFFFFFFFUL, 0x80000000UL, CANFD0_CH0_RX_SELECT},
{0x0000039BUL , 0xFFFFFFFFUL, 0x80000000UL, CANFD0_CH0_RX_SELECT},
{0x000000E1UL , 0xFFFFFFFFUL, 0x00000000UL, CANFD0_CH0_RX_SELECT},
{0x000001E7UL , 0xFFFFFFFFUL, 0x80000000UL, CANFD0_CH0_RX_SELECT},
{0x000001E8UL , 0xFFFFFFFFUL, 0x80000000UL, CANFD0_CH0_RX_SELECT},
{0x00000276UL , 0xFFFFFFFFUL, 0x80000000UL, CANFD0_CH0_RX_SELECT},
{0x000000B6UL , 0xFFFFFFFFUL, 0x80000000UL, CANFD0_CH0_RX_SELECT},
{0x000002A0UL , 0xFFFFFFFFUL, 0x80000000UL, CANFD0_CH0_RX_SELECT},
{0x0000015BUL , 0xFFFFFFFFUL, 0x80000000UL, CANFD0_CH0_RX_SELECT},
{0x000000F6UL , 0xFFFFFFFFUL, 0x80000000UL, CANFD0_CH0_RX_SELECT},
{0x00000236UL , 0xFFFFFFFFUL, 0x80000000UL, CANFD0_CH0_RX_SELECT},
{0x000001E1UL , 0xFFFFFFFFUL, 0x00000000UL, CANFD0_CH0_RX_SELECT},
{0x00000161UL , 0xFFFFFFFFUL, 0x00000000UL, CANFD0_CH0_RX_SELECT},
{0x00000297UL , 0xFFFFFFFFUL, 0x80000000UL, CANFD0_CH0_RX_SELECT},
{0x000004B2UL , 0xFFFFFFFFUL, 0x80000000UL, CANFD0_CH0_RX_SELECT},
{0x00000328UL , 0xFFFFFFFFUL, 0x80000000UL, CANFD0_CH0_RX_SELECT},
{0x000002DCUL , 0xFFFFFFFFUL, 0x80000000UL, CANFD0_CH0_RX_SELECT},
{0x00000229UL , 0xFFFFFFFFUL, 0x80000000UL, CANFD0_CH0_RX_SELECT},
{0x00000269UL , 0xFFFFFFFFUL, 0x80000000UL, CANFD0_CH0_RX_SELECT},
{0x000001A8UL , 0xFFFFFFFFUL, 0x80000000UL, CANFD0_CH0_RX_SELECT},
{0x00000221UL , 0xFFFFFFFFUL, 0x00000000UL, CANFD0_CH0_RX_SELECT},
{0x000003E0UL , 0xFFFFFFFFUL, 0x80000000UL, CANFD0_CH0_RX_SELECT},
{0x000003E7UL , 0xFFFFFFFFUL, 0x00000000UL, CANFD0_CH0_RX_SELECT},
{0x000003E1UL , 0xFFFFFFFFUL, 0x00000000UL, CANFD0_CH0_RX_SELECT},
{0x000002A1UL , 0xFFFFFFFFUL, 0x00000000UL, CANFD0_CH0_RX_SELECT},
{0x00000261UL , 0xFFFFFFFFUL, 0x00000000UL, CANFD0_CH0_RX_SELECT},
{0x00000169UL , 0xFFFFFFFFUL, 0x80000000UL, CANFD0_CH0_RX_SELECT},
{0x000001E9UL , 0xFFFFFFFFUL, 0x80000000UL, CANFD0_CH0_RX_SELECT},
{0x00000672UL , 0xFFFFFFFFUL, 0x80000000UL, CANFD0_CH0_RX_SELECT},
{0x00000772UL , 0xFFFFFFFFUL, 0x80000000UL, CANFD0_CH0_RX_SELECT},
{0x00000532UL , 0xFFFFFFFFUL, 0x80000000UL, CANFD0_CH0_RX_SELECT},
{0x000005F2UL , 0xFFFFFFFFUL, 0x80000000UL, CANFD0_CH0_RX_SELECT},
{0x000000A2UL , 0xFFFFFFFFUL, 0x00000000UL, CANFD0_CH0_RX_SELECT},
{0x00000227UL , 0xFFFFFFFFUL, 0x00000000UL, CANFD0_CH0_RX_SELECT},
{0x0000049FUL , 0xFFFFFFFFUL, 0x80000000UL, CANFD0_CH0_RX_SELECT},
{0x000000E6UL , 0xFFFFFFFFUL, 0x80000000UL, CANFD0_CH0_RX_SELECT},
{0x0000051FUL , 0xFFFFFFFFUL, 0x80000000UL, CANFD0_CH0_RX_SELECT},
{0x000005DFUL , 0xFFFFFFFFUL, 0x80000000UL, CANFD0_CH0_RX_SELECT},
{0x00000137UL , 0xFFFFFFFFUL, 0x80000000UL, CANFD0_CH0_RX_SELECT},
{0x000002ADUL , 0xFFFFFFFFUL, 0x80000000UL, CANFD0_CH0_RX_SELECT},
{0x00000350UL , 0xFFFFFFFFUL, 0x80000000UL, CANFD0_CH0_RX_SELECT},
{0x00000294UL , 0xFFFFFFFFUL, 0x00000000UL, CANFD0_CH0_RX_SELECT},
{0x000007FFUL , 0xFFFFFFFFUL, 0x00000000UL, CANFD0_CH1_RX_SELECT},
{0x0000075FUL , 0xFFFFFFFFUL, 0x00000000UL, CANFD0_CH1_RX_SELECT},
{0x0000000EUL, 0xFFFFFFFFUL, 0x80000000UL, CANFD0_CH1_RX_SELECT},
{0x00000190UL, 0xFFFFFFFFUL, 0x00000000UL, CANFD0_CH1_RX_SELECT},
{0x000007FFUL , 0xFFFFFFFFUL, 0x00000000UL, CANFD0_CH2_RX_SELECT},
{0x0000075FUL , 0xFFFFFFFFUL, 0x00000000UL, CANFD0_CH2_RX_SELECT},
{0x00000131UL, 0xFFFFFFFFUL, 0x80000000UL, CANFD0_CH2_RX_SELECT},
{0x00000139UL, 0xFFFFFFFFUL, 0x80000000UL, CANFD0_CH2_RX_SELECT},
{0x00000153UL, 0xFFFFFFFFUL, 0x80000000UL, CANFD0_CH2_RX_SELECT},
{0x00000152UL, 0xFFFFFFFFUL, 0x80000000UL, CANFD0_CH2_RX_SELECT},
{0x00000320UL, 0xFFFFFFFFUL, 0x80000000UL, CANFD0_CH2_RX_SELECT},
{0x0000024AUL, 0xFFFFFFFFUL, 0x80000000UL, CANFD0_CH2_RX_SELECT},
{0x00000211UL, 0xFFFFFFFFUL, 0x80000000UL, CANFD0_CH2_RX_SELECT},
{0x0000035AUL, 0xFFFFFFFFUL, 0x80000000UL, CANFD0_CH2_RX_SELECT},
{0x000002E1UL, 0xFFFFFFFFUL, 0x00000000UL, CANFD0_CH2_RX_SELECT},
{0x00000389UL, 0xFFFFFFFFUL, 0x80000000UL, CANFD0_CH2_RX_SELECT},
{0x00000135UL, 0xFFFFFFFFUL, 0x80000000UL, CANFD0_CH2_RX_SELECT},
{0x00000366UL, 0xFFFFFFFFUL, 0x80000000UL, CANFD0_CH2_RX_SELECT},
{0x00000521UL, 0xFFFFFFFFUL, 0x80000000UL, CANFD0_CH2_RX_SELECT},
{0x00000341UL, 0xFFFFFFFFUL, 0x80000000UL, CANFD0_CH2_RX_SELECT},
{0x00000431UL, 0xFFFFFFFFUL, 0x80000000UL, CANFD0_CH2_RX_SELECT},
{0x00000123UL, 0xFFFFFFFFUL, 0x80000000UL, CANFD0_CH2_RX_SELECT},
{0x00000137UL, 0xFFFFFFFFUL, 0x80000000UL, CANFD0_CH2_RX_SELECT},
{0x000005E0UL , 0xFFFFFFFFUL, 0x00000000UL, CANFD0_CH2_RX_SELECT},
{0x00000302UL , 0xFFFFFFFFUL, 0x00000000UL, CANFD0_CH2_RX_SELECT},
{0x00000442UL , 0xFFFFFFFFUL, 0x00000000UL, CANFD0_CH2_RX_SELECT},
{0x00000342UL , 0xFFFFFFFFUL, 0x00000000UL, CANFD0_CH2_RX_SELECT},
{0x00000214UL , 0xFFFFFFFFUL, 0x00000000UL, CANFD0_CH2_RX_SELECT},
{0x00000222UL , 0xFFFFFFFFUL, 0x00000000UL, CANFD0_CH2_RX_SELECT},
{0x00000254UL , 0xFFFFFFFFUL, 0x00000000UL, CANFD0_CH2_RX_SELECT},
{0x0000043CUL , 0xFFFFFFFFUL, 0x00000000UL, CANFD0_CH2_RX_SELECT},
{0x00000334UL , 0xFFFFFFFFUL, 0x00000000UL, CANFD0_CH2_RX_SELECT},
{0x00000306UL , 0xFFFFFFFFUL, 0x00000000UL, CANFD0_CH2_RX_SELECT},
{0x00000304UL , 0xFFFFFFFFUL, 0x00000000UL, CANFD0_CH2_RX_SELECT},
{0x00000364UL , 0xFFFFFFFFUL, 0x00000000UL, CANFD0_CH2_RX_SELECT},
// {0x18FF30E1UL, 0xDFFFFFFFUL, 0x00000000ul, CANFD0_CH0_RX_SELECT},
{0x18FE4F0BUL, 0xDFFFFFFFUL, 0x00000000ul, CANFD0_CH0_RX_SELECT},
// {0x189116EFUL, 0xDFFFFFFFUL, 0x00000000ul, CANFD0_CH0_RX_SELECT},
// {0x18FF31E0UL, 0xDFFFFFFFUL, 0x00000000ul, CANFD0_CH0_RX_SELECT},
// {0x0CFE5A2FUL, 0xDFFFFFFFUL, 0x00000000ul, CANFD0_CH0_RX_SELECT},
// {0x18FF4AEFUL, 0xDFFFFFFFUL, 0x00000000ul, CANFD0_CH0_RX_SELECT},
// {0x18FFFE9CUL, 0xDFFFFFFFUL, 0x00000000ul, CANFD0_CH0_RX_SELECT},
// {0x18FF0321UL, 0xDFFFFFFFUL, 0x00000000ul, CANFD0_CH0_RX_SELECT},
// {0x18FF0221UL, 0xDFFFFFFFUL, 0x00000000ul, CANFD0_CH0_RX_SELECT},
// {0x18FF0121UL, 0xDFFFFFFFUL, 0x00000000ul, CANFD0_CH0_RX_SELECT},
// {0x18FAB017UL, 0xDFFFFFFFUL, 0x00000000ul, CANFD0_CH0_RX_SELECT},
// {0x0CD22F27UL, 0xDFFFFFFFUL, 0x00000000ul, CANFD0_CH0_RX_SELECT},
// {0x1CFEC317UL, 0xDFFFFFFFUL, 0x00000000ul, CANFD0_CH0_RX_SELECT},
// {0x0CFDCC17UL, 0xDFFFFFFFUL, 0x00000000ul, CANFD0_CH0_RX_SELECT},
// {0x18F10217UL, 0xDFFFFFFFUL, 0x00000000ul, CANFD0_CH0_RX_SELECT},
// {0x18FEAE30UL, 0xDFFFFFFFUL, 0x00000000ul, CANFD0_CH0_RX_SELECT},
// {0x18FEAE17UL, 0xDFFFFFFFUL, 0x00000000ul, CANFD0_CH0_RX_SELECT},
// {0x18F10117UL, 0xDFFFFFFFUL, 0x00000000ul, CANFD0_CH0_RX_SELECT},
// {0x18FEF100UL, 0xDFFFFFFFUL, 0x00000000ul, CANFD0_CH0_RX_SELECT},
// {0x18FE17EFUL, 0xDFFFFFFFUL, 0x00000000ul, CANFD0_CH0_RX_SELECT},
// {0x18FEF117UL, 0xDFFFFFFFUL, 0x00000000ul, CANFD0_CH0_RX_SELECT},
// {0x18FFA017UL, 0xDFFFFFFFUL, 0x00000000ul, CANFD0_CH0_RX_SELECT},
// {0x0CF02F2AUL, 0xDFFFFFFFUL, 0x00000000ul, CANFD0_CH0_RX_SELECT},
// {0x18FEC1EEUL, 0xDFFFFFFFUL, 0x00000000ul, CANFD0_CH0_RX_SELECT},
// {0x18FFC13AUL, 0xDFFFFFFFUL, 0x00000000ul, CANFD0_CH0_RX_SELECT},
// {0x18FFC619UL, 0xDFFFFFFFUL, 0x00000000ul, CANFD0_CH0_RX_SELECT},
// {0x0CFEF433UL, 0xDFFFFFFFUL, 0x00000000ul, CANFD0_CH0_RX_SELECT},
// {0x18FA0118UL, 0xDFFFFFFFUL, 0x00000000ul, CANFD0_CH0_RX_SELECT},
// {0x18FE120CUL, 0xDFFFFFFFUL, 0x00000000ul, CANFD0_CH0_RX_SELECT},
// {0x18FEC117UL, 0xDFFFFFFFUL, 0x00000000ul, CANFD0_CH0_RX_SELECT},
// {0x1CDEEE17UL, 0xDFFFFFFFUL, 0x00000000ul, CANFD0_CH0_RX_SELECT},
};
......@@ -11,9 +11,9 @@ typedef struct
uint32_t data[4];
} RSCANFD_Filter_st_t;
#define CANFD0_CH0_RX_RULE_SIZE 55U
#define CANFD0_CH1_RX_RULE_SIZE 4U
#define CANFD0_CH2_RX_RULE_SIZE 31U
#define CANFD0_CH0_RX_RULE_SIZE 1U
#define CANFD0_CH1_RX_RULE_SIZE 0U
#define CANFD0_CH2_RX_RULE_SIZE 0U
#define CANFD0_RX_RULE_SIZE (CANFD0_CH0_RX_RULE_SIZE + \
......
No preview for this file type
No preview for this file type
------------------------------------------------
dle output started at: Wed Aug 05 13:45:18 2020
dle output started at: Wed Aug 05 21:26:13 2020
------------------------------------------------
dblink = "C:\ghs\comp_rh850\dblink"
------------------------------------------------
......@@ -7,7 +7,7 @@ argv[0] = "C:\ghs\comp_rh850\dblink.exe"
argv[1] = "-dbopath=objs\RH850U2A_Demo"
argv[2] = "-a"
argv[3] = "-nm=gnm"
argv[4] = "C:\Users\ADMINI~1\AppData\Local\Temp\gh_000028g1.nm"
argv[4] = "C:\Users\ADMINI~1\AppData\Local\Temp\gh_00002pk1.nm"
argv[5] = "-o"
argv[6] = "RH850U2A_Demo.dnm"
argv[7] = "-top_project"
......
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......@@ -3,31 +3,31 @@ RH850U2A_Demo .inttable_PE0 3200
RH850U2A_Demo .inttable_PE1 3200
RH850U2A_Demo .inttable_PE2 3200
RH850U2A_Demo .inttable_PE3 3200
RH850U2A_Demo .rosdata 6216
RH850U2A_Demo .rosdata 3076
RH850U2A_Demo .rodata 49
RH850U2A_Demo .CONST_ROM_8BIT 105
RH850U2A_Demo .CONST_ROM_16BIT 240
RH850U2A_Demo .CONST_ROM_32BIT 224
RH850U2A_Demo .CONST_ROM_UNSPECIFIED 5164
RH850U2A_Demo .text 14530
RH850U2A_Demo .text 13522
RH850U2A_Demo .DIO_PUBLIC_CODE_ROM 360
RH850U2A_Demo .DIO_PRIVATE_CODE_ROM 90
RH850U2A_Demo .GPT_PUBLIC_CODE_ROM 466
RH850U2A_Demo .GPT_PUBLIC_CODE_ROM 470
RH850U2A_Demo .GPT_PRIVATE_CODE_ROM 950
RH850U2A_Demo .GPT_FAST_CODE_ROM 300
RH850U2A_Demo .ICU_PRIVATE_CODE_ROM 2878
RH850U2A_Demo .PORT_PUBLIC_CODE_ROM 420
RH850U2A_Demo .PORT_PRIVATE_CODE_ROM 2346
RH850U2A_Demo .PWM_PRIVATE_CODE_ROM 4040
RH850U2A_Demo .PWM_PRIVATE_CODE_ROM 4086
RH850U2A_Demo .SPI_PUBLIC_CODE_ROM 126
RH850U2A_Demo .SPI_PRIVATE_CODE_ROM 9256
RH850U2A_Demo .SPI_PRIVATE_CODE_ROM 9324
RH850U2A_Demo .WDG_FAST_CODE_ROM 58
RH850U2A_Demo .CAN_PUBLIC_CODE_ROM 1128
RH850U2A_Demo .CAN_PRIVATE_CODE_ROM 4604
RH850U2A_Demo .CAN_PUBLIC_CODE_ROM 1140
RH850U2A_Demo .CAN_PRIVATE_CODE_ROM 4614
RH850U2A_Demo .CAN_FAST_CODE_ROM 854
RH850U2A_Demo .ADC_PUBLIC_CODE_ROM 588
RH850U2A_Demo .ADC_PRIVATE_CODE_ROM 2880
RH850U2A_Demo .ADC_FAST_CODE_ROM 2236
RH850U2A_Demo .ADC_PRIVATE_CODE_ROM 2882
RH850U2A_Demo .ADC_FAST_CODE_ROM 2238
RH850U2A_Demo .MCU_PUBLIC_CODE_ROM 156
RH850U2A_Demo .MCU_PRIVATE_CODE_ROM 3514
RH850U2A_Demo .secinfo 1416
......
......@@ -36,11 +36,11 @@ void Sys_20ms_Tasks(void)
// Can_MainFunction_Read();
}
uint32_t u32IOConvert;
uint8_t u8test;
void Sys_50ms_Tasks(void)
{
uint8_t u8test;
u8test = Get_CAN_CH0_ID_361_Sig_PRES_DSG();
u8test++;
u8test = Get_ID_18FF30E1_Sig_ECAS_Decrease();
u32IOConvert++;
// if (u32IOConvert > 100)
// {
......
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